radeonsi: fix invalidating bindless buffer descriptors

The VA is stored at [4:5], not [0:1]. This invalidated all
texture buffer descriptors when they were made resident in
the current context.

This removes few partial flushes and cache invalidations which
are needed when updating a bindless descriptor on the fly with
a WRITE_DATA packet.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c b/src/gallium/drivers/radeonsi/si_descriptors.c
index 88f7dcee959e2878478f5cf5a28e3596ae4c4a5b..18b070ba3a22ec801648d58690eb9cdc1a7af7a9 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_descriptors.c
+++ b/src/gallium/drivers/radeonsi/si_descriptors.c
@@ -2361,7 +2361,7 @@ static void si_invalidate_bindless_buf_desc(struct si_context *sctx,
                                            uint64_t offset)
 {
        struct r600_resource *buf = r600_resource(resource);
-       uint32_t *desc_list = desc->desc_list;
+       uint32_t *desc_list = desc->desc_list + 4;
        uint64_t old_desc_va;
 
        assert(resource->target == PIPE_BUFFER);
@@ -2374,7 +2374,7 @@ static void si_invalidate_bindless_buf_desc(struct si_context *sctx,
                /* The buffer has been invalidated when the handle wasn't
                 * resident, update the descriptor and the dirty flag.
                 */
-               si_set_buf_desc_address(buf, offset, &desc_list[4]);
+               si_set_buf_desc_address(buf, offset, &desc_list[0]);
 
                desc->dirty = true;
                sctx->bindless_descriptors_dirty = true;