i386.c (ix86_decompose_address): Check for SI_REG using REGNO of base_reg directly.

	* config/i386/i386.c (ix86_decompose_address): Check for SI_REG
	using REGNO of base_reg directly.

From-SVN: r162899

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index e014b3e43a7eda69eb154b5c1d7e6474ff0315e4..3456501c8f91450dab745e1ee3a32956554eaceb 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2010-08-05  Uros Bizjak  <ubizjak@gmail.com>
+
+       * config/i386/i386.c (ix86_decompose_address): Check for SI_REG
+       using REGNO of base_reg directly.
+
 2010-08-05  Jie Zhang  <jie@codesourcery.com>
 
        PR tree-optimization/45144
@@ -33,7 +38,7 @@
 
        * config/i386/i386.h (struct machine_frame_state): Rename from
        machine_cfa_state.  Add members tracking SP and FP regardless
-       of the current CFA register.  
+       of the current CFA register.
        (ix86_cfa_state): Remove.
        * config/i386/i386.c (struct ix86_frame): Add reg_save_offset
        and sse_reg_save_offset members.
@@ -138,7 +143,7 @@
        * tree-ssa-propagate.h (struct prop_value_d, prop_value_t): Move ...
        * tree-ssa-ccp.c: ... here.
        * tree-ssa-copy.c: ... and here.
-       * tree-ssa-propagate.h (enum value_range_type, struct value_range_d, 
+       * tree-ssa-propagate.h (enum value_range_type, struct value_range_d,
        value_range_t): Move ...
        * tree-vrp.c: ... here.
        * tree-ssa-propagate.h (ssa_prop_get_value_fn): New typedef.

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index d809d443bd1046046f7e110d554b7a371a8e5c25..dd81825863760c53b83763283e87ca72fca055de 100644 (file)
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -10417,8 +10417,7 @@ ix86_decompose_address (rtx addr, struct ix86_address *out)
      to test cfun for being non-NULL. */
   if (TARGET_K6 && cfun && optimize_function_for_speed_p (cfun)
       && base_reg && !index_reg && !disp
-      && REG_P (base_reg)
-      && REGNO_REG_CLASS (REGNO (base_reg)) == SIREG)
+      && REG_P (base_reg) && REGNO (base_reg) == SI_REG)
     disp = const0_rtx;
 
   /* Special case: encode reg+reg instead of reg*2.  */