[PATCH 2/17][Testsuite] Add a selector for ARM FP16 alternative format support.

2016-09-23  Matthew Wahab  <matthew.wahab@arm.com>

	* doc/sourcebuild.texi (ARM-specific attributes): Add entries for
	arm_fp16_alternative_ok and arm_fp16_none_ok.

testsuite/
2016-09-23  Matthew Wahab  <matthew.wahab@arm.com>

	* g++.dg/ext/arm-fp16/arm-fp16-ops-3.C: Use
	arm_fp16_alternative_ok.
	* g++.dg/ext/arm-fp16/arm-fp16-ops-4.C: Likewise.
	* gcc.dg/torture/arm-fp16-int-convert-alt.c: Likewise.
	* gcc/testsuite/gcc.dg/torture/arm-fp16-ops-3.c: Likewise.
	* gcc/testsuite/gcc.dg/torture/arm-fp16-ops-4.c: Likewise.
	* gcc.target/arm/fp16-compile-alt-1.c: Likewise.
	* gcc.target/arm/fp16-compile-alt-10.c: Likewise.
	* gcc.target/arm/fp16-compile-alt-11.c: Likewise.
	* gcc.target/arm/fp16-compile-alt-12.c: Likewise.
	* gcc.target/arm/fp16-compile-alt-2.c: Likewise.
	* gcc.target/arm/fp16-compile-alt-3.c: Likewise.
	* gcc.target/arm/fp16-compile-alt-4.c: Likewise.
	* gcc.target/arm/fp16-compile-alt-5.c: Likewise.
	* gcc.target/arm/fp16-compile-alt-6.c: Likewise.
	* gcc.target/arm/fp16-compile-alt-7.c: Likewise.
	* gcc.target/arm/fp16-compile-alt-8.c: Likewise.
	* gcc.target/arm/fp16-compile-alt-9.c: Likewise.
	* gcc.target/arm/fp16-compile-none-1.c: Use arm_fp16_none_ok.
	* gcc.target/arm/fp16-compile-none-2.c: Likewise.
	* gcc.target/arm/fp16-rounding-alt-1.c: Use
	arm_fp16_alternative_ok.
	* lib/target-supports.exp
	(check_effective_target_arm_fp16_alternative_ok_nocache): New.
	(check_effective_target_arm_fp16_alternative_ok): New.
	(check_effective_target_arm_fp16_none_ok_nocache): New.
	(check_effective_target_arm_fp16_none_ok): New.

From-SVN: r240400

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 79aa31b089fc62bace0e5486ea7701f165710b05..ff9a1e210f60151de375288e672bed4d909e3ca6 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2016-09-23  Matthew Wahab  <matthew.wahab@arm.com>
+
+       * doc/sourcebuild.texi (ARM-specific attributes): Add entries for
+       arm_fp16_alternative_ok and arm_fp16_none_ok.
+
 2016-09-23  Martin Liska  <mliska@suse.cz>
 
        * ipa-icf.c (sem_variable::merge): Replace adress

diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi
index d18c3b4c27b8f0bdf5d3fec12aec48087cfc4330..fac03499bb5baa0fb243f347989f3ba083b7ab69 100644 (file)
--- a/gcc/doc/sourcebuild.texi
+++ b/gcc/doc/sourcebuild.texi
@@ -1598,6 +1598,13 @@ options, including @code{-mfp16-format=ieee} if necessary to obtain the
 Test system supports executing Neon half-precision float instructions.
 (Implies previous.)
 
+@item arm_fp16_alternative_ok
+ARM target supports the ARM FP16 alternative format.  Some multilibs
+may be incompatible with the options needed.
+
+@item arm_fp16_none_ok
+ARM target supports specifying none as the ARM FP16 format.
+
 @item arm_thumb1_ok
 ARM target generates Thumb-1 code for @code{-mthumb}.
 

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 998df2c65c728f10414995e08308d3d2c0ca3d17..b0aeb5e50653ba802a573867408dbec0ae00d5f2 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,33 @@
+2016-09-23  Matthew Wahab  <matthew.wahab@arm.com>
+
+       * g++.dg/ext/arm-fp16/arm-fp16-ops-3.C: Use
+       arm_fp16_alternative_ok.
+       * g++.dg/ext/arm-fp16/arm-fp16-ops-4.C: Likewise.
+       * gcc.dg/torture/arm-fp16-int-convert-alt.c: Likewise.
+       * gcc/testsuite/gcc.dg/torture/arm-fp16-ops-3.c: Likewise.
+       * gcc/testsuite/gcc.dg/torture/arm-fp16-ops-4.c: Likewise.
+       * gcc.target/arm/fp16-compile-alt-1.c: Likewise.
+       * gcc.target/arm/fp16-compile-alt-10.c: Likewise.
+       * gcc.target/arm/fp16-compile-alt-11.c: Likewise.
+       * gcc.target/arm/fp16-compile-alt-12.c: Likewise.
+       * gcc.target/arm/fp16-compile-alt-2.c: Likewise.
+       * gcc.target/arm/fp16-compile-alt-3.c: Likewise.
+       * gcc.target/arm/fp16-compile-alt-4.c: Likewise.
+       * gcc.target/arm/fp16-compile-alt-5.c: Likewise.
+       * gcc.target/arm/fp16-compile-alt-6.c: Likewise.
+       * gcc.target/arm/fp16-compile-alt-7.c: Likewise.
+       * gcc.target/arm/fp16-compile-alt-8.c: Likewise.
+       * gcc.target/arm/fp16-compile-alt-9.c: Likewise.
+       * gcc.target/arm/fp16-compile-none-1.c: Use arm_fp16_none_ok.
+       * gcc.target/arm/fp16-compile-none-2.c: Likewise.
+       * gcc.target/arm/fp16-rounding-alt-1.c: Use
+       arm_fp16_alternative_ok.
+       * lib/target-supports.exp
+       (check_effective_target_arm_fp16_alternative_ok_nocache): New.
+       (check_effective_target_arm_fp16_alternative_ok): New.
+       (check_effective_target_arm_fp16_none_ok_nocache): New.
+       (check_effective_target_arm_fp16_none_ok): New.
+
 2016-09-23  Martin Liska  <mliska@suse.cz>
 
        * gcc.dg/ipa/pr77653.c: Replace adress

diff --git a/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-3.C b/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-3.C
index 8f9ab64bc454047945088c829a101f4a7d188ea5..29080c7514f4c0d48469a59a4c0d13a826078f93 100644 (file)
--- a/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-3.C
+++ b/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-3.C
@@ -1,5 +1,6 @@
 /* Test various operators on __fp16 and mixed __fp16/float operands.  */
 /* { dg-do run { target arm*-*-* } } */
+/* { dg-require-effective-target arm_fp16_alternative_ok } */
 /* { dg-options "-mfp16-format=alternative" } */
 
 #include "arm-fp16-ops.h"

diff --git a/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-4.C b/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-4.C
index 4877f392c060d704084197cb3bd66fe171283e95..4be8883faad20415bf736b637b03f46ba3f233d4 100644 (file)
--- a/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-4.C
+++ b/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-4.C
@@ -1,5 +1,6 @@
 /* Test various operators on __fp16 and mixed __fp16/float operands.  */
 /* { dg-do run { target arm*-*-* } } */
+/* { dg-require-effective-target arm_fp16_alternative_ok } */
 /* { dg-options "-mfp16-format=alternative -ffast-math" } */
 
 #include "arm-fp16-ops.h"

diff --git a/gcc/testsuite/gcc.dg/torture/arm-fp16-int-convert-alt.c b/gcc/testsuite/gcc.dg/torture/arm-fp16-int-convert-alt.c
index ba1f9905e21f1749f5843b5ef8b9383a19d1c94a..f013b59ddde0d44e044805527d5c87661041667f 100644 (file)
--- a/gcc/testsuite/gcc.dg/torture/arm-fp16-int-convert-alt.c
+++ b/gcc/testsuite/gcc.dg/torture/arm-fp16-int-convert-alt.c
@@ -1,5 +1,6 @@
 /* Test floating-point conversions.  Standard types and __fp16.  */
 /* { dg-do run { target arm*-*-* } } */
+/* { dg-require-effective-target arm_fp16_alternative_ok }
 /* { dg-options "-mfp16-format=alternative" } */
 
 #include "fp-int-convert.h"

diff --git a/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-3.c b/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-3.c
index 8f9ab64bc454047945088c829a101f4a7d188ea5..7716baf818ec4cc999e3ecde7600835a145f99cc 100644 (file)
--- a/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-3.c
+++ b/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-3.c
@@ -1,5 +1,6 @@
 /* Test various operators on __fp16 and mixed __fp16/float operands.  */
 /* { dg-do run { target arm*-*-* } } */
+/* { dg-require-effective-target arm_fp16_alternative_ok }
 /* { dg-options "-mfp16-format=alternative" } */
 
 #include "arm-fp16-ops.h"

diff --git a/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-4.c b/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-4.c
index 4877f392c060d704084197cb3bd66fe171283e95..1940f4320d0cd9dfecef96e0fe661365b76a6e20 100644 (file)
--- a/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-4.c
+++ b/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-4.c
@@ -1,5 +1,6 @@
 /* Test various operators on __fp16 and mixed __fp16/float operands.  */
 /* { dg-do run { target arm*-*-* } } */
+/* { dg-require-effective-target arm_fp16_alternative_ok }
 /* { dg-options "-mfp16-format=alternative -ffast-math" } */
 
 #include "arm-fp16-ops.h"

diff --git a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-1.c b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-1.c
index 3abcd947a6f3ae33a6a567e759012ee0f8cabb8e..0845e886a835df4207f406a2880b86fe76eb3a94 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-1.c
+++ b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-1.c
@@ -1,4 +1,5 @@
 /* { dg-do compile } */
+/* { dg-require-effective-target arm_fp16_alternative_ok } */
 /* { dg-options "-mfp16-format=alternative" } */
 
 __fp16 xx = 0.0;

diff --git a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-10.c b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-10.c
index 2e3d31fdf07b3a2e32289d0781e4ab638c9e514b..a8772a19ae00f85238a6ab174caae1d9d9f97019 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-10.c
+++ b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-10.c
@@ -1,4 +1,5 @@
 /* { dg-do compile } */
+/* { dg-require-effective-target arm_fp16_alternative_ok } */
 /* { dg-options "-mfp16-format=alternative -pedantic -std=gnu99" } */
 
 #include <math.h>

diff --git a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-11.c b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-11.c
index 62a7a3df5fff8605800a707988d15716842de40c..1cb3d2c4963fc46a37b83a7b0b60148d7cb30f68 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-11.c
+++ b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-11.c
@@ -1,4 +1,5 @@
 /* { dg-do compile } */
+/* { dg-require-effective-target arm_fp16_alternative_ok } */
 /* { dg-options "-mfp16-format=alternative -pedantic -std=gnu99" } */
 
 #include <math.h>

diff --git a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-12.c b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-12.c
index 09586e9b8fc5e6e299bb08be72108302adee8a65..3c3bd2f02f6f90c15cac7cb60e0ffa859540e874 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-12.c
+++ b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-12.c
@@ -1,4 +1,5 @@
 /* { dg-do compile } */
+/* { dg-require-effective-target arm_fp16_alternative_ok } */
 /* { dg-options "-mfp16-format=alternative" } */
 
 float xx __attribute__((mode(HF))) = 0.0;

diff --git a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-2.c b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-2.c
index b7fe99d53707c6c3fe70a390507064f69a1a8943..8a45f1f4ae10c893a4de481b2ef2efc11e6b71cb 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-2.c
+++ b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-2.c
@@ -1,4 +1,5 @@
 /* { dg-do compile } */
+/* { dg-require-effective-target arm_fp16_alternative_ok } */
 /* { dg-options "-mfp16-format=alternative" } */
 
 /* Encoding taken from:  http://en.wikipedia.org/wiki/Half_precision */

diff --git a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-3.c b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-3.c
index f325a84fe7732b0328a4f1bc3182d72fae35edc7..e786a51da6985dcf6b8e8d8f08e8c1b89bf11802 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-3.c
+++ b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-3.c
@@ -1,4 +1,5 @@
 /* { dg-do compile } */
+/* { dg-require-effective-target arm_fp16_alternative_ok } */
 /* { dg-options "-mfp16-format=alternative" } */
 
 /* Encoding taken from:  http://en.wikipedia.org/wiki/Half_precision */

diff --git a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-4.c b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-4.c
index 4b9b3311732830cd39fbb5c2a568dedbeef3d89f..cfeb61aaea74cf24fb0d2afc396df843e07020e9 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-4.c
+++ b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-4.c
@@ -1,4 +1,5 @@
 /* { dg-do compile } */
+/* { dg-require-effective-target arm_fp16_alternative_ok } */
 /* { dg-options "-mfp16-format=alternative" } */
 
 /* Encoding taken from:  http://en.wikipedia.org/wiki/Half_precision */

diff --git a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-5.c b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-5.c
index 458f5073b3ffa694694c153f85c54a3687e7d8e7..3b741ae62dcd4ac9a79810f15a325749e37b57eb 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-5.c
+++ b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-5.c
@@ -1,4 +1,5 @@
 /* { dg-do compile } */
+/* { dg-require-effective-target arm_fp16_alternative_ok } */
 /* { dg-options "-mfp16-format=alternative" } */
 
 /* Encoding taken from:  http://en.wikipedia.org/wiki/Half_precision */

diff --git a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-6.c b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-6.c
index dbb4a9999245d1a87ae34ed4a749c510da6a6c5b..abffff5fa60b1482d5c52353925c57e4fc38b9f1 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-6.c
+++ b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-6.c
@@ -1,4 +1,5 @@
 /* { dg-do compile } */
+/* { dg-require-effective-target arm_fp16_alternative_ok } */
 /* { dg-options "-mfp16-format=alternative" } */
 
 /* This number is the maximum value representable in the alternative

diff --git a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-7.c b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-7.c
index 40940a63421e1a822fe255cc0d56ac1bb9fd63d3..c339f197cd77c365ec8f042413ecd4e435849ae4 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-7.c
+++ b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-7.c
@@ -1,4 +1,5 @@
 /* { dg-do compile } */
+/* { dg-require-effective-target arm_fp16_alternative_ok } */
 /* { dg-options "-mfp16-format=alternative -pedantic" } */
 
 /* This number overflows the range of the alternative encoding.  Since this

diff --git a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-8.c b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-8.c
index cbc0a3947e2255164b60a50584959158c683bb5b..deeb5cd557423874f24702494b37d3ecfca27eaf 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-8.c
+++ b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-8.c
@@ -1,4 +1,5 @@
 /* { dg-do compile } */
+/* { dg-require-effective-target arm_fp16_alternative_ok } */
 /* { dg-options "-mfp16-format=alternative" } */
 
 /* Encoding taken from:  http://en.wikipedia.org/wiki/Half_precision */

diff --git a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-9.c b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-9.c
index 6487c8d67dd0f5a78bf083aaed24b2a565f16772..f9f565453e70eb06715ea0507f169f6ac98f8609 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-9.c
+++ b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-9.c
@@ -1,4 +1,5 @@
 /* { dg-do compile } */
+/* { dg-require-effective-target arm_fp16_alternative_ok } */
 /* { dg-options "-mfp16-format=alternative" } */
 
 /* Encoding taken from:  http://en.wikipedia.org/wiki/Half_precision */

diff --git a/gcc/testsuite/gcc.target/arm/fp16-compile-none-1.c b/gcc/testsuite/gcc.target/arm/fp16-compile-none-1.c
index e91250581a0edfeac5c616effe69aab122af9ed8..9472249e2e2a594130c0d5966aa7c0aa1dddbf58 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/fp16-compile-none-1.c
+++ b/gcc/testsuite/gcc.target/arm/fp16-compile-none-1.c
@@ -1,4 +1,5 @@
 /* { dg-do compile } */
+/* { dg-require-effective-target arm_fp16_none_ok } */
 /* { dg-options "-mfp16-format=none" } */
 
 /* __fp16 type name is not recognized unless you explicitly enable it

diff --git a/gcc/testsuite/gcc.target/arm/fp16-compile-none-2.c b/gcc/testsuite/gcc.target/arm/fp16-compile-none-2.c
index eb7eef5eaf22168ae0f2fcdf4761bd7ecc32b34d..9ec21e5c1cc45dd17e214ab6da82fc86b6427084 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/fp16-compile-none-2.c
+++ b/gcc/testsuite/gcc.target/arm/fp16-compile-none-2.c
@@ -1,4 +1,5 @@
 /* { dg-do compile } */
+/* { dg-require-effective-target arm_fp16_none_ok } */
 /* { dg-options "-mfp16-format=none" } */
 
 /* mode(HF) attributes are not recognized unless you explicitly enable

diff --git a/gcc/testsuite/gcc.target/arm/fp16-rounding-alt-1.c b/gcc/testsuite/gcc.target/arm/fp16-rounding-alt-1.c
index f50b4475f1902493decf9dc6f477392da27a72c6..1c15b613239de8610bb52b127ce5b143d1038804 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/fp16-rounding-alt-1.c
+++ b/gcc/testsuite/gcc.target/arm/fp16-rounding-alt-1.c
@@ -3,6 +3,7 @@
    from double to __fp16.  */
 
 /* { dg-do run } */
+/* { dg-require-effective-target arm_fp16_alternative_ok } */
 /* { dg-options "-mfp16-format=alternative" } */
 
 #include <stdlib.h>

diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 6724a7fd214e91299f7b47563cff2d6e6611c3da..dfee6cf4e0be35a19f049c2f99554ea6abfb7d3d 100644 (file)
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -3356,6 +3356,65 @@ proc add_options_for_arm_neon_fp16 { flags } {
     return "$flags $et_arm_neon_fp16_flags"
 }
 
+# Return 1 if this is an ARM target supporting the FP16 alternative
+# format.  Some multilibs may be incompatible with the options needed.  Also
+# set et_arm_neon_fp16_flags to the best options to add.
+
+proc check_effective_target_arm_fp16_alternative_ok_nocache { } {
+    global et_arm_neon_fp16_flags
+    set et_arm_neon_fp16_flags ""
+    if { [check_effective_target_arm32] } {
+       foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
+                      "-mfpu=neon-fp16 -mfloat-abi=softfp"} {
+           if { [check_no_compiler_messages_nocache \
+                     arm_fp16_alternative_ok object {
+               #if !defined (__ARM_FP16_FORMAT_ALTERNATIVE)
+               #error __ARM_FP16_FORMAT_ALTERNATIVE not defined
+               #endif
+           } "$flags -mfp16-format=alternative"] } {
+               set et_arm_neon_fp16_flags "$flags -mfp16-format=alternative"
+               return 1
+           }
+       }
+    }
+
+    return 0
+}
+
+proc check_effective_target_arm_fp16_alternative_ok { } {
+    return [check_cached_effective_target arm_fp16_alternative_ok \
+               check_effective_target_arm_fp16_alternative_ok_nocache]
+}
+
+# Return 1 if this is an ARM target supports specifying the FP16 none
+# format.  Some multilibs may be incompatible with the options needed.
+
+proc check_effective_target_arm_fp16_none_ok_nocache { } {
+    if { [check_effective_target_arm32] } {
+       foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
+                      "-mfpu=neon-fp16 -mfloat-abi=softfp"} {
+           if { [check_no_compiler_messages_nocache \
+                     arm_fp16_none_ok object {
+               #if defined (__ARM_FP16_FORMAT_ALTERNATIVE)
+               #error __ARM_FP16_FORMAT_ALTERNATIVE defined
+               #endif
+               #if defined (__ARM_FP16_FORMAT_IEEE)
+               #error __ARM_FP16_FORMAT_IEEE defined
+               #endif
+           } "$flags -mfp16-format=none"] } {
+               return 1
+           }
+       }
+    }
+
+    return 0
+}
+
+proc check_effective_target_arm_fp16_none_ok { } {
+    return [check_cached_effective_target arm_fp16_none_ok \
+               check_effective_target_arm_fp16_none_ok_nocache]
+}
+
 # Return 1 if this is an ARM target supporting -mfpu=neon-fp-armv8
 # -mfloat-abi=softfp or equivalent options.  Some multilibs may be
 # incompatible with these options.  Also set et_arm_v8_neon_flags to the