radv: refactor descriptor set userdata emission out.

This just moves this into a separate function.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>

diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index 89eef57a9585fc2bef5264dc6480ef86e75f9305..4ac5ad78c13fa256100948a33a30c0a4447b6e86 100644 (file)
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -894,6 +894,27 @@ radv_cmd_buffer_flush_dynamic_state(struct radv_cmd_buffer *cmd_buffer)
        cmd_buffer->state.dirty = 0;
 }
 
+static void
+radv_emit_descriptor_set_userdata(struct radv_cmd_buffer *cmd_buffer,
+                                 struct radv_descriptor_set *set,
+                                 unsigned idx)
+{
+       radeon_set_sh_reg_seq(cmd_buffer->cs,
+                               R_00B030_SPI_SHADER_USER_DATA_PS_0 + 8 * idx, 2);
+       radeon_emit(cmd_buffer->cs, set->va);
+       radeon_emit(cmd_buffer->cs, set->va >> 32);
+
+       radeon_set_sh_reg_seq(cmd_buffer->cs,
+                               R_00B130_SPI_SHADER_USER_DATA_VS_0 + 8 * idx, 2);
+       radeon_emit(cmd_buffer->cs, set->va);
+       radeon_emit(cmd_buffer->cs, set->va >> 32);
+
+       radeon_set_sh_reg_seq(cmd_buffer->cs,
+                               R_00B900_COMPUTE_USER_DATA_0 + 8 * idx, 2);
+       radeon_emit(cmd_buffer->cs, set->va);
+       radeon_emit(cmd_buffer->cs, set->va >> 32);
+}
+
 static void
 radv_flush_constants(struct radv_cmd_buffer *cmd_buffer,
                     struct radv_pipeline *pipeline,
@@ -1353,21 +1374,7 @@ void radv_bind_descriptor_set(struct radv_cmd_buffer *cmd_buffer,
                if (set->descriptors[j])
                        ws->cs_add_buffer(cmd_buffer->cs, set->descriptors[j], 7);
 
-       radeon_set_sh_reg_seq(cmd_buffer->cs,
-                               R_00B030_SPI_SHADER_USER_DATA_PS_0 + 8 * idx, 2);
-       radeon_emit(cmd_buffer->cs, set->va);
-       radeon_emit(cmd_buffer->cs, set->va >> 32);
-
-       radeon_set_sh_reg_seq(cmd_buffer->cs,
-                               R_00B130_SPI_SHADER_USER_DATA_VS_0 + 8 * idx, 2);
-       radeon_emit(cmd_buffer->cs, set->va);
-       radeon_emit(cmd_buffer->cs, set->va >> 32);
-
-       radeon_set_sh_reg_seq(cmd_buffer->cs,
-                               R_00B900_COMPUTE_USER_DATA_0 + 8 * idx, 2);
-       radeon_emit(cmd_buffer->cs, set->va);
-       radeon_emit(cmd_buffer->cs, set->va >> 32);
-
+       radv_emit_descriptor_set_userdata(cmd_buffer, set, idx);
        if(set->bo)
                ws->cs_add_buffer(cmd_buffer->cs, set->bo, 8);
 }