v3d: writes to magic registers aren't RF writes after THREND

Shaders must not attempt to write to the register files in the last
three instructions, but that doesn't include the magic registers:

nop                  ; nop               ; thrsw; ldtmu.- *** ERROR ***
nop                  ; nop
nop                  ; nop

v2: Simplify validation rules. (Eric Anholt)
v3: Adjust validation even more. (Eric Anholt)

Reviewed-by: Eric Anholt <eric@anholt.net>

diff --git a/src/broadcom/compiler/qpu_validate.c b/src/broadcom/compiler/qpu_validate.c
index fb2ed123aba3aee228a80fed8589e2d27366b9d0..24be4fd39e5e5f22cbf75d1ba7ba3c5b38bb7067 100644 (file)
--- a/src/broadcom/compiler/qpu_validate.c
+++ b/src/broadcom/compiler/qpu_validate.c
@@ -258,8 +258,10 @@ qpu_validate_inst(struct v3d_qpu_validate_state *state, struct qinst *qinst)
                         fail_instr(state, "RF write after THREND");
                 }
 
-                if (v3d_qpu_sig_writes_address(devinfo, &inst->sig))
+                if (v3d_qpu_sig_writes_address(devinfo, &inst->sig) &&
+                    !inst->sig_magic) {
                         fail_instr(state, "RF write after THREND");
+                }
 
                 /* GFXH-1625: No TMUWT in the last instruction */
                 if (state->last_thrsw_ip - state->ip == 2 &&