rs6000.c (altivec_expand_vec_perm_const): Correct selection of field for vector splat...
authorBill Schmidt <wschmidt@linux.vnet.ibm.com>
Tue, 23 Jul 2013 22:30:58 +0000 (22:30 +0000)
committerWilliam Schmidt <wschmidt@gcc.gnu.org>
Tue, 23 Jul 2013 22:30:58 +0000 (22:30 +0000)
2013-07-23  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
    Anton Blanchard <anton@au1.ibm.com>

* config/rs6000/rs6000.c (altivec_expand_vec_perm_const): Correct
selection of field for vector splat in little endian mode.

Co-Authored-By: Anton Blanchard <anton@au1.ibm.com>
From-SVN: r201193

gcc/ChangeLog
gcc/config/rs6000/rs6000.c

index fe3e041a00485d0fb56df6c99dc985e82f52537d..0eed895e65a0f5fbfca8a58f9b75488de4e172b9 100644 (file)
@@ -1,3 +1,9 @@
+2013-07-23  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
+           Anton Blanchard <anton@au1.ibm.com>
+
+       * config/rs6000/rs6000.c (altivec_expand_vec_perm_const): Correct
+       selection of field for vector splat in little endian mode.
+
 2013-07-23  Michael Meissner  <meissner@linux.vnet.ibm.com>
 
        * config/rs6000/vector.md (xor<mode>3): Move 128-bit boolean
index 8c3cf97faa3a993f2c386905172500eb2182d77f..7729188a3936b5eb52c581e9d02116e3032b1dca 100644 (file)
@@ -28460,9 +28460,10 @@ altivec_expand_vec_perm_const (rtx operands[4])
              break;
          if (i == 16)
            {
+             int field = BYTES_BIG_ENDIAN ? elt / 2 : 7 - elt / 2;
              x = gen_reg_rtx (V8HImode);
              emit_insn (gen_altivec_vsplth (x, gen_lowpart (V8HImode, op0),
-                                            GEN_INT (elt / 2)));
+                                            GEN_INT (field)));
              emit_move_insn (target, gen_lowpart (V16QImode, x));
              return true;
            }
@@ -28478,9 +28479,10 @@ altivec_expand_vec_perm_const (rtx operands[4])
              break;
          if (i == 16)
            {
+             int field = BYTES_BIG_ENDIAN ? elt / 4 : 3 - elt / 4;
              x = gen_reg_rtx (V4SImode);
              emit_insn (gen_altivec_vspltw (x, gen_lowpart (V4SImode, op0),
-                                            GEN_INT (elt / 4)));
+                                            GEN_INT (field)));
              emit_move_insn (target, gen_lowpart (V16QImode, x));
              return true;
            }