mem2reg to preserve user attributes and src

diff --git a/frontends/ast/simplify.cc b/frontends/ast/simplify.cc
index 54b9efaada862c7b3abb2993c8882aa821d3027a..8493aa51397bfe23d2b66c95592527ff33555f99 100644 (file)
--- a/frontends/ast/simplify.cc
+++ b/frontends/ast/simplify.cc
@@ -150,6 +150,10 @@ bool AstNode::simplify(bool const_fold, bool at_zero, bool in_lvalue, int stage,
                                        reg->str = stringf("%s[%d]", node->str.c_str(), i);
                                        reg->is_reg = true;
                                        reg->is_signed = node->is_signed;
+                                       for (auto &it : node->attributes)
+                                               reg->attributes.emplace(it.first, it.second->clone());
+                                       reg->filename = node->filename;
+                                       reg->linenum = node->linenum;
                                        children.push_back(reg);
                                        while (reg->simplify(true, false, false, 1, -1, false, false)) { }
                                }

diff --git a/tests/various/mem2reg.ys b/tests/various/mem2reg.ys
new file mode 100644 (file)
index 0000000..00389c7
--- /dev/null
+++ b/tests/various/mem2reg.ys
@@ -0,0 +1,13 @@
+read_verilog <<EOT
+module top;
+parameter DATADEPTH=2;
+parameter DATAWIDTH=1;
+(* keep, nomem2reg *) reg [DATAWIDTH-1:0] data1 [DATADEPTH-1:0];
+(* keep, mem2reg *) reg [DATAWIDTH-1:0] data2 [DATADEPTH-1:0];
+endmodule
+EOT
+
+proc
+cd top
+select -assert-count 1 m:data1 a:src=<<EOT:4 %i
+select -assert-count 2 w:data2[*] a:src=<<EOT:5 %i