S12Z: Opcodes: Handle bit map operations with non-canonical operands.

opcodes/
	* s12z-opc.c (bm_decode): Handle the RESERVERD0 case.

gas/
	* testsuite/gas/s12z/bit-manip-invalid.d: Extend the test.
	* testsuite/gas/s12z/bit-manip-invalid.s: Extend the test.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index d49ec4d9278dff465880ac263d4226e13e627e69..090df4b99b2fb61bbadf5cafc68585ca34b22d5d 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,9 @@
+2019-04-24  John Darrington <john@darrington.wattle.id.au>
+
+       * testsuite/gas/s12z/bit-manip-invalid.s: Extend test for BSET
+       and BCLR instructions with an invalid mode.
+       * testsuite/gas/s12z/bit-manip-invalid.d: ditto.
+
 2019-04-19  Nick Clifton  <nickc@redhat.com>
 
        PR 24464

diff --git a/gas/testsuite/gas/s12z/bit-manip-invalid.d b/gas/testsuite/gas/s12z/bit-manip-invalid.d
index 571f435cd0672fd861f3e9e5b9b793e5a738980e..d16a8f5683e34f00bcd89d46eae5b6abd785b196 100644 (file)
--- a/gas/testsuite/gas/s12z/bit-manip-invalid.d
+++ b/gas/testsuite/gas/s12z/bit-manip-invalid.d
@@ -1,5 +1,5 @@
 #objdump: -d
-#name:    Test of disassembler behaviour by with invalid bit manipulation instructions
+#name:    Test of disassembler behaviour with invalid bit manipulation instructions
 #source:  bit-manip-invalid.s
 
 
@@ -17,3 +17,7 @@ Disassembly of section \.text:
    8:  03 65 12        brset d1, #4, \*\+18
    b:  01              nop
    c:  01              nop
+   d:  ec 44           bclr d0, #0
+   f:  ec 7c           bclr d0, #7
+  11:  ed 5d           bset d1, #3
+  13:  ed 7d           bset d1, #7

diff --git a/gas/testsuite/gas/s12z/bit-manip-invalid.s b/gas/testsuite/gas/s12z/bit-manip-invalid.s
index 6876ba84896c50263b97acce18f4933d889a9571..d0269953a5fb1a0e5901a187d747353a4b4c8f88 100644 (file)
--- a/gas/testsuite/gas/s12z/bit-manip-invalid.s
+++ b/gas/testsuite/gas/s12z/bit-manip-invalid.s
@@ -8,4 +8,8 @@
         nop
         DC.L 0x03651201
         nop
+       dc.w 0xEC44
+       dc.w 0xEC7C
+       dc.w 0xED5D
+       dc.w 0xED7D
 

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index b4f85d36ac1d0b4041d6176532d4820673f5f952..2d0229c0ca80ffa85f958a49ddb2ee0382739adb 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -3,6 +3,11 @@
         * s12z-opc.h: Add extern "C" bracketing to help
        users who wish to use this interface in c++ code.
 
+2019-04-24  John Darrington  <john@darrington.wattle.id.au>
+
+       * s12z-opc.c (bm_decode): Handle bit map operations with the
+       "reserved0" mode.
+
 2019-04-15  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 
        * arm-dis.c (coprocessor_opcodes): Document new %J and %K format

diff --git a/opcodes/s12z-opc.c b/opcodes/s12z-opc.c
index 1f02f5dc6a452a45fcd579f10d968832d586e43a..e40f90e43ff6da0a6ced6b3e215d71906159978b 100644 (file)
--- a/opcodes/s12z-opc.c
+++ b/opcodes/s12z-opc.c
@@ -1821,6 +1821,7 @@ bm_decode (struct mem_read_abstraction_base *mra,
   switch (mode)
     {
     case BM_REG_IMM:
+    case BM_RESERVED0:
       imm = (bm & 0x38) >> 3;
       operand[(*n_operands)++] = create_immediate_operand (imm);
       break;
@@ -1838,9 +1839,6 @@ bm_decode (struct mem_read_abstraction_base *mra,
     case BM_RESERVED1:
       operand[(*n_operands)++] = create_register_operand ((bm & 0x70) >> 4);
       break;
-    case BM_RESERVED0:
-      assert (0);
-      break;
     }
 }