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svstep calls SVSTATE_NEXT so needs svstate_pre_inc
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 1 Oct 2022 23:24:25 +0000 (00:24 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 1 Oct 2022 23:24:25 +0000 (00:24 +0100)
setvl no longer calls SVSTATE_NEXT so does not

src/openpower/decoder/isa/caller.py patch | blob | history

diff --git a/src/openpower/decoder/isa/caller.py b/src/openpower/decoder/isa/caller.py
index c8ef0baac2a18c2abb5fc6630b7dd5e244efce3e..c1610c4e682b05b98fba3bf8ea11ada1bc77bef4 100644 (file)
--- a/src/openpower/decoder/isa/caller.py
+++ b/src/openpower/decoder/isa/caller.py
@@ -1692,7 +1692,7 @@ class ISACaller(ISACallerHelper, ISAFPHelpers, StepLoop):
 
         # see if srcstep/dststep need skipping over masked-out predicate bits
         self.reset_remaps()
-        if (self.is_svp64_mode or ins_name in ['setvl', 'svstep',
+        if (self.is_svp64_mode or ins_name in ['svstep',
           'svremap', 'svstate']):
             yield from self.svstate_pre_inc()
         if self.is_svp64_mode: