clarify opcode table

diff --git a/openpower/sv/rfc/ls001.mdwn b/openpower/sv/rfc/ls001.mdwn
index 33072e9d9228af239988af8cf4e858fed92c23ed..dfef6fc40ad76809e1f867cff7fc5914b48154db 100644 (file)
--- a/openpower/sv/rfc/ls001.mdwn
+++ b/openpower/sv/rfc/ls001.mdwn
@@ -300,7 +300,7 @@ For each of EXT059 and EXT063:
   as of 08Sep2022
 
 \newpage{}
-# Potential Opcode allocation
+# Potential Opcode allocation solution
 
 There are unfortunately some inviolate requirements that directly place
 pressure on the EXT000-EXT063 (32-bit) opcode space to such a degree that
@@ -319,9 +319,9 @@ is based loosely around Public v3.1 EXT001 Encoding. [^ext001]
 
 | 0-5 | 6 | 7 | 8-31  | Description               |
 |-----|---|---|-------|---------------------------|
-| PO  | 0 | 0 | 0000  | `RESERVED1`               |
+| PO  | 0 | 0 | 0000  | new-suffix `RESERVED1`               |
 | PO  | 0 | 0 | !zero | new-suffix, scalar (SVP64Single) |
-| PO  | 1 | 0 | 0000  | `RESERVED2`               |
+| PO  | 1 | 0 | 0000  | new scalar-only word, or `RESERVED2`               |
 | PO  | 1 | 0 | !zero | old-suffix, scalar (SVP64Single) |
 | PO  | 0 | 1 | nnnn  | new-suffix, vector (SVP64)       |
 | PO  | 1 | 1 | nnnn  | old-suffix, vector (SVP64)       |
@@ -332,9 +332,11 @@ is based loosely around Public v3.1 EXT001 Encoding. [^ext001]
 * **bit 7** - defines whether the Suffix is Scalar-Prefixed or Vector-Prefixed
   (caveat: see bits 8-31)
 * **old-suffix** - the EXT000 to EXT063 32-bit Major opcodes of Power ISA 3.0
-* **new-suffix** - two **new** Major Opcode areas **exclusively**
+* **new scalar-only** - a **new** Major Opcode area **exclusively**
   for Scalar-only instructions that shall **never** be Prefixed by SVP64
-  (RESERVED2 EXT300-EXT363) and one that may (RESERVED1 EXT200-EXT263)
+  (RESERVED2 EXT300-EXT363) 
+* **new-suffix** - a **new** Major Opcode area (RESERVED1 EXT200-EXT263)
+  that **may** be Prefixed by SVP64 and SVP64Single
 * **0000** - all 24 bits bits 8-31 are zero (0x000000)
 * **!zero** - bits 8-31 may be any value *other* than zero (0x000001-0xffffff)
 * **nnnn** - bits 8-31 may be any value in the range 0x000000 to 0xffffff