Given we do not simulate a FIFO currently there are only two states
we can be in upon read: empty or full. Properly signal the latter.
Add and sort constants for states in the header file.
Committed by Jason Lowe-Power <power.jg@gmail.com>
case UART_FR:
data =
UART_FR_CTS | // Clear To Send
- (!term->dataAvailable() ? UART_FR_RXFE : 0) | // RX FIFO Empty
+ // Given we do not simulate a FIFO we are either empty or full.
+ (!term->dataAvailable() ? UART_FR_RXFE : UART_FR_RXFF) |
UART_FR_TXFE; // TX FIFO empty
DPRINTF(Uart,
static const int UART_DR = 0x000;
static const int UART_FR = 0x018;
static const int UART_FR_CTS = 0x001;
- static const int UART_FR_TXFE = 0x080;
static const int UART_FR_RXFE = 0x010;
+ static const int UART_FR_TXFF = 0x020;
+ static const int UART_FR_RXFF = 0x040;
+ static const int UART_FR_TXFE = 0x080;
static const int UART_IBRD = 0x024;
static const int UART_FBRD = 0x028;
static const int UART_LCRH = 0x02C;