+Sun Aug 16 13:52:00 1998 David Edelsohn <edelsohn@mhpcc.edu>
+
+ * rs6000.c (rs6000_stack_info): Use if == 0 for sizes.
+ (output_epilog): Use if != 0 for offset.
+ (rs6000_fatal_bad_address): Prepare for Intl.
+ * rs6000.h (rs6000_fatal_bad_address): Declare.
+ * rs6000.md (movsfcc, movdfcc): Use else if.
+ (elf_high): Use {liu|lis}.
+ (elf_low): Use {cal|la}. Remove %a template from old mnemonics.
+ (movsi): Use rs6000_fatal_bad_address.
+
Sun Aug 16 01:53:21 1998 Richard Henderson <rth@cygnus.com>
* reload.c (find_equiv_reg): Reject equivalences separated
info_ptr->fpmem_offset = 0;
/* Zero offsets if we're not saving those registers */
- if (!info_ptr->fp_size)
+ if (info_ptr->fp_size == 0)
info_ptr->fp_save_offset = 0;
- if (!info_ptr->gp_size)
+ if (info_ptr->gp_size == 0)
info_ptr->gp_save_offset = 0;
if (!info_ptr->lr_save_p)
+ (regs_ever_live[71] != 0) * 0x10
+ (regs_ever_live[72] != 0) * 0x8, reg_names[12]);
- /* If this is V.4, unwind the stack pointer after all of the loads have been done */
- if (sp_offset)
+ /* If this is V.4, unwind the stack pointer after all of the loads
+ have been done */
+ if (sp_offset != 0)
asm_fprintf (file, "\t{cal|la} %s,%d(%s)\n",
reg_names[1], sp_offset, reg_names[1]);
else if (sp_reg != 1)
}
#endif /* USING_SVR4_H */
+\f
+void
+rs6000_fatal_bad_address (op)
+ rtx op;
+{
+ fatal_insn ("bad address", op);
+}
emit_insn (gen_negdf2 (temp, temp));
emit_insn (gen_fseldfsf4 (operands[0], temp, operands[0], operands[3]));
}
- if (code == NE)
+ else if (code == NE)
{
emit_insn (gen_negdf2 (temp, temp));
emit_insn (gen_fseldfsf4 (operands[0], temp, operands[3], operands[0]));
emit_insn (gen_negsf2 (temp, temp));
emit_insn (gen_fselsfsf4 (operands[0], temp, operands[0], operands[3]));
}
- if (code == NE)
+ else if (code == NE)
{
emit_insn (gen_negsf2 (temp, temp));
emit_insn (gen_fselsfsf4 (operands[0], temp, operands[3], operands[0]));
emit_insn (gen_negdf2 (temp, temp));
emit_insn (gen_fseldfdf4 (operands[0], temp, operands[0], operands[3]));
}
- if (code == NE)
+ else if (code == NE)
{
emit_insn (gen_negdf2 (temp, temp));
emit_insn (gen_fseldfdf4 (operands[0], temp, operands[3], operands[0]));
emit_insn (gen_negsf2 (temp, temp));
emit_insn (gen_fselsfdf4 (operands[0], temp, operands[0], operands[3]));
}
- if (code == NE)
+ else if (code == NE)
{
emit_insn (gen_negsf2 (temp, temp));
emit_insn (gen_fselsfdf4 (operands[0], temp, operands[3], operands[0]));
[(set (match_operand:SI 0 "register_operand" "=b")
(high:SI (match_operand 1 "" "")))]
"TARGET_ELF && !TARGET_64BIT"
- "{cau|addis} %0,0,%1@ha")
+ "{liu|lis} %0,%1@ha")
(define_insn "elf_low"
[(set (match_operand:SI 0 "register_operand" "=r")
(lo_sum:SI (match_operand:SI 1 "register_operand" "b")
(match_operand 2 "" "")))]
"TARGET_ELF && !TARGET_64BIT"
- "{cal %0,%a2@l(%1)|addi %0,%1,%2@l}")
+ "{cal|la} %0,%2@l(%1)")
;; Set up a register with a value from the GOT table
DONE;
}
else
- fatal_insn (\"bad address\", operands[1]);
+ rs6000_fatal_bad_address (operands[1]);
}
if ((!TARGET_WINDOWS_NT || DEFAULT_ABI != ABI_NT)
switch (which_alternative)
{
default:
- abort();
+ abort ();
case 0:
/* We normally copy the low-numbered register first. However, if
the first register operand 0 is the same as the second register of
switch (which_alternative)
{
default:
- abort();
+ abort ();
case 0:
/* We normally copy the low-numbered register first. However, if
the first register operand 0 is the same as the second register of
switch (which_alternative)
{
default:
- abort();
+ abort ();
case 0:
/* We normally copy the low-numbered register first. However, if
the first register operand 0 is the same as the second register of
switch (which_alternative)
{
default:
- abort();
+ abort ();
case 0:
/* We normally copy the low-numbered register first. However, if
the first register operand 0 is the same as the second register of