Added english language description, spaces and brackets for lhzx instruction

diff --git a/openpower/isa/fixedload.mdwn b/openpower/isa/fixedload.mdwn
index 8ab40cb3505dc3ef085559fca9c32aa4024ffc60..d1b69765b4928664756b9be0cc86a358bbd61b71 100644 (file)
--- a/openpower/isa/fixedload.mdwn
+++ b/openpower/isa/fixedload.mdwn
@@ -156,6 +156,12 @@ Pseudo-code:
     EA <- b + (RB)
     RT <- ([0] * (XLEN-16)) || MEM(EA, 2)
 
+Description:
+
+    Let the effective address (EA) be the sum
+    (RA|0)+ (RB). The halfword in storage addressed by
+    EA is loaded into RT 48:63. RT 0:47 are set to 0.
+
 Special Registers Altered:
 
     None