Fixed a pcrel relocte miss between different section in the same module.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index e1d580248ca046c38b8548113eae939e6dc7016d..36c34e7defd538a7532c79ba47209d7a947e4816 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,9 @@
+2004-11-29  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
+
+       * config/tc-m32r.c (md_pcrel_from_section): Fixed a pcrel relocte
+       miss between different section in the same module.
+       (tc_gen_reloc): Likewise.
+
 2004-11-25  Theodore A. Roth  <troth@openavr.org>
 
        * gas/config/tc-avr.c (mcu_types): Add support for atmega165,

diff --git a/gas/config/tc-m32r.c b/gas/config/tc-m32r.c
index 207ac0194335843729c1c9db5ccbade3295bf098..f7a9537e2ffc47fba53567a8a7071f893036ba38 100644 (file)
--- a/gas/config/tc-m32r.c
+++ b/gas/config/tc-m32r.c
@@ -1999,6 +1999,12 @@ md_pcrel_from_section (fixP, sec)
           || S_IS_EXTERNAL (fixP->fx_addsy)
           || S_IS_WEAK (fixP->fx_addsy)))
     {
+      if (S_GET_SEGMENT (fixP->fx_addsy) != sec
+          && S_IS_DEFINED (fixP->fx_addsy)
+          && ! S_IS_EXTERNAL (fixP->fx_addsy)
+          && ! S_IS_WEAK (fixP->fx_addsy))
+        return fixP->fx_offset;
+
       /* The symbol is undefined (or is defined but not in this section).
         Let the linker figure it out.  */
       return 0;
@@ -2488,7 +2494,7 @@ printf(" => %s\n",reloc->howto->name);
            && ! S_IS_EXTERNAL(fixP->fx_addsy)
            && ! S_IS_WEAK(fixP->fx_addsy))
     /* Already used fx_offset in the opcode field itseld.  */
-    reloc->addend  = 0;
+    reloc->addend  = fixP->fx_offset;
   else
     reloc->addend  = fixP->fx_addnumber;
  

diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 658754fd4f680dd7d7623cc52493843e267e212d..e8591bdd71bd6c3d42f4dcc71ebf09b42b388404 100644 (file)
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,11 @@
+2004-11-29  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
+
+       * testsuite/gas/m32r/rela-1.s: New test.
+       * testsuite/gas/m32r/rela-1.d: Expected disassembly.
+       * testsuite/gas/m32r/m32r.exp: Run the new test.
+       * testsuite/gas/m32r/relax-1.d: Update for fixed pcrel reloc
+       generation.
+
 2004-11-27  Richard Earnshaw  <rearnsha@arm.com>
 
        * gas/testsuite/arm/thumbv6.d (setend): Remove stray tab at end

diff --git a/gas/testsuite/gas/m32r/m32r.exp b/gas/testsuite/gas/m32r/m32r.exp
index 353f738a3f4f9b2fcba743bcb7df0f3d1a3c3b41..32e376d30cae5de75aa97353cd9207f25975e758 100644 (file)
--- a/gas/testsuite/gas/m32r/m32r.exp
+++ b/gas/testsuite/gas/m32r/m32r.exp
@@ -7,4 +7,5 @@ if [istarget m32r*-*-*] {
     run_dump_test "fslot"
     run_dump_test "signed-relocs"
     run_dump_test "seth"
+    run_dump_test "rela-1"
 }

diff --git a/gas/testsuite/gas/m32r/rela-1.d b/gas/testsuite/gas/m32r/rela-1.d
new file mode 100644 (file)
index 0000000..9b2dcce
--- /dev/null
+++ b/gas/testsuite/gas/m32r/rela-1.d
@@ -0,0 +1,24 @@
+#as:
+#objdump: -dr
+#name: rela-1
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+0000 <.text>:
+   0:  fe 00 00 00     bl 0 <.text>
+                       0: R_M32R_26_PCREL_RELA .text2\+0x8
+   4:  fe 00 00 00     bl 4 <.text\+0x4>
+                       4: R_M32R_26_PCREL_RELA .text2\+0x8
+   8:  7e 00 f0 00     bl 8 <.text\+0x8> \|\| nop
+                       8: R_M32R_10_PCREL_RELA .text2\+0x8
+   c:  b0 90 00 00     bnez r0,c <.text\+0xc>
+                       c: R_M32R_18_PCREL_RELA .text2\+0x8
+  10:  10 80 7e 00     mv r0,r0 -> bl 10 <.text\+0x10>
+                       12: R_M32R_10_PCREL_RELA        .text2\+0x8
+Disassembly of section .text2:
+
+0+0000 <label-0x8>:
+   0:  70 00 70 00     nop -> nop
+   4:  70 00 70 00     nop -> nop

diff --git a/gas/testsuite/gas/m32r/rela-1.s b/gas/testsuite/gas/m32r/rela-1.s
new file mode 100644 (file)
index 0000000..4759a2c
--- /dev/null
+++ b/gas/testsuite/gas/m32r/rela-1.s
@@ -0,0 +1,18 @@
+
+       .section .text
+       bl      label
+       bl.l    label
+       bl.s    label
+       bnez    r0,label
+       mv      r0,r0
+       bl.s    label
+
+       .section .text2, "ax" 
+       nop
+       nop
+       nop
+       nop
+label:
+       .end
+
+

diff --git a/gas/testsuite/gas/m32r/relax-1.d b/gas/testsuite/gas/m32r/relax-1.d
index 64f906ce88230974dd45ef09983f220fa5732e98..36570d1962d379baa79c66549fb78da0d18833c1 100644 (file)
--- a/gas/testsuite/gas/m32r/relax-1.d
+++ b/gas/testsuite/gas/m32r/relax-1.d
@@ -14,5 +14,5 @@ Disassembly of section .text:
 Disassembly of section .branch:
 
 0* <branch>:
- *0:   ff 00 00 01     bra 4 <Work>
-[      ]*0: R_M32R_26_PCREL_RELA       .text
+ *0:   ff 00 00 00     bra 0 <branch>
+[      ]*0: R_M32R_26_PCREL_RELA       .text\+0x4