radeonsi: add a tess+GS hang workaround for VI dGPUs
authorMarek Olšák <marek.olsak@amd.com>
Tue, 29 Nov 2016 20:19:52 +0000 (21:19 +0100)
committerMarek Olšák <marek.olsak@amd.com>
Thu, 1 Dec 2016 01:16:51 +0000 (02:16 +0100)
ported from Vulkan

Cc: 13.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
src/gallium/drivers/radeonsi/si_state_draw.c

index cba5a03bebef07f5e3fc4acda320d3c4288435ca..cae19dc5a7a37f6ded115dd08b7da500620e8c85 100644 (file)
@@ -296,10 +296,18 @@ static unsigned si_get_ia_multi_vgt_param(struct si_context *sctx,
 
                /* Needed for 028B6C_DISTRIBUTION_MODE != 0 */
                if (sctx->screen->has_distributed_tess) {
-                       if (sctx->gs_shader.cso)
+                       if (sctx->gs_shader.cso) {
                                partial_es_wave = true;
-                       else
+
+                               /* GPU hang workaround. */
+                               if (sctx->b.family == CHIP_TONGA ||
+                                   sctx->b.family == CHIP_FIJI ||
+                                   sctx->b.family == CHIP_POLARIS10 ||
+                                   sctx->b.family == CHIP_POLARIS11)
+                                       partial_vs_wave = true;
+                       } else {
                                partial_vs_wave = true;
+                       }
                }
        }