radv/ac: realign SI workaround with radeonsi.

This ports: da7453666ae
radeonsi: don't apply the Z export bug workaround to Hainan
to radv.

Just noticed in passing.

Fixes: f4e499ec7 (radv: add initial non-conformant radv vulkan driver)
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 9a69066afa209c40f936384fb7097115fbde3ed2..a427f484b56c69264ad4bc8b241879221cfb21f9 100644 (file)
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -5815,10 +5815,11 @@ si_export_mrt_z(struct nir_to_llvm_context *ctx,
                args.enabled_channels |= 0x4;
        }
 
-       /* SI (except OLAND) has a bug that it only looks
+       /* SI (except OLAND and HAINAN) has a bug that it only looks
         * at the X writemask component. */
        if (ctx->options->chip_class == SI &&
-           ctx->options->family != CHIP_OLAND)
+           ctx->options->family != CHIP_OLAND &&
+           ctx->options->family != CHIP_HAINAN)
                args.enabled_channels |= 0x1;
 
        ac_build_export(&ctx->ac, &args);