ARM: Decode 16 bit thumb PC relative memory instructions.

diff --git a/src/arch/arm/isa/decoder/thumb.isa b/src/arch/arm/isa/decoder/thumb.isa
index 580232b1db2277e50b7acc0f8b30430b8f873f7f..56dbcfe2890173849dfdacbfc8267fef36db33cb 100644 (file)
--- a/src/arch/arm/isa/decoder/thumb.isa
+++ b/src/arch/arm/isa/decoder/thumb.isa
@@ -89,7 +89,7 @@
                 0xc, 0xd: WarnUnimpl::bx();
                 0xe, 0xf: WarnUnimpl::blx(); //register
             }
-            0x2, 0x3: WarnUnimpl::ldr();
+            0x2, 0x3: Thumb16MemLit::thumb16MemLit();
             default: Thumb16MemReg::thumb16MemReg();
         }
         0x3, 0x4: Thumb16MemImm::thumb16MemImm();

diff --git a/src/arch/arm/isa/formats/mem.isa b/src/arch/arm/isa/formats/mem.isa
index edefb3325c4a410ccc93bb24320ec643dd6d79e5..2935890c2187728f660e6546a6fe07163fdcb879 100644 (file)
--- a/src/arch/arm/isa/formats/mem.isa
+++ b/src/arch/arm/isa/formats/mem.isa
@@ -450,6 +450,16 @@ def format Thumb16MemImm() {{
     decode_block = decode % classNames
 }};
 
+def format Thumb16MemLit() {{
+    decode_block = '''
+    {
+        const uint32_t rt = bits(machInst, 10, 8);
+        const uint32_t imm8 = bits(machInst, 7, 0);
+        return new %s(machInst, rt, INTREG_PC, true, imm8 << 2);
+    }
+    ''' % loadImmClassName(False, True, False)
+}};
+
 def format ArmLoadMemory(memacc_code, ea_code = {{ EA = Rn + disp; }},
                      mem_flags = [], inst_flags = []) {{
     ea_code = ArmGenericCodeSubs(ea_code)