Fix unrecognizable insn of pr92865.

gcc/
    PR target/92865
    * config/i386/i386-expand.c (ix86_valid_mask_cmp_mode): Enable
    integer mask cmov when available even with TARGET_XOP.

gcc/testsuite
    * gcc.target/i386/pr92865-1.c: New test.

From-SVN: r279214

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index fedf736bdab231387fe294fbe1dd316779a35140..6ea6db926e9083a49b84076fb8d553cb89abbe74 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2019-12-11  Hongtao Liu  <hongtao.liu@intel.com>
+
+       PR target/92865
+       * config/i386/i386-expand.c (ix86_valid_mask_cmp_mode): Enable
+       integer mask cmov when available even with TARGET_XOP.
+
 2019-12-10  Jakub Jelinek  <jakub@redhat.com>
 
        PR tree-optimization/92891

diff --git a/gcc/config/i386/i386-expand.c b/gcc/config/i386/i386-expand.c
index ff3c24cc5b72b10d20ef53765029a679770659b3..cbf4eb7b487fa3a072163f7367007fe0b78f3b89 100644 (file)
--- a/gcc/config/i386/i386-expand.c
+++ b/gcc/config/i386/i386-expand.c
@@ -3428,7 +3428,7 @@ static bool
 ix86_valid_mask_cmp_mode (machine_mode mode)
 {
   /* XOP has its own vector conditional movement.  */
-  if (TARGET_XOP)
+  if (TARGET_XOP && !TARGET_AVX512F)
     return false;
 
   /* AVX512F is needed for mask operation.  */

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 37de7de32f3051276cda01602bbe1bcde5af5434..92eea2da375297e43d79cc0e559fc587f9c4a69d 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2019-12-11  Hongtao Liu  <hongtao.liu@intel.com>
+
+       * gcc.target/i386/pr92865-1.c: New test.
+
 2019-12-10  Jakub Jelinek  <jakub@redhat.com>
 
        PR tree-optimization/92891

diff --git a/gcc/testsuite/gcc.target/i386/pr92865-1.c b/gcc/testsuite/gcc.target/i386/pr92865-1.c
new file mode 100644 (file)
index 0000000..49b5778
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr92865-1.c
@@ -0,0 +1,67 @@
+/* PR target/92865 */
+/* { dg-do compile } */
+/* { dg-options "-Ofast -mavx512f -mavx512bw -mxop" } */
+/* { dg-final { scan-assembler-times "vpcmp\[bwdq\]\[\t ]" 4 } } */
+/* { dg-final { scan-assembler-times "vpcmpu\[bwdq\]\[\t ]" 4 } } */
+/* { dg-final { scan-assembler-times "vmovdq\[au\]8\[\t ]" 4 } } */
+/* { dg-final { scan-assembler-times "vmovdq\[au\]16\[\t ]" 4 } } *
+/* { dg-final { scan-assembler-times "vmovdq\[au\]32\[\t ]" 4 } } */
+/* { dg-final { scan-assembler-times "vmovdq\[au\]64\[\t ]" 4 } } */
+
+extern char arraysb[64];
+extern short arraysw[32];
+extern int arraysd[16];
+extern long long arraysq[8];
+
+extern unsigned char arrayub[64];
+extern unsigned short arrayuw[32];
+extern unsigned int arrayud[16];
+extern unsigned long long arrayuq[8];
+
+int f1(char a)
+{
+  for (int i = 0; i < 64; i++)
+    arraysb[i] = arraysb[i] >= a;
+}
+
+int f2(short a)
+{
+  for (int i = 0; i < 32; i++)
+    arraysw[i] = arraysw[i] >= a;
+}
+
+int f3(int a)
+{
+  for (int i = 0; i < 16; i++)
+    arraysd[i] = arraysd[i] >= a;
+}
+
+int f4(long long a)
+{
+  for (int i = 0; i < 8; i++)
+    arraysq[i] = arraysq[i] >= a;
+}
+
+int f5(unsigned char a)
+{
+  for (int i = 0; i < 64; i++)
+    arrayub[i] = arrayub[i] >= a;
+}
+
+int f6(unsigned short a)
+{
+  for (int i = 0; i < 32; i++)
+    arrayuw[i] = arrayuw[i] >= a;
+}
+
+int f7(unsigned int a)
+{
+  for (int i = 0; i < 16; i++)
+    arrayud[i] = arrayud[i] >= a;
+}
+
+int f8(unsigned long long a)
+{
+  for (int i = 0; i < 8; i++)
+    arrayuq[i] = arrayuq[i] >= a;
+}