r500 RS unit setup

diff --git a/src/mesa/drivers/dri/r300/r300_cmdbuf.c b/src/mesa/drivers/dri/r300/r300_cmdbuf.c
index a92bb87d7d0622b344748cb1613fa5cf93db489e..3cfb7cf2cda6abce6e4383408cf5877c80702718 100644 (file)
--- a/src/mesa/drivers/dri/r300/r300_cmdbuf.c
+++ b/src/mesa/drivers/dri/r300/r300_cmdbuf.c
@@ -399,10 +399,6 @@ void r300InitCmdBuf(r300ContextPtr r300)
        if (is_r500) {
                ALLOC_STATE(r500fp, variable, R300_FPI_CMDSIZE, 0);
                r300->hw.r500fp.cmd[R300_FPI_CMD_0] = cmdr500fp(0, 0);
-       }
-
-       if (is_r500) {
-
        } else {
                ALLOC_STATE(fp, always, R300_FP_CMDSIZE, 0);
                r300->hw.fp.cmd[R300_FP_CMD_0] = cmdpacket0(R300_PFS_CNTL_0, 3);

diff --git a/src/mesa/drivers/dri/r300/r300_reg.h b/src/mesa/drivers/dri/r300/r300_reg.h
index d640d8b7e7d5ddcd9e3efe2d6e55d213a0111985..2822b1d4c3aa81c8c0b64e7e12540afadd068fcb 100644 (file)
--- a/src/mesa/drivers/dri/r300/r300_reg.h
+++ b/src/mesa/drivers/dri/r300/r300_reg.h
@@ -673,12 +673,12 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #define R500_RS_IP_13                                  0x40A8
 #define R500_RS_IP_14                                  0x40AC
 #define R500_RS_IP_15                                  0x40B0
-#define R500_RS_IP_TEX_PTR_S_SHIFT                     0\r
-#define R500_RS_IP_TEX_PTR_T_SHIFT                     6\r
-#define R500_RS_IP_TEX_PTR_R_SHIFT                     12\r
-#define R500_RS_IP_TEX_PTR_Q_SHIFT                     18\r
-#define R500_RS_IP_COL_PTR_SHIFT                       24\r
-#define R500_RS_IP_COL_FMT_SHIFT                       27\r
+#define R500_RS_IP_TEX_PTR_S_SHIFT                     0
+#define R500_RS_IP_TEX_PTR_T_SHIFT                     6
+#define R500_RS_IP_TEX_PTR_R_SHIFT                     12
+#define R500_RS_IP_TEX_PTR_Q_SHIFT                     18
+#define R500_RS_IP_COL_PTR_SHIFT                       24
+#define R500_RS_IP_COL_FMT_SHIFT                       27
 #define R500_RS_IP_COL_FMT_RGBA                        (0 << 27)
 #define R500_RS_IP_COL_FMT_RGB0                        (1 << 27)
 #define R500_RS_IP_COL_FMT_RGB1                        (2 << 27)
@@ -692,7 +692,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #define R500_RS_IP_COL_FMT_1111                        (10 << 27)
 /* gap */
 #define R500_RS_IP_OFFSET_DIS                          (0 << 31)
-#define R500_RS_IP_OFFSET_EN                           (1 << 31)\r
+#define R500_RS_IP_OFFSET_EN                           (1 << 31)
 
 /* gap */
 
@@ -1138,10 +1138,10 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #      define R300_RS_COL_FMT_111A                     8\r
 #      define R300_RS_COL_FMT_1110                     9\r
 #      define R300_RS_COL_FMT_1111                     10\r
-#      define R300_RS_SEL_S(x)                         (x << 13)\r
-#      define R300_RS_SEL_T(x)                         (x << 16)\r
-#      define R300_RS_SEL_R(x)                         (x << 19)\r
-#      define R300_RS_SEL_Q(x)                         (x << 22)\r
+#      define R300_RS_SEL_S(x)                         (x << 13)
+#      define R300_RS_SEL_T(x)                         (x << 16)
+#      define R300_RS_SEL_R(x)                         (x << 19)
+#      define R300_RS_SEL_Q(x)                         (x << 22)
 #      define R300_RS_SEL_C0                           0\r
 #      define R300_RS_SEL_C1                           1\r
 #      define R300_RS_SEL_C2                           2\r

diff --git a/src/mesa/drivers/dri/r300/r300_state.c b/src/mesa/drivers/dri/r300/r300_state.c
index d2fd04a550fc78ee8896e5d8f4a998106c61022f..04ee59da63db38406b4d1c0b0cbc0cafcbb9315c 100644 (file)
--- a/src/mesa/drivers/dri/r300/r300_state.c
+++ b/src/mesa/drivers/dri/r300/r300_state.c
@@ -1609,9 +1609,9 @@ static void r500SetupRSUnit(GLcontext * ctx)
        /* I'm still unsure if these are needed */
        GLuint interp_magic[8] = {
                0x00,
-               R300_RS_COL_PTR(1),
-               R300_RS_COL_PTR(2),
-               R300_RS_COL_PTR(3),
+               1 << 24,
+               2 << 24,
+               3 << 24,
                0x00,
                0x00,
                0x00,
@@ -1658,14 +1658,20 @@ static void r500SetupRSUnit(GLcontext * ctx)
        }
 
        for (i = 0; i < ctx->Const.MaxTextureUnits; i++) {
-               r300->hw.ri.cmd[R300_RI_INTERP_0 + i] = 0 | R300_RS_SEL_T(1) | R300_RS_SEL_R(2) | R300_RS_SEL_Q(3) | (in_texcoords << R300_RS_INTERP_SRC_SHIFT)
-                   | interp_magic[i];
+         
+         //            r300->hw.ri.cmd[R300_RI_INTERP_0 + i] = 0 | R300_RS_SEL_T(1) | R300_RS_SEL_R(2) | R300_RS_SEL_Q(3) | (in_texcoords << R300_RS_INTERP_SRC_SHIFT)
+         
+               r300->hw.ri.cmd[R300_RI_INTERP_0 + i] = (0 << R500_TEX_PTR_S_SHIFT) | 
+                       (1 << R500_TEX_PTR_T_SHIFT) |
+                       (2 << R500_TEX_PTR_R_SHIFT) | 
+                       (3 << R500_TEX_PTR_Q_SHIFT) |
+                       (in_texcoords << 0) | interp_magic[i];
 
                r300->hw.rr.cmd[R300_RR_ROUTE_0 + fp_reg] = 0;
                if (InputsRead & (FRAG_BIT_TEX0 << i)) {
                        //assert(r300->state.texture.tc_count != 0);
-                       r300->hw.rr.cmd[R300_RR_ROUTE_0 + fp_reg] |= R300_RS_ROUTE_ENABLE | i   /* source INTERP */
-                           | (fp_reg << R300_RS_ROUTE_DEST_SHIFT);
+                       r300->hw.rr.cmd[R300_RR_ROUTE_0 + fp_reg] |= R500_RS_INST_TEX_CN_WRITE | i      /* source INTERP */
+                           | (fp_reg << R500_RS_INST_TEX_ADDR_SHIFT);
                        high_rr = fp_reg;
 
                        /* Passing invalid data here can lock the GPU. */
@@ -1684,7 +1690,8 @@ static void r500SetupRSUnit(GLcontext * ctx)
 
        if (InputsRead & FRAG_BIT_COL0) {
                if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_COL0, _TNL_ATTRIB_COLOR0)) {
-                       r300->hw.rr.cmd[R300_RR_ROUTE_0] |= 0 | R300_RS_ROUTE_0_COLOR | (fp_reg++ << R300_RS_ROUTE_0_COLOR_DEST_SHIFT);
+                       //                      r300->hw.rr.cmd[R300_RR_ROUTE_0] |= 0 | R300_RS_ROUTE_0_COLOR | (fp_reg++ << R300_RS_ROUTE_0_COLOR_DEST_SHIFT);
+                       r300->hw.rr.cmd[R300_RR_ROUTE_0] |= 0 | R500_RS_INST_COL_CN_WRITE | (fp_reg++ << R500_RS_INST_COL_COL_ADDR_SHIFT);
                        InputsRead &= ~FRAG_BIT_COL0;
                        col_interp_nr++;
                } else {
@@ -1694,7 +1701,8 @@ static void r500SetupRSUnit(GLcontext * ctx)
 
        if (InputsRead & FRAG_BIT_COL1) {
                if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_COL1, _TNL_ATTRIB_COLOR1)) {
-                       r300->hw.rr.cmd[R300_RR_ROUTE_1] |= R300_RS_ROUTE_1_UNKNOWN11 | R300_RS_ROUTE_1_COLOR1 | (fp_reg++ << R300_RS_ROUTE_1_COLOR1_DEST_SHIFT);
+                       //                      r300->hw.rr.cmd[R300_RR_ROUTE_1] |= R300_RS_ROUTE_1_UNKNOWN11 | R300_RS_ROUTE_1_COLOR1 | (fp_reg++ << R300_RS_ROUTE_1_COLOR1_DEST_SHIFT);
+                       r300->hw.rr.cmd[R300_RR_ROUTE_1] |= (1 << 12) | R500_RS_INST_COL_CN_WRITER300_RS_ROUTE_1_UNKNOWN11 |  (fp_reg++ << R500_RS_INST_COL_COL_ADDR_SHIFT);
                        InputsRead &= ~FRAG_BIT_COL1;
                        if (high_rr < 1)
                                high_rr = 1;
@@ -1706,7 +1714,7 @@ static void r500SetupRSUnit(GLcontext * ctx)
 
        /* Need at least one. This might still lock as the values are undefined... */
        if (in_texcoords == 0 && col_interp_nr == 0) {
-               r300->hw.rr.cmd[R300_RR_ROUTE_0] |= 0 | R300_RS_ROUTE_0_COLOR | (fp_reg++ << R300_RS_ROUTE_0_COLOR_DEST_SHIFT);
+               r300->hw.rr.cmd[R300_RR_ROUTE_0] |= 0 | R500_RS_INST_COL_CN_WRITE | (fp_reg++ << R500_RS_INST_COL_COL_ADDR_SHIFT);
                col_interp_nr++;
        }