pa.c (output_move_double): Handle loading a general register from a scaled indexed...

        * pa.c (output_move_double): Handle loading a general register
        from a scaled indexed memory address.
        * pa.md (movdf, movdi): Allow scaled loads into general registers.

From-SVN: r14073

diff --git a/gcc/config/pa/pa.c b/gcc/config/pa/pa.c
index 95b6c00dc811f29c7d1c3fac052a03bc4516a4b2..3515e22b312c9384e78112325aa7377579b276ac 100644 (file)
--- a/gcc/config/pa/pa.c
+++ b/gcc/config/pa/pa.c
@@ -1662,6 +1662,35 @@ output_move_double (operands)
              return "ldw -4(0,%1),%R0\n\tldws,mb -8(0,%1),%0";
            }
        }
+      else if (GET_CODE (addr) == PLUS
+              && GET_CODE (XEXP (addr, 0)) == MULT)
+       {
+         rtx high_reg = gen_rtx (SUBREG, SImode, operands[0], 0);
+
+         if (!reg_overlap_mentioned_p (high_reg, addr))
+           {
+             rtx xoperands[3];
+
+             xoperands[0] = high_reg;
+             xoperands[1] = XEXP (addr, 1);
+             xoperands[2] = XEXP (XEXP (addr, 0), 0);
+             xoperands[3] = XEXP (XEXP (addr, 0), 1);
+             output_asm_insn ("sh%O3addl %2,%1,%0", xoperands);
+             return "ldw 4(0,%0),%R0\n\tldw 0(0,%0),%0";
+           }
+         else
+           {
+             rtx xoperands[3];
+
+             xoperands[0] = high_reg;
+             xoperands[1] = XEXP (addr, 1);
+             xoperands[2] = XEXP (XEXP (addr, 0), 0);
+             xoperands[3] = XEXP (XEXP (addr, 0), 1);
+             output_asm_insn ("sh%O3addl %2,%1,%R0", xoperands);
+             return "ldw 0(0,%R0),%0\n\tldw 4(0,%R0),%R0";
+           }
+          
+       }
     }
 
   /* If an operand is an unoffsettable memory ref, find a register

diff --git a/gcc/config/pa/pa.md b/gcc/config/pa/pa.md
index 3ac0bece7dbd7eba436a5201b8717779b4e58c5e..d39709fd87c0e220cbe1adb0a39534ecefe3a0f7 100644 (file)
--- a/gcc/config/pa/pa.md
+++ b/gcc/config/pa/pa.md
@@ -2234,7 +2234,7 @@
   [(set (match_operand:DF 0 "reg_or_nonsymb_mem_operand"
                          "=f,*r,RQ,?o,?Q,f,*r,*r")
        (match_operand:DF 1 "reg_or_0_or_nonsymb_mem_operand"
-                         "fG,*rG,f,*r,*r,RQ,o,Q"))]
+                         "fG,*rG,f,*r,*r,RQ,o,RQ"))]
   "(register_operand (operands[0], DFmode)
     || reg_or_0_operand (operands[1], DFmode))
    && ! (GET_CODE (operands[1]) == CONST_DOUBLE
@@ -2425,7 +2425,7 @@
   [(set (match_operand:DI 0 "reg_or_nonsymb_mem_operand"
                          "=r,o,Q,r,r,r,f,f,*TR")
        (match_operand:DI 1 "general_operand"
-                         "rM,r,r,o,Q,i,fM,*TR,f"))]
+                         "rM,r,r,o*R,Q,i,fM,*TR,f"))]
   "(register_operand (operands[0], DImode)
     || reg_or_0_operand (operands[1], DImode))
    && ! TARGET_SOFT_FLOAT"