SMLALL, SMLSLL, UMLALL and UMLSLL have the same format.
USMLALL and SUMLALL allow the same operand types as those
instructions, except that SUMLALL does not have the multi-vector
x multi-vector forms (which would be redundant with USMLALL).
case AARCH64_OPND_SVE_Zn_INDEX:
case AARCH64_OPND_SME_Zm_INDEX1:
case AARCH64_OPND_SME_Zm_INDEX2:
+ case AARCH64_OPND_SME_Zm_INDEX3_1:
case AARCH64_OPND_SME_Zm_INDEX3_2:
case AARCH64_OPND_SME_Zm_INDEX3_10:
+ case AARCH64_OPND_SME_Zm_INDEX4_1:
+ case AARCH64_OPND_SME_Zm_INDEX4_10:
case AARCH64_OPND_SME_Zn_INDEX1_16:
case AARCH64_OPND_SME_Zn_INDEX2_15:
case AARCH64_OPND_SME_Zn_INDEX2_16:
info->imm.value = val;
break;
+ case AARCH64_OPND_SME_ZA_array_off1x4:
case AARCH64_OPND_SME_ZA_array_off2x2:
+ case AARCH64_OPND_SME_ZA_array_off2x4:
case AARCH64_OPND_SME_ZA_array_off3_0:
case AARCH64_OPND_SME_ZA_array_off3_5:
case AARCH64_OPND_SME_ZA_array_off3x2:
--- /dev/null
+#as: -march=armv8-a
+#source: sme2-13-invalid.s
+#error_output: sme2-13-invalid.l
--- /dev/null
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected a ZA array vector at operand 1 -- `smlall 0,z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 2 -- `smlall za\.s\[w8,0:3\],0,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `smlall za\.s\[w8,0:3\],z0\.b,0'
+[^ :]+:[0-9]+: Error: expected 'za' rather than a ZA tile at operand 1 -- `smlall za0\.s\[w8,0:3\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected 'za' rather than a ZA tile at operand 1 -- `smlall za0h\.s\[w8,0:3\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.s\[w7,0:3\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.s\[w12,0:3\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.s\[w8,0\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.s\[w8,0:1\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.s\[w8,0:2\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.s\[w8,0,vgx4\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: unexpected vector group size at operand 1 -- `smlall za\.s\[w8,0:3,vgx2\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: unexpected vector group size at operand 1 -- `smlall za\.s\[w8,0:3,vgx4\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.s\[w8,1:4\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.s\[w8,2:5\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.s\[w8,3:6\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 12 at operand 1 -- `smlall za\.s\[w8,16:19\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.s\[w8,0:3\],z0\.b,z16\.b\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 15 at operand 3 -- `smlall za\.s\[w8,0:3\],z0\.b,z0\.b\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 15 at operand 3 -- `smlall za\.s\[w8,0:3\],z0\.b,z0\.b\[16\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `smlall za\.s\[w8,0:3\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: smlall za\.d\[w8, 0:3\], z0\.h, z0\.h\[0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `smlall za\.s\[w8,0:3\],z0\.s,z0\.s\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: smlall za\.s\[w8, 0:3\], z0\.b, z0\.b\[0\]
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.s\[w7,0:3\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.s\[w12,0:3\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.s\[w8,0:1\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.s\[w8,0:2\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `smlall za\.s\[w8,0:3,vgx4\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.s\[w8,1:4\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.s\[w8,2:5\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.s\[w8,3:6\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.s\[w8,8:11\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.s\[w8,0:3\],{z1\.b-z2\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z16\.b\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 15 at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 15 at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[16\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.s\[w7,0:3\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.s\[w12,0:3\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.s\[w8,0:1\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.s\[w8,0:2\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `smlall za\.s\[w8,0:3,vgx2\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.s\[w8,1:4\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.s\[w8,2:5\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.s\[w8,3:6\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.s\[w8,8:11\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.s\[w8,0:3\],{z1\.b-z4\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.s\[w8,0:3\],{z2\.b-z5\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.s\[w8,0:3\],{z3\.b-z6\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z16\.b\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 15 at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 15 at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[16\]'
+[^ :]+:[0-9]+: Error: unexpected vector group size at operand 1 -- `smlall za\.s\[w8,0:3,vgx2\],z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: unexpected vector group size at operand 1 -- `smlall za\.s\[w8,0:3,vgx4\],z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 12 at operand 1 -- `smlall za\.s\[w8,16:19\],z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.s\[w8,0:3\],z0\.b,z16\.b'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `smlall za\.s\[w8,0:3,vgx4\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.s\[w8,8:11\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `smlall za\.s\[w8,0:3\],{z0\.b-z2\.b},z0\.b'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z16\.b'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `smlall za\.s\[w8,0:3,vgx2\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.s\[w8,8:11\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z16\.b'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `smlall za\.s\[w8,0:3,vgx4\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.s\[w8,8:11\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.s\[w8,0:3\],{z1\.b-z2\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},{z1\.b-z2\.b}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `smlall za\.s\[w8,0:3,vgx2\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.s\[w8,8:11\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.s\[w8,0:3\],{z1\.b-z4\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.s\[w8,0:3\],{z2\.b-z5\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.s\[w8,0:3\],{z3\.b-z6\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},{z1\.b-z4\.b}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},{z2\.b-z5\.b}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},{z3\.b-z6\.b}'
--- /dev/null
+ smlall 0, z0.b, z0.b[0]
+ smlall za.s[w8, 0:3], 0, z0.b[0]
+ smlall za.s[w8, 0:3], z0.b, 0
+
+ smlall za0.s[w8, 0:3], z0.b, z0.b[0]
+ smlall za0h.s[w8, 0:3], z0.b, z0.b[0]
+ smlall za.s[w7, 0:3], z0.b, z0.b[0]
+ smlall za.s[w12, 0:3], z0.b, z0.b[0]
+ smlall za.s[w8, 0], z0.b, z0.b[0]
+ smlall za.s[w8, 0:1], z0.b, z0.b[0]
+ smlall za.s[w8, 0:2], z0.b, z0.b[0]
+ smlall za.s[w8, 0, vgx4], z0.b, z0.b[0]
+ smlall za.s[w8, 0:3, vgx2], z0.b, z0.b[0]
+ smlall za.s[w8, 0:3, vgx4], z0.b, z0.b[0]
+ smlall za.s[w8, 1:4], z0.b, z0.b[0]
+ smlall za.s[w8, 2:5], z0.b, z0.b[0]
+ smlall za.s[w8, 3:6], z0.b, z0.b[0]
+ smlall za.s[w8, 16:19], z0.b, z0.b[0]
+ smlall za.s[w8, 0:3], z0.b, z16.b[0]
+ smlall za.s[w8, 0:3], z0.b, z0.b[-1]
+ smlall za.s[w8, 0:3], z0.b, z0.b[16]
+ smlall za.s[w8, 0:3], z0.h, z0.h[0]
+ smlall za.s[w8, 0:3], z0.s, z0.s[0]
+
+ smlall za.s[w7, 0:3], { z0.b - z1.b }, z0.b[0]
+ smlall za.s[w12, 0:3], { z0.b - z1.b }, z0.b[0]
+ smlall za.s[w8, 0], { z0.b - z1.b }, z0.b[0]
+ smlall za.s[w8, 0:1], { z0.b - z1.b }, z0.b[0]
+ smlall za.s[w8, 0:2], { z0.b - z1.b }, z0.b[0]
+ smlall za.s[w8, 0:3, vgx4], { z0.b - z1.b }, z0.b[0]
+ smlall za.s[w8, 1:4], { z0.b - z1.b }, z0.b[0]
+ smlall za.s[w8, 2:5], { z0.b - z1.b }, z0.b[0]
+ smlall za.s[w8, 3:6], { z0.b - z1.b }, z0.b[0]
+ smlall za.s[w8, 8:11], { z0.b - z1.b }, z0.b[0]
+ smlall za.s[w8, 0:3], { z1.b - z2.b }, z0.b[0]
+ smlall za.s[w8, 0:3], { z0.b - z1.b }, z16.b[0]
+ smlall za.s[w8, 0:3], { z0.b - z1.b }, z0.b[-1]
+ smlall za.s[w8, 0:3], { z0.b - z1.b }, z0.b[16]
+
+ smlall za.s[w7, 0:3], { z0.b - z3.b }, z0.b[0]
+ smlall za.s[w12, 0:3], { z0.b - z3.b }, z0.b[0]
+ smlall za.s[w8, 0], { z0.b - z3.b }, z0.b[0]
+ smlall za.s[w8, 0:1], { z0.b - z3.b }, z0.b[0]
+ smlall za.s[w8, 0:2], { z0.b - z3.b }, z0.b[0]
+ smlall za.s[w8, 0:3, vgx2], { z0.b - z3.b }, z0.b[0]
+ smlall za.s[w8, 1:4], { z0.b - z3.b }, z0.b[0]
+ smlall za.s[w8, 2:5], { z0.b - z3.b }, z0.b[0]
+ smlall za.s[w8, 3:6], { z0.b - z3.b }, z0.b[0]
+ smlall za.s[w8, 8:11], { z0.b - z3.b }, z0.b[0]
+ smlall za.s[w8, 0:3], { z1.b - z4.b }, z0.b[0]
+ smlall za.s[w8, 0:3], { z2.b - z5.b }, z0.b[0]
+ smlall za.s[w8, 0:3], { z3.b - z6.b }, z0.b[0]
+ smlall za.s[w8, 0:3], { z0.b - z3.b }, z16.b[0]
+ smlall za.s[w8, 0:3], { z0.b - z3.b }, z0.b[-1]
+ smlall za.s[w8, 0:3], { z0.b - z3.b }, z0.b[16]
+
+ smlall za.s[w8, 0:3, vgx2], z0.b, z0.b
+ smlall za.s[w8, 0:3, vgx4], z0.b, z0.b
+ smlall za.s[w8, 16:19], z0.b, z0.b
+ smlall za.s[w8, 0:3], z0.b, z16.b
+
+ smlall za.s[w8, 0:3, vgx4], { z0.b - z1.b }, z0.b
+ smlall za.s[w8, 8:11], { z0.b - z1.b }, z0.b
+ smlall za.s[w8, 0:3], { z0.b - z2.b }, z0.b
+ smlall za.s[w8, 0:3], { z0.b - z1.b }, z16.b
+
+ smlall za.s[w8, 0:3, vgx2], { z0.b - z3.b }, z0.b
+ smlall za.s[w8, 8:11], { z0.b - z3.b }, z0.b
+ smlall za.s[w8, 0:3], { z0.b - z3.b }, z16.b
+
+ smlall za.s[w8, 0:3, vgx4], { z0.b - z1.b }, { z0.b - z1.b }
+ smlall za.s[w8, 8:11], { z0.b - z1.b }, { z0.b - z1.b }
+ smlall za.s[w8, 0:3], { z1.b - z2.b }, { z0.b - z1.b }
+ smlall za.s[w8, 0:3], { z0.b - z1.b }, { z1.b - z2.b }
+
+ smlall za.s[w8, 0:3, vgx2], { z0.b - z3.b }, { z0.b - z3.b }
+ smlall za.s[w8, 8:11], { z0.b - z3.b }, { z0.b - z3.b }
+ smlall za.s[w8, 0:3], { z1.b - z4.b }, { z0.b - z3.b }
+ smlall za.s[w8, 0:3], { z2.b - z5.b }, { z0.b - z3.b }
+ smlall za.s[w8, 0:3], { z3.b - z6.b }, { z0.b - z3.b }
+ smlall za.s[w8, 0:3], { z0.b - z3.b }, { z1.b - z4.b }
+ smlall za.s[w8, 0:3], { z0.b - z3.b }, { z2.b - z5.b }
+ smlall za.s[w8, 0:3], { z0.b - z3.b }, { z3.b - z6.b }
--- /dev/null
+#as: -march=armv8-a+sme
+#source: sme2-13.s
+#error_output: sme2-13-noarch.l
--- /dev/null
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w11,0:3\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,12:15\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],z31\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],z0\.b,z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],z0\.b,z0\.b\[15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w9,8:11\],z21\.b,z9\.b\[9\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w9,4:7\],{z18\.b-z19\.b},z9\.b\[12\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w10,0:3\],{z24\.b-z27\.b},z14\.b\[6\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w11,0:3\],z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,12:15\],z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],z31\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],z0\.b,z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w10,4:7\],z25\.b,z7\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z31\.b,z0\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z31\.b-z0\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w9,4:7\],{z19\.b-z20\.b},z13\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z29\.b-z0\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z30\.b,z31\.b,z0\.b,z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z30\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z31\.b-z2\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w9,0:3\],{z25\.b-z28\.b},z14\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w11,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,4:7\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z30\.b-z31\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},{z30\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w10,4:7\],{z22\.b-z23\.b},{z18\.b-z19\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w11,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,4:7\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z28\.b-z31\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},{z28\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w11,0:3\],{z16\.b-z19\.b},{z24\.b-z27\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w11,0:3\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,12:15\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],z31\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],z0\.b,z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],z0\.b,z0\.b\[15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w9,8:11\],z21\.b,z9\.b\[9\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w9,4:7\],{z18\.b-z19\.b},z9\.b\[12\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w10,0:3\],{z24\.b-z27\.b},z14\.b\[6\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w11,0:3\],z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,12:15\],z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],z31\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],z0\.b,z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w10,4:7\],z25\.b,z7\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z31\.b,z0\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z31\.b-z0\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w9,4:7\],{z19\.b-z20\.b},z13\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z29\.b-z0\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z30\.b,z31\.b,z0\.b,z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z30\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z31\.b-z2\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w9,0:3\],{z25\.b-z28\.b},z14\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w11,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,4:7\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z30\.b-z31\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},{z30\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w10,4:7\],{z22\.b-z23\.b},{z18\.b-z19\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w11,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,4:7\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z28\.b-z31\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},{z28\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w11,0:3\],{z16\.b-z19\.b},{z24\.b-z27\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w11,0:3\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,12:15\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],z31\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],z0\.b,z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],z0\.b,z0\.b\[15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w9,8:11\],z21\.b,z9\.b\[9\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w9,4:7\],{z18\.b-z19\.b},z9\.b\[12\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w10,0:3\],{z24\.b-z27\.b},z14\.b\[6\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w11,0:3\],z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,12:15\],z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],z31\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],z0\.b,z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w10,4:7\],z25\.b,z7\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z31\.b,z0\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z31\.b-z0\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w9,4:7\],{z19\.b-z20\.b},z13\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z29\.b-z0\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z30\.b,z31\.b,z0\.b,z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z30\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z31\.b-z2\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w9,0:3\],{z25\.b-z28\.b},z14\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w11,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,4:7\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z30\.b-z31\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z1\.b},{z30\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w10,4:7\],{z22\.b-z23\.b},{z18\.b-z19\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w11,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,4:7\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z28\.b-z31\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z3\.b},{z28\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w11,0:3\],{z16\.b-z19\.b},{z24\.b-z27\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w11,0:3\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,12:15\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],z31\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],z0\.b,z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],z0\.b,z0\.b\[15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w9,8:11\],z21\.b,z9\.b\[9\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w9,4:7\],{z18\.b-z19\.b},z9\.b\[12\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w10,0:3\],{z24\.b-z27\.b},z14\.b\[6\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w11,0:3\],z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,12:15\],z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],z31\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],z0\.b,z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w10,4:7\],z25\.b,z7\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z31\.b,z0\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z31\.b-z0\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w9,4:7\],{z19\.b-z20\.b},z13\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z29\.b-z0\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z30\.b,z31\.b,z0\.b,z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z30\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z31\.b-z2\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w9,0:3\],{z25\.b-z28\.b},z14\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w11,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,4:7\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z30\.b-z31\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},{z30\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w10,4:7\],{z22\.b-z23\.b},{z18\.b-z19\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w11,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,4:7\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z28\.b-z31\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},{z28\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w11,0:3\],{z16\.b-z19\.b},{z24\.b-z27\.b}'
--- /dev/null
+#as: -march=armv8-a+sme2
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+: c1000000 smlall za\.s\[w8, 0:3\], z0\.b, z0\.b\[0\]
+[^:]+: c1006000 smlall za\.s\[w11, 0:3\], z0\.b, z0\.b\[0\]
+[^:]+: c1000003 smlall za\.s\[w8, 12:15\], z0\.b, z0\.b\[0\]
+[^:]+: c10003e0 smlall za\.s\[w8, 0:3\], z31\.b, z0\.b\[0\]
+[^:]+: c10f0000 smlall za\.s\[w8, 0:3\], z0\.b, z15\.b\[0\]
+[^:]+: c1009c00 smlall za\.s\[w8, 0:3\], z0\.b, z0\.b\[15\]
+[^:]+: c109a6a2 smlall za\.s\[w9, 8:11\], z21\.b, z9\.b\[9\]
+[^:]+: c1100000 smlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c1100000 smlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c1106000 smlall za\.s\[w11, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c1100001 smlall za\.s\[w8, 4:7, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c11003c0 smlall za\.s\[w8, 0:3, vgx2\], {z30\.b-z31\.b}, z0\.b\[0\]
+[^:]+: c11f0000 smlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z15\.b\[0\]
+[^:]+: c1100c06 smlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[15\]
+[^:]+: c1192e41 smlall za\.s\[w9, 4:7, vgx2\], {z18\.b-z19\.b}, z9\.b\[12\]
+[^:]+: c1108000 smlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c1108000 smlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c110e000 smlall za\.s\[w11, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c1108001 smlall za\.s\[w8, 4:7, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c1108380 smlall za\.s\[w8, 0:3, vgx4\], {z28\.b-z31\.b}, z0\.b\[0\]
+[^:]+: c11f8000 smlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z15\.b\[0\]
+[^:]+: c1108c06 smlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[15\]
+[^:]+: c11ec704 smlall za\.s\[w10, 0:3, vgx4\], {z24\.b-z27\.b}, z14\.b\[6\]
+[^:]+: c1200400 smlall za\.s\[w8, 0:3\], z0\.b, z0\.b
+[^:]+: c1206400 smlall za\.s\[w11, 0:3\], z0\.b, z0\.b
+[^:]+: c1200403 smlall za\.s\[w8, 12:15\], z0\.b, z0\.b
+[^:]+: c12007e0 smlall za\.s\[w8, 0:3\], z31\.b, z0\.b
+[^:]+: c12f0400 smlall za\.s\[w8, 0:3\], z0\.b, z15\.b
+[^:]+: c1274721 smlall za\.s\[w10, 4:7\], z25\.b, z7\.b
+[^:]+: c1200000 smlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c1200000 smlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c1206000 smlall za\.s\[w11, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c1200001 smlall za\.s\[w8, 4:7, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c12003c0 smlall za\.s\[w8, 0:3, vgx2\], {z30\.b-z31\.b}, z0\.b
+[^:]+: c12003e0 smlall za\.s\[w8, 0:3, vgx2\], {z31\.b-z0\.b}, z0\.b
+[^:]+: c12003e0 smlall za\.s\[w8, 0:3, vgx2\], {z31\.b-z0\.b}, z0\.b
+[^:]+: c12f0000 smlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z15\.b
+[^:]+: c12d2261 smlall za\.s\[w9, 4:7, vgx2\], {z19\.b-z20\.b}, z13\.b
+[^:]+: c1300000 smlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1300000 smlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1306000 smlall za\.s\[w11, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1300001 smlall za\.s\[w8, 4:7, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1300380 smlall za\.s\[w8, 0:3, vgx4\], {z28\.b-z31\.b}, z0\.b
+[^:]+: c13003a0 smlall za\.s\[w8, 0:3, vgx4\], {z29\.b-z0\.b}, z0\.b
+[^:]+: c13003c0 smlall za\.s\[w8, 0:3, vgx4\], {z30\.b-z1\.b}, z0\.b
+[^:]+: c13003c0 smlall za\.s\[w8, 0:3, vgx4\], {z30\.b-z1\.b}, z0\.b
+[^:]+: c13003e0 smlall za\.s\[w8, 0:3, vgx4\], {z31\.b-z2\.b}, z0\.b
+[^:]+: c13f0000 smlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z15\.b
+[^:]+: c13e2320 smlall za\.s\[w9, 0:3, vgx4\], {z25\.b-z28\.b}, z14\.b
+[^:]+: c1a00000 smlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^:]+: c1a00000 smlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^:]+: c1a06000 smlall za\.s\[w11, 0:3, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^:]+: c1a00001 smlall za\.s\[w8, 4:7, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^:]+: c1a003c0 smlall za\.s\[w8, 0:3, vgx2\], {z30\.b-z31\.b}, {z0\.b-z1\.b}
+[^:]+: c1be0000 smlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, {z30\.b-z31\.b}
+[^:]+: c1b242c1 smlall za\.s\[w10, 4:7, vgx2\], {z22\.b-z23\.b}, {z18\.b-z19\.b}
+[^:]+: c1a10000 smlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b}
+[^:]+: c1a10000 smlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b}
+[^:]+: c1a16000 smlall za\.s\[w11, 0:3, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b}
+[^:]+: c1a10001 smlall za\.s\[w8, 4:7, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b}
+[^:]+: c1a10380 smlall za\.s\[w8, 0:3, vgx4\], {z28\.b-z31\.b}, {z0\.b-z3\.b}
+[^:]+: c1bd0000 smlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, {z28\.b-z31\.b}
+[^:]+: c1b96200 smlall za\.s\[w11, 0:3, vgx4\], {z16\.b-z19\.b}, {z24\.b-z27\.b}
+[^:]+: c1000008 smlsll za\.s\[w8, 0:3\], z0\.b, z0\.b\[0\]
+[^:]+: c1006008 smlsll za\.s\[w11, 0:3\], z0\.b, z0\.b\[0\]
+[^:]+: c100000b smlsll za\.s\[w8, 12:15\], z0\.b, z0\.b\[0\]
+[^:]+: c10003e8 smlsll za\.s\[w8, 0:3\], z31\.b, z0\.b\[0\]
+[^:]+: c10f0008 smlsll za\.s\[w8, 0:3\], z0\.b, z15\.b\[0\]
+[^:]+: c1009c08 smlsll za\.s\[w8, 0:3\], z0\.b, z0\.b\[15\]
+[^:]+: c109a6aa smlsll za\.s\[w9, 8:11\], z21\.b, z9\.b\[9\]
+[^:]+: c1100008 smlsll za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c1100008 smlsll za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c1106008 smlsll za\.s\[w11, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c1100009 smlsll za\.s\[w8, 4:7, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c11003c8 smlsll za\.s\[w8, 0:3, vgx2\], {z30\.b-z31\.b}, z0\.b\[0\]
+[^:]+: c11f0008 smlsll za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z15\.b\[0\]
+[^:]+: c1100c0e smlsll za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[15\]
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--- /dev/null
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+ smlall za.s[w11, 0:3], z0.b, z0.b[0]
+ smlall za.s[w8, 12:15], z0.b, z0.b[0]
+ smlall za.s[w8, 0:3], z31.b, z0.b[0]
+ smlall za.s[w8, 0:3], z0.b, z15.b[0]
+ smlall za.s[w8, 0:3], z0.b, z0.b[15]
+ smlall za.s[w9, 8:11], z21.b, z9.b[9]
+
+ smlall za.s[w8, 0:3], { z0.b - z1.b }, z0.b[0]
+ smlall za.s[w8, 0:3, vgx2], { z0.b - z1.b }, z0.b[0]
+ smlall za.s[w11, 0:3], { z0.b - z1.b }, z0.b[0]
+ smlall za.s[w8, 4:7], { z0.b - z1.b }, z0.b[0]
+ smlall za.s[w8, 0:3], { z30.b - z31.b }, z0.b[0]
+ smlall za.s[w8, 0:3], { z0.b - z1.b }, z15.b[0]
+ smlall za.s[w8, 0:3], { z0.b - z1.b }, z0.b[15]
+ smlall za.s[w9, 4:7], { z18.b - z19.b }, z9.b[12]
+
+ smlall za.s[w8, 0:3], { z0.b - z3.b }, z0.b[0]
+ smlall za.s[w8, 0:3, vgx4], { z0.b - z3.b }, z0.b[0]
+ smlall za.s[w11, 0:3], { z0.b - z3.b }, z0.b[0]
+ smlall za.s[w8, 4:7], { z0.b - z3.b }, z0.b[0]
+ smlall za.s[w8, 0:3], { z28.b - z31.b }, z0.b[0]
+ smlall za.s[w8, 0:3], { z0.b - z3.b }, z15.b[0]
+ smlall za.s[w8, 0:3], { z0.b - z3.b }, z0.b[15]
+ smlall za.s[w10, 0:3], { z24.b - z27.b }, z14.b[6]
+
+ smlall za.s[w8, 0:3], z0.b, z0.b
+ smlall za.s[w11, 0:3], z0.b, z0.b
+ smlall za.s[w8, 12:15], z0.b, z0.b
+ smlall za.s[w8, 0:3], z31.b, z0.b
+ smlall za.s[w8, 0:3], z0.b, z15.b
+ smlall za.s[w10, 4:7], z25.b, z7.b
+
+ smlall za.s[w8, 0:3], { z0.b - z1.b }, z0.b
+ smlall za.s[w8, 0:3, vgx2], { z0.b - z1.b }, z0.b
+ smlall za.s[w11, 0:3], { z0.b - z1.b }, z0.b
+ smlall za.s[w8, 4:7], { z0.b - z1.b }, z0.b
+ smlall za.s[w8, 0:3], { z30.b - z31.b }, z0.b
+ smlall za.s[w8, 0:3], { z31.b, z0.b }, z0.b
+ smlall za.s[w8, 0:3], { z31.b - z0.b }, z0.b
+ smlall za.s[w8, 0:3], { z0.b - z1.b }, z15.b
+ smlall za.s[w9, 4:7], { z19.b - z20.b }, z13.b
+
+ smlall za.s[w8, 0:3], { z0.b - z3.b }, z0.b
+ smlall za.s[w8, 0:3, vgx4], { z0.b - z3.b }, z0.b
+ smlall za.s[w11, 0:3], { z0.b - z3.b }, z0.b
+ smlall za.s[w8, 4:7], { z0.b - z3.b }, z0.b
+ smlall za.s[w8, 0:3], { z28.b - z31.b }, z0.b
+ smlall za.s[w8, 0:3], { z29.b - z0.b }, z0.b
+ smlall za.s[w8, 0:3], { z30.b, z31.b, z0.b, z1.b }, z0.b
+ smlall za.s[w8, 0:3], { z30.b - z1.b }, z0.b
+ smlall za.s[w8, 0:3], { z31.b - z2.b }, z0.b
+ smlall za.s[w8, 0:3], { z0.b - z3.b }, z15.b
+ smlall za.s[w9, 0:3], { z25.b - z28.b }, z14.b
+
+ smlall za.s[w8, 0:3], { z0.b - z1.b }, { z0.b - z1.b }
+ smlall za.s[w8, 0:3, vgx2], { z0.b - z1.b }, { z0.b - z1.b }
+ smlall za.s[w11, 0:3], { z0.b - z1.b }, { z0.b - z1.b }
+ smlall za.s[w8, 4:7], { z0.b - z1.b }, { z0.b - z1.b }
+ smlall za.s[w8, 0:3], { z30.b - z31.b }, { z0.b - z1.b }
+ smlall za.s[w8, 0:3], { z0.b - z1.b }, { z30.b - z31.b }
+ smlall za.s[w10, 4:7], { z22.b - z23.b }, { z18.b - z19.b }
+
+ smlall za.s[w8, 0:3], { z0.b - z3.b }, { z0.b - z3.b }
+ smlall za.s[w8, 0:3, vgx4], { z0.b - z3.b }, { z0.b - z3.b }
+ smlall za.s[w11, 0:3], { z0.b - z3.b }, { z0.b - z3.b }
+ smlall za.s[w8, 4:7], { z0.b - z3.b }, { z0.b - z3.b }
+ smlall za.s[w8, 0:3], { z28.b - z31.b }, { z0.b - z3.b }
+ smlall za.s[w8, 0:3], { z0.b - z3.b }, { z28.b - z31.b }
+ smlall za.s[w11, 0:3], { z16.b - z19.b }, { z24.b - z27.b }
+
+ smlsll za.s[w8, 0:3], z0.b, z0.b[0]
+ smlsll za.s[w11, 0:3], z0.b, z0.b[0]
+ smlsll za.s[w8, 12:15], z0.b, z0.b[0]
+ smlsll za.s[w8, 0:3], z31.b, z0.b[0]
+ smlsll za.s[w8, 0:3], z0.b, z15.b[0]
+ smlsll za.s[w8, 0:3], z0.b, z0.b[15]
+ smlsll za.s[w9, 8:11], z21.b, z9.b[9]
+
+ smlsll za.s[w8, 0:3], { z0.b - z1.b }, z0.b[0]
+ smlsll za.s[w8, 0:3, vgx2], { z0.b - z1.b }, z0.b[0]
+ smlsll za.s[w11, 0:3], { z0.b - z1.b }, z0.b[0]
+ smlsll za.s[w8, 4:7], { z0.b - z1.b }, z0.b[0]
+ smlsll za.s[w8, 0:3], { z30.b - z31.b }, z0.b[0]
+ smlsll za.s[w8, 0:3], { z0.b - z1.b }, z15.b[0]
+ smlsll za.s[w8, 0:3], { z0.b - z1.b }, z0.b[15]
+ smlsll za.s[w9, 4:7], { z18.b - z19.b }, z9.b[12]
+
+ smlsll za.s[w8, 0:3], { z0.b - z3.b }, z0.b[0]
+ smlsll za.s[w8, 0:3, vgx4], { z0.b - z3.b }, z0.b[0]
+ smlsll za.s[w11, 0:3], { z0.b - z3.b }, z0.b[0]
+ smlsll za.s[w8, 4:7], { z0.b - z3.b }, z0.b[0]
+ smlsll za.s[w8, 0:3], { z28.b - z31.b }, z0.b[0]
+ smlsll za.s[w8, 0:3], { z0.b - z3.b }, z15.b[0]
+ smlsll za.s[w8, 0:3], { z0.b - z3.b }, z0.b[15]
+ smlsll za.s[w10, 0:3], { z24.b - z27.b }, z14.b[6]
+
+ smlsll za.s[w8, 0:3], z0.b, z0.b
+ smlsll za.s[w11, 0:3], z0.b, z0.b
+ smlsll za.s[w8, 12:15], z0.b, z0.b
+ smlsll za.s[w8, 0:3], z31.b, z0.b
+ smlsll za.s[w8, 0:3], z0.b, z15.b
+ smlsll za.s[w10, 4:7], z25.b, z7.b
+
+ smlsll za.s[w8, 0:3], { z0.b - z1.b }, z0.b
+ smlsll za.s[w8, 0:3, vgx2], { z0.b - z1.b }, z0.b
+ smlsll za.s[w11, 0:3], { z0.b - z1.b }, z0.b
+ smlsll za.s[w8, 4:7], { z0.b - z1.b }, z0.b
+ smlsll za.s[w8, 0:3], { z30.b - z31.b }, z0.b
+ smlsll za.s[w8, 0:3], { z31.b, z0.b }, z0.b
+ smlsll za.s[w8, 0:3], { z31.b - z0.b }, z0.b
+ smlsll za.s[w8, 0:3], { z0.b - z1.b }, z15.b
+ smlsll za.s[w9, 4:7], { z19.b - z20.b }, z13.b
+
+ smlsll za.s[w8, 0:3], { z0.b - z3.b }, z0.b
+ smlsll za.s[w8, 0:3, vgx4], { z0.b - z3.b }, z0.b
+ smlsll za.s[w11, 0:3], { z0.b - z3.b }, z0.b
+ smlsll za.s[w8, 4:7], { z0.b - z3.b }, z0.b
+ smlsll za.s[w8, 0:3], { z28.b - z31.b }, z0.b
+ smlsll za.s[w8, 0:3], { z29.b - z0.b }, z0.b
+ smlsll za.s[w8, 0:3], { z30.b, z31.b, z0.b, z1.b }, z0.b
+ smlsll za.s[w8, 0:3], { z30.b - z1.b }, z0.b
+ smlsll za.s[w8, 0:3], { z31.b - z2.b }, z0.b
+ smlsll za.s[w8, 0:3], { z0.b - z3.b }, z15.b
+ smlsll za.s[w9, 0:3], { z25.b - z28.b }, z14.b
+
+ smlsll za.s[w8, 0:3], { z0.b - z1.b }, { z0.b - z1.b }
+ smlsll za.s[w8, 0:3, vgx2], { z0.b - z1.b }, { z0.b - z1.b }
+ smlsll za.s[w11, 0:3], { z0.b - z1.b }, { z0.b - z1.b }
+ smlsll za.s[w8, 4:7], { z0.b - z1.b }, { z0.b - z1.b }
+ smlsll za.s[w8, 0:3], { z30.b - z31.b }, { z0.b - z1.b }
+ smlsll za.s[w8, 0:3], { z0.b - z1.b }, { z30.b - z31.b }
+ smlsll za.s[w10, 4:7], { z22.b - z23.b }, { z18.b - z19.b }
+
+ smlsll za.s[w8, 0:3], { z0.b - z3.b }, { z0.b - z3.b }
+ smlsll za.s[w8, 0:3, vgx4], { z0.b - z3.b }, { z0.b - z3.b }
+ smlsll za.s[w11, 0:3], { z0.b - z3.b }, { z0.b - z3.b }
+ smlsll za.s[w8, 4:7], { z0.b - z3.b }, { z0.b - z3.b }
+ smlsll za.s[w8, 0:3], { z28.b - z31.b }, { z0.b - z3.b }
+ smlsll za.s[w8, 0:3], { z0.b - z3.b }, { z28.b - z31.b }
+ smlsll za.s[w11, 0:3], { z16.b - z19.b }, { z24.b - z27.b }
+
+ umlall za.s[w8, 0:3], z0.b, z0.b[0]
+ umlall za.s[w11, 0:3], z0.b, z0.b[0]
+ umlall za.s[w8, 12:15], z0.b, z0.b[0]
+ umlall za.s[w8, 0:3], z31.b, z0.b[0]
+ umlall za.s[w8, 0:3], z0.b, z15.b[0]
+ umlall za.s[w8, 0:3], z0.b, z0.b[15]
+ umlall za.s[w9, 8:11], z21.b, z9.b[9]
+
+ umlall za.s[w8, 0:3], { z0.b - z1.b }, z0.b[0]
+ umlall za.s[w8, 0:3, vgx2], { z0.b - z1.b }, z0.b[0]
+ umlall za.s[w11, 0:3], { z0.b - z1.b }, z0.b[0]
+ umlall za.s[w8, 4:7], { z0.b - z1.b }, z0.b[0]
+ umlall za.s[w8, 0:3], { z30.b - z31.b }, z0.b[0]
+ umlall za.s[w8, 0:3], { z0.b - z1.b }, z15.b[0]
+ umlall za.s[w8, 0:3], { z0.b - z1.b }, z0.b[15]
+ umlall za.s[w9, 4:7], { z18.b - z19.b }, z9.b[12]
+
+ umlall za.s[w8, 0:3], { z0.b - z3.b }, z0.b[0]
+ umlall za.s[w8, 0:3, vgx4], { z0.b - z3.b }, z0.b[0]
+ umlall za.s[w11, 0:3], { z0.b - z3.b }, z0.b[0]
+ umlall za.s[w8, 4:7], { z0.b - z3.b }, z0.b[0]
+ umlall za.s[w8, 0:3], { z28.b - z31.b }, z0.b[0]
+ umlall za.s[w8, 0:3], { z0.b - z3.b }, z15.b[0]
+ umlall za.s[w8, 0:3], { z0.b - z3.b }, z0.b[15]
+ umlall za.s[w10, 0:3], { z24.b - z27.b }, z14.b[6]
+
+ umlall za.s[w8, 0:3], z0.b, z0.b
+ umlall za.s[w11, 0:3], z0.b, z0.b
+ umlall za.s[w8, 12:15], z0.b, z0.b
+ umlall za.s[w8, 0:3], z31.b, z0.b
+ umlall za.s[w8, 0:3], z0.b, z15.b
+ umlall za.s[w10, 4:7], z25.b, z7.b
+
+ umlall za.s[w8, 0:3], { z0.b - z1.b }, z0.b
+ umlall za.s[w8, 0:3, vgx2], { z0.b - z1.b }, z0.b
+ umlall za.s[w11, 0:3], { z0.b - z1.b }, z0.b
+ umlall za.s[w8, 4:7], { z0.b - z1.b }, z0.b
+ umlall za.s[w8, 0:3], { z30.b - z31.b }, z0.b
+ umlall za.s[w8, 0:3], { z31.b, z0.b }, z0.b
+ umlall za.s[w8, 0:3], { z31.b - z0.b }, z0.b
+ umlall za.s[w8, 0:3], { z0.b - z1.b }, z15.b
+ umlall za.s[w9, 4:7], { z19.b - z20.b }, z13.b
+
+ umlall za.s[w8, 0:3], { z0.b - z3.b }, z0.b
+ umlall za.s[w8, 0:3, vgx4], { z0.b - z3.b }, z0.b
+ umlall za.s[w11, 0:3], { z0.b - z3.b }, z0.b
+ umlall za.s[w8, 4:7], { z0.b - z3.b }, z0.b
+ umlall za.s[w8, 0:3], { z28.b - z31.b }, z0.b
+ umlall za.s[w8, 0:3], { z29.b - z0.b }, z0.b
+ umlall za.s[w8, 0:3], { z30.b, z31.b, z0.b, z1.b }, z0.b
+ umlall za.s[w8, 0:3], { z30.b - z1.b }, z0.b
+ umlall za.s[w8, 0:3], { z31.b - z2.b }, z0.b
+ umlall za.s[w8, 0:3], { z0.b - z3.b }, z15.b
+ umlall za.s[w9, 0:3], { z25.b - z28.b }, z14.b
+
+ umlall za.s[w8, 0:3], { z0.b - z1.b }, { z0.b - z1.b }
+ umlall za.s[w8, 0:3, vgx2], { z0.b - z1.b }, { z0.b - z1.b }
+ umlall za.s[w11, 0:3], { z0.b - z1.b }, { z0.b - z1.b }
+ umlall za.s[w8, 4:7], { z0.b - z1.b }, { z0.b - z1.b }
+ umlall za.s[w8, 0:3], { z30.b - z31.b }, { z0.b - z1.b }
+ umlall za.s[w8, 0:3], { z0.b - z1.b }, { z30.b - z31.b }
+ umlall za.s[w10, 4:7], { z22.b - z23.b }, { z18.b - z19.b }
+
+ umlall za.s[w8, 0:3], { z0.b - z3.b }, { z0.b - z3.b }
+ umlall za.s[w8, 0:3, vgx4], { z0.b - z3.b }, { z0.b - z3.b }
+ umlall za.s[w11, 0:3], { z0.b - z3.b }, { z0.b - z3.b }
+ umlall za.s[w8, 4:7], { z0.b - z3.b }, { z0.b - z3.b }
+ umlall za.s[w8, 0:3], { z28.b - z31.b }, { z0.b - z3.b }
+ umlall za.s[w8, 0:3], { z0.b - z3.b }, { z28.b - z31.b }
+ umlall za.s[w11, 0:3], { z16.b - z19.b }, { z24.b - z27.b }
+
+ umlsll za.s[w8, 0:3], z0.b, z0.b[0]
+ umlsll za.s[w11, 0:3], z0.b, z0.b[0]
+ umlsll za.s[w8, 12:15], z0.b, z0.b[0]
+ umlsll za.s[w8, 0:3], z31.b, z0.b[0]
+ umlsll za.s[w8, 0:3], z0.b, z15.b[0]
+ umlsll za.s[w8, 0:3], z0.b, z0.b[15]
+ umlsll za.s[w9, 8:11], z21.b, z9.b[9]
+
+ umlsll za.s[w8, 0:3], { z0.b - z1.b }, z0.b[0]
+ umlsll za.s[w8, 0:3, vgx2], { z0.b - z1.b }, z0.b[0]
+ umlsll za.s[w11, 0:3], { z0.b - z1.b }, z0.b[0]
+ umlsll za.s[w8, 4:7], { z0.b - z1.b }, z0.b[0]
+ umlsll za.s[w8, 0:3], { z30.b - z31.b }, z0.b[0]
+ umlsll za.s[w8, 0:3], { z0.b - z1.b }, z15.b[0]
+ umlsll za.s[w8, 0:3], { z0.b - z1.b }, z0.b[15]
+ umlsll za.s[w9, 4:7], { z18.b - z19.b }, z9.b[12]
+
+ umlsll za.s[w8, 0:3], { z0.b - z3.b }, z0.b[0]
+ umlsll za.s[w8, 0:3, vgx4], { z0.b - z3.b }, z0.b[0]
+ umlsll za.s[w11, 0:3], { z0.b - z3.b }, z0.b[0]
+ umlsll za.s[w8, 4:7], { z0.b - z3.b }, z0.b[0]
+ umlsll za.s[w8, 0:3], { z28.b - z31.b }, z0.b[0]
+ umlsll za.s[w8, 0:3], { z0.b - z3.b }, z15.b[0]
+ umlsll za.s[w8, 0:3], { z0.b - z3.b }, z0.b[15]
+ umlsll za.s[w10, 0:3], { z24.b - z27.b }, z14.b[6]
+
+ umlsll za.s[w8, 0:3], z0.b, z0.b
+ umlsll za.s[w11, 0:3], z0.b, z0.b
+ umlsll za.s[w8, 12:15], z0.b, z0.b
+ umlsll za.s[w8, 0:3], z31.b, z0.b
+ umlsll za.s[w8, 0:3], z0.b, z15.b
+ umlsll za.s[w10, 4:7], z25.b, z7.b
+
+ umlsll za.s[w8, 0:3], { z0.b - z1.b }, z0.b
+ umlsll za.s[w8, 0:3, vgx2], { z0.b - z1.b }, z0.b
+ umlsll za.s[w11, 0:3], { z0.b - z1.b }, z0.b
+ umlsll za.s[w8, 4:7], { z0.b - z1.b }, z0.b
+ umlsll za.s[w8, 0:3], { z30.b - z31.b }, z0.b
+ umlsll za.s[w8, 0:3], { z31.b, z0.b }, z0.b
+ umlsll za.s[w8, 0:3], { z31.b - z0.b }, z0.b
+ umlsll za.s[w8, 0:3], { z0.b - z1.b }, z15.b
+ umlsll za.s[w9, 4:7], { z19.b - z20.b }, z13.b
+
+ umlsll za.s[w8, 0:3], { z0.b - z3.b }, z0.b
+ umlsll za.s[w8, 0:3, vgx4], { z0.b - z3.b }, z0.b
+ umlsll za.s[w11, 0:3], { z0.b - z3.b }, z0.b
+ umlsll za.s[w8, 4:7], { z0.b - z3.b }, z0.b
+ umlsll za.s[w8, 0:3], { z28.b - z31.b }, z0.b
+ umlsll za.s[w8, 0:3], { z29.b - z0.b }, z0.b
+ umlsll za.s[w8, 0:3], { z30.b, z31.b, z0.b, z1.b }, z0.b
+ umlsll za.s[w8, 0:3], { z30.b - z1.b }, z0.b
+ umlsll za.s[w8, 0:3], { z31.b - z2.b }, z0.b
+ umlsll za.s[w8, 0:3], { z0.b - z3.b }, z15.b
+ umlsll za.s[w9, 0:3], { z25.b - z28.b }, z14.b
+
+ umlsll za.s[w8, 0:3], { z0.b - z1.b }, { z0.b - z1.b }
+ umlsll za.s[w8, 0:3, vgx2], { z0.b - z1.b }, { z0.b - z1.b }
+ umlsll za.s[w11, 0:3], { z0.b - z1.b }, { z0.b - z1.b }
+ umlsll za.s[w8, 4:7], { z0.b - z1.b }, { z0.b - z1.b }
+ umlsll za.s[w8, 0:3], { z30.b - z31.b }, { z0.b - z1.b }
+ umlsll za.s[w8, 0:3], { z0.b - z1.b }, { z30.b - z31.b }
+ umlsll za.s[w10, 4:7], { z22.b - z23.b }, { z18.b - z19.b }
+
+ umlsll za.s[w8, 0:3], { z0.b - z3.b }, { z0.b - z3.b }
+ umlsll za.s[w8, 0:3, vgx4], { z0.b - z3.b }, { z0.b - z3.b }
+ umlsll za.s[w11, 0:3], { z0.b - z3.b }, { z0.b - z3.b }
+ umlsll za.s[w8, 4:7], { z0.b - z3.b }, { z0.b - z3.b }
+ umlsll za.s[w8, 0:3], { z28.b - z31.b }, { z0.b - z3.b }
+ umlsll za.s[w8, 0:3], { z0.b - z3.b }, { z28.b - z31.b }
+ umlsll za.s[w11, 0:3], { z16.b - z19.b }, { z24.b - z27.b }
--- /dev/null
+#as: -march=armv8-a
+#source: sme2-14-invalid.s
+#error_output: sme2-14-invalid.l
--- /dev/null
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected a ZA array vector at operand 1 -- `sumlall 0,z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 2 -- `sumlall za\.s\[w8,0:3\],0,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sumlall za\.s\[w8,0:3\],z0\.b,0'
+[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `sumlall za\.s\[w8,0:3\],z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sumlall za\.s\[w8,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sumlall za\.s\[w8,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
--- /dev/null
+ sumlall 0, z0.b, z0.b[0]
+ sumlall za.s[w8, 0:3], 0, z0.b[0]
+ sumlall za.s[w8, 0:3], z0.b, 0
+
+ sumlall za.s[w8, 0:3], z0.b, z0.b
+ sumlall za.s[w8, 0:3], { z0.b - z1.b }, { z0.b - z1.b }
+ sumlall za.s[w8, 0:3], { z0.b - z3.b }, { z0.b - z3.b }
--- /dev/null
+#as: -march=armv8-a+sme
+#source: sme2-14.s
+#error_output: sme2-14-noarch.l
--- /dev/null
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w11,0:3\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,12:15\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],z31\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],z0\.b,z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],z0\.b,z0\.b\[15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w9,8:11\],z21\.b,z9\.b\[9\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w9,4:7\],{z18\.b-z19\.b},z9\.b\[12\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w10,0:3\],{z24\.b-z27\.b},z14\.b\[6\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z31\.b,z0\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z31\.b-z0\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w9,4:7\],{z19\.b-z20\.b},z13\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z29\.b-z0\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z30\.b,z31\.b,z0\.b,z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z30\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z31\.b-z2\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w9,0:3\],{z25\.b-z28\.b},z14\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w11,0:3\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,12:15\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],z31\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],z0\.b,z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],z0\.b,z0\.b\[15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w9,8:11\],z21\.b,z9\.b\[9\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w9,4:7\],{z18\.b-z19\.b},z9\.b\[12\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w10,0:3\],{z24\.b-z27\.b},z14\.b\[6\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w11,0:3\],z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,12:15\],z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],z31\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],z0\.b,z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w10,4:7\],z25\.b,z7\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z31\.b,z0\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z31\.b-z0\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w9,4:7\],{z19\.b-z20\.b},z13\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z29\.b-z0\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z30\.b,z31\.b,z0\.b,z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z30\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z31\.b-z2\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w9,0:3\],{z25\.b-z28\.b},z14\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w11,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,4:7\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z30\.b-z31\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z1\.b},{z30\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w10,4:7\],{z22\.b-z23\.b},{z18\.b-z19\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w11,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,4:7\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z28\.b-z31\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z3\.b},{z28\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w11,0:3\],{z16\.b-z19\.b},{z24\.b-z27\.b}'
--- /dev/null
+#as: -march=armv8-a+sme2
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+: c1000014 sumlall za\.s\[w8, 0:3\], z0\.b, z0\.b\[0\]
+[^:]+: c1006014 sumlall za\.s\[w11, 0:3\], z0\.b, z0\.b\[0\]
+[^:]+: c1000017 sumlall za\.s\[w8, 12:15\], z0\.b, z0\.b\[0\]
+[^:]+: c10003f4 sumlall za\.s\[w8, 0:3\], z31\.b, z0\.b\[0\]
+[^:]+: c10f0014 sumlall za\.s\[w8, 0:3\], z0\.b, z15\.b\[0\]
+[^:]+: c1009c14 sumlall za\.s\[w8, 0:3\], z0\.b, z0\.b\[15\]
+[^:]+: c109a6b6 sumlall za\.s\[w9, 8:11\], z21\.b, z9\.b\[9\]
+[^:]+: c1100030 sumlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c1100030 sumlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c1106030 sumlall za\.s\[w11, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c1100031 sumlall za\.s\[w8, 4:7, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c11003f0 sumlall za\.s\[w8, 0:3, vgx2\], {z30\.b-z31\.b}, z0\.b\[0\]
+[^:]+: c11f0030 sumlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z15\.b\[0\]
+[^:]+: c1100c36 sumlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[15\]
+[^:]+: c1192e71 sumlall za\.s\[w9, 4:7, vgx2\], {z18\.b-z19\.b}, z9\.b\[12\]
+[^:]+: c1108030 sumlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c1108030 sumlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c110e030 sumlall za\.s\[w11, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c1108031 sumlall za\.s\[w8, 4:7, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c11083b0 sumlall za\.s\[w8, 0:3, vgx4\], {z28\.b-z31\.b}, z0\.b\[0\]
+[^:]+: c11f8030 sumlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z15\.b\[0\]
+[^:]+: c1108c36 sumlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[15\]
+[^:]+: c11ec734 sumlall za\.s\[w10, 0:3, vgx4\], {z24\.b-z27\.b}, z14\.b\[6\]
+[^:]+: c1200014 sumlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c1200014 sumlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c1206014 sumlall za\.s\[w11, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c1200015 sumlall za\.s\[w8, 4:7, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c12003d4 sumlall za\.s\[w8, 0:3, vgx2\], {z30\.b-z31\.b}, z0\.b
+[^:]+: c12003f4 sumlall za\.s\[w8, 0:3, vgx2\], {z31\.b-z0\.b}, z0\.b
+[^:]+: c12003f4 sumlall za\.s\[w8, 0:3, vgx2\], {z31\.b-z0\.b}, z0\.b
+[^:]+: c12f0014 sumlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z15\.b
+[^:]+: c12d2275 sumlall za\.s\[w9, 4:7, vgx2\], {z19\.b-z20\.b}, z13\.b
+[^:]+: c1300014 sumlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1300014 sumlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1306014 sumlall za\.s\[w11, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1300015 sumlall za\.s\[w8, 4:7, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1300394 sumlall za\.s\[w8, 0:3, vgx4\], {z28\.b-z31\.b}, z0\.b
+[^:]+: c13003b4 sumlall za\.s\[w8, 0:3, vgx4\], {z29\.b-z0\.b}, z0\.b
+[^:]+: c13003d4 sumlall za\.s\[w8, 0:3, vgx4\], {z30\.b-z1\.b}, z0\.b
+[^:]+: c13003d4 sumlall za\.s\[w8, 0:3, vgx4\], {z30\.b-z1\.b}, z0\.b
+[^:]+: c13003f4 sumlall za\.s\[w8, 0:3, vgx4\], {z31\.b-z2\.b}, z0\.b
+[^:]+: c13f0014 sumlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z15\.b
+[^:]+: c13e2334 sumlall za\.s\[w9, 0:3, vgx4\], {z25\.b-z28\.b}, z14\.b
+[^:]+: c1000004 usmlall za\.s\[w8, 0:3\], z0\.b, z0\.b\[0\]
+[^:]+: c1006004 usmlall za\.s\[w11, 0:3\], z0\.b, z0\.b\[0\]
+[^:]+: c1000007 usmlall za\.s\[w8, 12:15\], z0\.b, z0\.b\[0\]
+[^:]+: c10003e4 usmlall za\.s\[w8, 0:3\], z31\.b, z0\.b\[0\]
+[^:]+: c10f0004 usmlall za\.s\[w8, 0:3\], z0\.b, z15\.b\[0\]
+[^:]+: c1009c04 usmlall za\.s\[w8, 0:3\], z0\.b, z0\.b\[15\]
+[^:]+: c109a6a6 usmlall za\.s\[w9, 8:11\], z21\.b, z9\.b\[9\]
+[^:]+: c1100020 usmlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c1100020 usmlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c1106020 usmlall za\.s\[w11, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c1100021 usmlall za\.s\[w8, 4:7, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c11003e0 usmlall za\.s\[w8, 0:3, vgx2\], {z30\.b-z31\.b}, z0\.b\[0\]
+[^:]+: c11f0020 usmlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z15\.b\[0\]
+[^:]+: c1100c26 usmlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[15\]
+[^:]+: c1192e61 usmlall za\.s\[w9, 4:7, vgx2\], {z18\.b-z19\.b}, z9\.b\[12\]
+[^:]+: c1108020 usmlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c1108020 usmlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c110e020 usmlall za\.s\[w11, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c1108021 usmlall za\.s\[w8, 4:7, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c11083a0 usmlall za\.s\[w8, 0:3, vgx4\], {z28\.b-z31\.b}, z0\.b\[0\]
+[^:]+: c11f8020 usmlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z15\.b\[0\]
+[^:]+: c1108c26 usmlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[15\]
+[^:]+: c11ec724 usmlall za\.s\[w10, 0:3, vgx4\], {z24\.b-z27\.b}, z14\.b\[6\]
+[^:]+: c1200404 usmlall za\.s\[w8, 0:3\], z0\.b, z0\.b
+[^:]+: c1206404 usmlall za\.s\[w11, 0:3\], z0\.b, z0\.b
+[^:]+: c1200407 usmlall za\.s\[w8, 12:15\], z0\.b, z0\.b
+[^:]+: c12007e4 usmlall za\.s\[w8, 0:3\], z31\.b, z0\.b
+[^:]+: c12f0404 usmlall za\.s\[w8, 0:3\], z0\.b, z15\.b
+[^:]+: c1274725 usmlall za\.s\[w10, 4:7\], z25\.b, z7\.b
+[^:]+: c1200004 usmlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c1200004 usmlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c1206004 usmlall za\.s\[w11, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c1200005 usmlall za\.s\[w8, 4:7, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c12003c4 usmlall za\.s\[w8, 0:3, vgx2\], {z30\.b-z31\.b}, z0\.b
+[^:]+: c12003e4 usmlall za\.s\[w8, 0:3, vgx2\], {z31\.b-z0\.b}, z0\.b
+[^:]+: c12003e4 usmlall za\.s\[w8, 0:3, vgx2\], {z31\.b-z0\.b}, z0\.b
+[^:]+: c12f0004 usmlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z15\.b
+[^:]+: c12d2265 usmlall za\.s\[w9, 4:7, vgx2\], {z19\.b-z20\.b}, z13\.b
+[^:]+: c1300004 usmlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1300004 usmlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1306004 usmlall za\.s\[w11, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1300005 usmlall za\.s\[w8, 4:7, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1300384 usmlall za\.s\[w8, 0:3, vgx4\], {z28\.b-z31\.b}, z0\.b
+[^:]+: c13003a4 usmlall za\.s\[w8, 0:3, vgx4\], {z29\.b-z0\.b}, z0\.b
+[^:]+: c13003c4 usmlall za\.s\[w8, 0:3, vgx4\], {z30\.b-z1\.b}, z0\.b
+[^:]+: c13003c4 usmlall za\.s\[w8, 0:3, vgx4\], {z30\.b-z1\.b}, z0\.b
+[^:]+: c13003e4 usmlall za\.s\[w8, 0:3, vgx4\], {z31\.b-z2\.b}, z0\.b
+[^:]+: c13f0004 usmlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z15\.b
+[^:]+: c13e2324 usmlall za\.s\[w9, 0:3, vgx4\], {z25\.b-z28\.b}, z14\.b
+[^:]+: c1a00004 usmlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^:]+: c1a00004 usmlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^:]+: c1a06004 usmlall za\.s\[w11, 0:3, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^:]+: c1a00005 usmlall za\.s\[w8, 4:7, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^:]+: c1a003c4 usmlall za\.s\[w8, 0:3, vgx2\], {z30\.b-z31\.b}, {z0\.b-z1\.b}
+[^:]+: c1be0004 usmlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, {z30\.b-z31\.b}
+[^:]+: c1b242c5 usmlall za\.s\[w10, 4:7, vgx2\], {z22\.b-z23\.b}, {z18\.b-z19\.b}
+[^:]+: c1a10004 usmlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b}
+[^:]+: c1a10004 usmlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b}
+[^:]+: c1a16004 usmlall za\.s\[w11, 0:3, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b}
+[^:]+: c1a10005 usmlall za\.s\[w8, 4:7, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b}
+[^:]+: c1a10384 usmlall za\.s\[w8, 0:3, vgx4\], {z28\.b-z31\.b}, {z0\.b-z3\.b}
+[^:]+: c1bd0004 usmlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, {z28\.b-z31\.b}
+[^:]+: c1b96204 usmlall za\.s\[w11, 0:3, vgx4\], {z16\.b-z19\.b}, {z24\.b-z27\.b}
--- /dev/null
+ sumlall za.s[w8, 0:3], z0.b, z0.b[0]
+ sumlall za.s[w11, 0:3], z0.b, z0.b[0]
+ sumlall za.s[w8, 12:15], z0.b, z0.b[0]
+ sumlall za.s[w8, 0:3], z31.b, z0.b[0]
+ sumlall za.s[w8, 0:3], z0.b, z15.b[0]
+ sumlall za.s[w8, 0:3], z0.b, z0.b[15]
+ sumlall za.s[w9, 8:11], z21.b, z9.b[9]
+
+ sumlall za.s[w8, 0:3], { z0.b - z1.b }, z0.b[0]
+ sumlall za.s[w8, 0:3, vgx2], { z0.b - z1.b }, z0.b[0]
+ sumlall za.s[w11, 0:3], { z0.b - z1.b }, z0.b[0]
+ sumlall za.s[w8, 4:7], { z0.b - z1.b }, z0.b[0]
+ sumlall za.s[w8, 0:3], { z30.b - z31.b }, z0.b[0]
+ sumlall za.s[w8, 0:3], { z0.b - z1.b }, z15.b[0]
+ sumlall za.s[w8, 0:3], { z0.b - z1.b }, z0.b[15]
+ sumlall za.s[w9, 4:7], { z18.b - z19.b }, z9.b[12]
+
+ sumlall za.s[w8, 0:3], { z0.b - z3.b }, z0.b[0]
+ sumlall za.s[w8, 0:3, vgx4], { z0.b - z3.b }, z0.b[0]
+ sumlall za.s[w11, 0:3], { z0.b - z3.b }, z0.b[0]
+ sumlall za.s[w8, 4:7], { z0.b - z3.b }, z0.b[0]
+ sumlall za.s[w8, 0:3], { z28.b - z31.b }, z0.b[0]
+ sumlall za.s[w8, 0:3], { z0.b - z3.b }, z15.b[0]
+ sumlall za.s[w8, 0:3], { z0.b - z3.b }, z0.b[15]
+ sumlall za.s[w10, 0:3], { z24.b - z27.b }, z14.b[6]
+
+ sumlall za.s[w8, 0:3], { z0.b - z1.b }, z0.b
+ sumlall za.s[w8, 0:3, vgx2], { z0.b - z1.b }, z0.b
+ sumlall za.s[w11, 0:3], { z0.b - z1.b }, z0.b
+ sumlall za.s[w8, 4:7], { z0.b - z1.b }, z0.b
+ sumlall za.s[w8, 0:3], { z30.b - z31.b }, z0.b
+ sumlall za.s[w8, 0:3], { z31.b, z0.b }, z0.b
+ sumlall za.s[w8, 0:3], { z31.b - z0.b }, z0.b
+ sumlall za.s[w8, 0:3], { z0.b - z1.b }, z15.b
+ sumlall za.s[w9, 4:7], { z19.b - z20.b }, z13.b
+
+ sumlall za.s[w8, 0:3], { z0.b - z3.b }, z0.b
+ sumlall za.s[w8, 0:3, vgx4], { z0.b - z3.b }, z0.b
+ sumlall za.s[w11, 0:3], { z0.b - z3.b }, z0.b
+ sumlall za.s[w8, 4:7], { z0.b - z3.b }, z0.b
+ sumlall za.s[w8, 0:3], { z28.b - z31.b }, z0.b
+ sumlall za.s[w8, 0:3], { z29.b - z0.b }, z0.b
+ sumlall za.s[w8, 0:3], { z30.b, z31.b, z0.b, z1.b }, z0.b
+ sumlall za.s[w8, 0:3], { z30.b - z1.b }, z0.b
+ sumlall za.s[w8, 0:3], { z31.b - z2.b }, z0.b
+ sumlall za.s[w8, 0:3], { z0.b - z3.b }, z15.b
+ sumlall za.s[w9, 0:3], { z25.b - z28.b }, z14.b
+
+ usmlall za.s[w8, 0:3], z0.b, z0.b[0]
+ usmlall za.s[w11, 0:3], z0.b, z0.b[0]
+ usmlall za.s[w8, 12:15], z0.b, z0.b[0]
+ usmlall za.s[w8, 0:3], z31.b, z0.b[0]
+ usmlall za.s[w8, 0:3], z0.b, z15.b[0]
+ usmlall za.s[w8, 0:3], z0.b, z0.b[15]
+ usmlall za.s[w9, 8:11], z21.b, z9.b[9]
+
+ usmlall za.s[w8, 0:3], { z0.b - z1.b }, z0.b[0]
+ usmlall za.s[w8, 0:3, vgx2], { z0.b - z1.b }, z0.b[0]
+ usmlall za.s[w11, 0:3], { z0.b - z1.b }, z0.b[0]
+ usmlall za.s[w8, 4:7], { z0.b - z1.b }, z0.b[0]
+ usmlall za.s[w8, 0:3], { z30.b - z31.b }, z0.b[0]
+ usmlall za.s[w8, 0:3], { z0.b - z1.b }, z15.b[0]
+ usmlall za.s[w8, 0:3], { z0.b - z1.b }, z0.b[15]
+ usmlall za.s[w9, 4:7], { z18.b - z19.b }, z9.b[12]
+
+ usmlall za.s[w8, 0:3], { z0.b - z3.b }, z0.b[0]
+ usmlall za.s[w8, 0:3, vgx4], { z0.b - z3.b }, z0.b[0]
+ usmlall za.s[w11, 0:3], { z0.b - z3.b }, z0.b[0]
+ usmlall za.s[w8, 4:7], { z0.b - z3.b }, z0.b[0]
+ usmlall za.s[w8, 0:3], { z28.b - z31.b }, z0.b[0]
+ usmlall za.s[w8, 0:3], { z0.b - z3.b }, z15.b[0]
+ usmlall za.s[w8, 0:3], { z0.b - z3.b }, z0.b[15]
+ usmlall za.s[w10, 0:3], { z24.b - z27.b }, z14.b[6]
+
+ usmlall za.s[w8, 0:3], z0.b, z0.b
+ usmlall za.s[w11, 0:3], z0.b, z0.b
+ usmlall za.s[w8, 12:15], z0.b, z0.b
+ usmlall za.s[w8, 0:3], z31.b, z0.b
+ usmlall za.s[w8, 0:3], z0.b, z15.b
+ usmlall za.s[w10, 4:7], z25.b, z7.b
+
+ usmlall za.s[w8, 0:3], { z0.b - z1.b }, z0.b
+ usmlall za.s[w8, 0:3, vgx2], { z0.b - z1.b }, z0.b
+ usmlall za.s[w11, 0:3], { z0.b - z1.b }, z0.b
+ usmlall za.s[w8, 4:7], { z0.b - z1.b }, z0.b
+ usmlall za.s[w8, 0:3], { z30.b - z31.b }, z0.b
+ usmlall za.s[w8, 0:3], { z31.b, z0.b }, z0.b
+ usmlall za.s[w8, 0:3], { z31.b - z0.b }, z0.b
+ usmlall za.s[w8, 0:3], { z0.b - z1.b }, z15.b
+ usmlall za.s[w9, 4:7], { z19.b - z20.b }, z13.b
+
+ usmlall za.s[w8, 0:3], { z0.b - z3.b }, z0.b
+ usmlall za.s[w8, 0:3, vgx4], { z0.b - z3.b }, z0.b
+ usmlall za.s[w11, 0:3], { z0.b - z3.b }, z0.b
+ usmlall za.s[w8, 4:7], { z0.b - z3.b }, z0.b
+ usmlall za.s[w8, 0:3], { z28.b - z31.b }, z0.b
+ usmlall za.s[w8, 0:3], { z29.b - z0.b }, z0.b
+ usmlall za.s[w8, 0:3], { z30.b, z31.b, z0.b, z1.b }, z0.b
+ usmlall za.s[w8, 0:3], { z30.b - z1.b }, z0.b
+ usmlall za.s[w8, 0:3], { z31.b - z2.b }, z0.b
+ usmlall za.s[w8, 0:3], { z0.b - z3.b }, z15.b
+ usmlall za.s[w9, 0:3], { z25.b - z28.b }, z14.b
+
+ usmlall za.s[w8, 0:3], { z0.b - z1.b }, { z0.b - z1.b }
+ usmlall za.s[w8, 0:3, vgx2], { z0.b - z1.b }, { z0.b - z1.b }
+ usmlall za.s[w11, 0:3], { z0.b - z1.b }, { z0.b - z1.b }
+ usmlall za.s[w8, 4:7], { z0.b - z1.b }, { z0.b - z1.b }
+ usmlall za.s[w8, 0:3], { z30.b - z31.b }, { z0.b - z1.b }
+ usmlall za.s[w8, 0:3], { z0.b - z1.b }, { z30.b - z31.b }
+ usmlall za.s[w10, 4:7], { z22.b - z23.b }, { z18.b - z19.b }
+
+ usmlall za.s[w8, 0:3], { z0.b - z3.b }, { z0.b - z3.b }
+ usmlall za.s[w8, 0:3, vgx4], { z0.b - z3.b }, { z0.b - z3.b }
+ usmlall za.s[w11, 0:3], { z0.b - z3.b }, { z0.b - z3.b }
+ usmlall za.s[w8, 4:7], { z0.b - z3.b }, { z0.b - z3.b }
+ usmlall za.s[w8, 0:3], { z28.b - z31.b }, { z0.b - z3.b }
+ usmlall za.s[w8, 0:3], { z0.b - z3.b }, { z28.b - z31.b }
+ usmlall za.s[w11, 0:3], { z16.b - z19.b }, { z24.b - z27.b }
--- /dev/null
+#as: -march=armv8-a
+#source: sme2-i16i64-2-invalid.s
+#error_output: sme2-i16i64-2-invalid.l
--- /dev/null
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected 'za' rather than a ZA tile at operand 1 -- `smlall za0\.d\[w8,0:3\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected 'za' rather than a ZA tile at operand 1 -- `smlall za0h\.d\[w8,0:3\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.d\[w7,0:3\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.d\[w12,0:3\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.d\[w8,0\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.d\[w8,0:1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.d\[w8,0:2\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.d\[w8,0,vgx4\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: unexpected vector group size at operand 1 -- `smlall za\.d\[w8,0:3,vgx2\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: unexpected vector group size at operand 1 -- `smlall za\.d\[w8,0:3,vgx4\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.d\[w8,1:4\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.d\[w8,2:5\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.d\[w8,3:6\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 12 at operand 1 -- `smlall za\.d\[w8,16:19\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.d\[w8,0:3\],z0\.h,z16\.h\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `smlall za\.d\[w8,0:3\],z0\.h,z0\.h\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `smlall za\.d\[w8,0:3\],z0\.h,z0\.h\[8\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `smlall za\.d\[w8,0:3\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: smlall za\.s\[w8, 0:3\], z0\.b, z0\.b\[0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `smlall za\.d\[w8,0:3\],z0\.d,z0\.d\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: smlall za\.d\[w8, 0:3\], z0\.h, z0\.h\[0\]
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.d\[w7,0:3\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.d\[w12,0:3\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.d\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.d\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.d\[w8,0:2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `smlall za\.d\[w8,0:3,vgx4\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.d\[w8,1:4\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.d\[w8,2:5\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.d\[w8,3:6\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.d\[w8,8:11\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.d\[w8,0:3\],{z1\.h-z2\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z16\.h\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h\[8\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.d\[w7,0:3\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.d\[w12,0:3\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.d\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.d\[w8,0:2\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `smlall za\.d\[w8,0:3,vgx2\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.d\[w8,1:4\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.d\[w8,2:5\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.d\[w8,3:6\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.d\[w8,8:11\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.d\[w8,0:3\],{z1\.h-z4\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.d\[w8,0:3\],{z2\.h-z5\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.d\[w8,0:3\],{z3\.h-z6\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z16\.h\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h\[8\]'
+[^ :]+:[0-9]+: Error: unexpected vector group size at operand 1 -- `smlall za\.d\[w8,0:3,vgx2\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: unexpected vector group size at operand 1 -- `smlall za\.d\[w8,0:3,vgx4\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 12 at operand 1 -- `smlall za\.d\[w8,16:19\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.d\[w8,0:3\],z0\.h,z16\.h'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `smlall za\.d\[w8,0:3,vgx4\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.d\[w8,8:11\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `smlall za\.d\[w8,0:3\],{z0\.h-z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z16\.h'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `smlall za\.d\[w8,0:3,vgx2\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.d\[w8,8:11\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z16\.h'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `smlall za\.d\[w8,0:3,vgx4\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.d\[w8,8:11\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.d\[w8,0:3\],{z1\.h-z2\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},{z1\.h-z2\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `smlall za\.d\[w8,0:3,vgx2\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.d\[w8,8:11\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.d\[w8,0:3\],{z1\.h-z4\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.d\[w8,0:3\],{z2\.h-z5\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.d\[w8,0:3\],{z3\.h-z6\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},{z1\.h-z4\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},{z2\.h-z5\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},{z3\.h-z6\.h}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sumlall za\.d\[w8,0:3\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sumlall za\.s\[w8, 0:3\], z0\.b, z0\.b\[0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `sumlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sumlall za\.s\[w8, 0:3\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `sumlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sumlall za\.s\[w8, 0:3\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `sumlall za\.d\[w8,0:3\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sumlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sumlall za\.s\[w8, 0:3\], {z0\.b-z1\.b}, z0\.b
+[^ :]+:[0-9]+: Error: operand mismatch -- `sumlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sumlall za\.s\[w8, 0:3\], {z0\.b-z3\.b}, z0\.b
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sumlall za\.d\[w8,0:3\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sumlall za\.d\[w8,0:3\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
--- /dev/null
+ smlall za0.d[w8, 0:3], z0.h, z0.h[0]
+ smlall za0h.d[w8, 0:3], z0.h, z0.h[0]
+ smlall za.d[w7, 0:3], z0.h, z0.h[0]
+ smlall za.d[w12, 0:3], z0.h, z0.h[0]
+ smlall za.d[w8, 0], z0.h, z0.h[0]
+ smlall za.d[w8, 0:1], z0.h, z0.h[0]
+ smlall za.d[w8, 0:2], z0.h, z0.h[0]
+ smlall za.d[w8, 0, vgx4], z0.h, z0.h[0]
+ smlall za.d[w8, 0:3, vgx2], z0.h, z0.h[0]
+ smlall za.d[w8, 0:3, vgx4], z0.h, z0.h[0]
+ smlall za.d[w8, 1:4], z0.h, z0.h[0]
+ smlall za.d[w8, 2:5], z0.h, z0.h[0]
+ smlall za.d[w8, 3:6], z0.h, z0.h[0]
+ smlall za.d[w8, 16:19], z0.h, z0.h[0]
+ smlall za.d[w8, 0:3], z0.h, z16.h[0]
+ smlall za.d[w8, 0:3], z0.h, z0.h[-1]
+ smlall za.d[w8, 0:3], z0.h, z0.h[8]
+ smlall za.d[w8, 0:3], z0.b, z0.b[0]
+ smlall za.d[w8, 0:3], z0.d, z0.d[0]
+
+ smlall za.d[w7, 0:3], { z0.h - z1.h }, z0.h[0]
+ smlall za.d[w12, 0:3], { z0.h - z1.h }, z0.h[0]
+ smlall za.d[w8, 0], { z0.h - z1.h }, z0.h[0]
+ smlall za.d[w8, 0:1], { z0.h - z1.h }, z0.h[0]
+ smlall za.d[w8, 0:2], { z0.h - z1.h }, z0.h[0]
+ smlall za.d[w8, 0:3, vgx4], { z0.h - z1.h }, z0.h[0]
+ smlall za.d[w8, 1:4], { z0.h - z1.h }, z0.h[0]
+ smlall za.d[w8, 2:5], { z0.h - z1.h }, z0.h[0]
+ smlall za.d[w8, 3:6], { z0.h - z1.h }, z0.h[0]
+ smlall za.d[w8, 8:11], { z0.h - z1.h }, z0.h[0]
+ smlall za.d[w8, 0:3], { z1.h - z2.h }, z0.h[0]
+ smlall za.d[w8, 0:3], { z0.h - z1.h }, z16.h[0]
+ smlall za.d[w8, 0:3], { z0.h - z1.h }, z0.h[-1]
+ smlall za.d[w8, 0:3], { z0.h - z1.h }, z0.h[8]
+
+ smlall za.d[w7, 0:3], { z0.h - z3.h }, z0.h[0]
+ smlall za.d[w12, 0:3], { z0.h - z3.h }, z0.h[0]
+ smlall za.d[w8, 0], { z0.h - z3.h }, z0.h[0]
+ smlall za.d[w8, 0:1], { z0.h - z3.h }, z0.h[0]
+ smlall za.d[w8, 0:2], { z0.h - z3.h }, z0.h[0]
+ smlall za.d[w8, 0:3, vgx2], { z0.h - z3.h }, z0.h[0]
+ smlall za.d[w8, 1:4], { z0.h - z3.h }, z0.h[0]
+ smlall za.d[w8, 2:5], { z0.h - z3.h }, z0.h[0]
+ smlall za.d[w8, 3:6], { z0.h - z3.h }, z0.h[0]
+ smlall za.d[w8, 8:11], { z0.h - z3.h }, z0.h[0]
+ smlall za.d[w8, 0:3], { z1.h - z4.h }, z0.h[0]
+ smlall za.d[w8, 0:3], { z2.h - z5.h }, z0.h[0]
+ smlall za.d[w8, 0:3], { z3.h - z6.h }, z0.h[0]
+ smlall za.d[w8, 0:3], { z0.h - z3.h }, z16.h[0]
+ smlall za.d[w8, 0:3], { z0.h - z3.h }, z0.h[-1]
+ smlall za.d[w8, 0:3], { z0.h - z3.h }, z0.h[8]
+
+ smlall za.d[w8, 0:3, vgx2], z0.h, z0.h
+ smlall za.d[w8, 0:3, vgx4], z0.h, z0.h
+ smlall za.d[w8, 16:19], z0.h, z0.h
+ smlall za.d[w8, 0:3], z0.h, z16.h
+
+ smlall za.d[w8, 0:3, vgx4], { z0.h - z1.h }, z0.h
+ smlall za.d[w8, 8:11], { z0.h - z1.h }, z0.h
+ smlall za.d[w8, 0:3], { z0.h - z2.h }, z0.h
+ smlall za.d[w8, 0:3], { z0.h - z1.h }, z16.h
+
+ smlall za.d[w8, 0:3, vgx2], { z0.h - z3.h }, z0.h
+ smlall za.d[w8, 8:11], { z0.h - z3.h }, z0.h
+ smlall za.d[w8, 0:3], { z0.h - z3.h }, z16.h
+
+ smlall za.d[w8, 0:3, vgx4], { z0.h - z1.h }, { z0.h - z1.h }
+ smlall za.d[w8, 8:11], { z0.h - z1.h }, { z0.h - z1.h }
+ smlall za.d[w8, 0:3], { z1.h - z2.h }, { z0.h - z1.h }
+ smlall za.d[w8, 0:3], { z0.h - z1.h }, { z1.h - z2.h }
+
+ smlall za.d[w8, 0:3, vgx2], { z0.h - z3.h }, { z0.h - z3.h }
+ smlall za.d[w8, 8:11], { z0.h - z3.h }, { z0.h - z3.h }
+ smlall za.d[w8, 0:3], { z1.h - z4.h }, { z0.h - z3.h }
+ smlall za.d[w8, 0:3], { z2.h - z5.h }, { z0.h - z3.h }
+ smlall za.d[w8, 0:3], { z3.h - z6.h }, { z0.h - z3.h }
+ smlall za.d[w8, 0:3], { z0.h - z3.h }, { z1.h - z4.h }
+ smlall za.d[w8, 0:3], { z0.h - z3.h }, { z2.h - z5.h }
+ smlall za.d[w8, 0:3], { z0.h - z3.h }, { z3.h - z6.h }
+
+ sumlall za.d[w8, 0:3], z0.h, z0.h[0]
+ sumlall za.d[w8, 0:3], { z0.h - z1.h }, z0.h[0]
+ sumlall za.d[w8, 0:3], { z0.h - z3.h }, z0.h[0]
+ sumlall za.d[w8, 0:3], z0.h, z0.h
+ sumlall za.d[w8, 0:3], { z0.h - z1.h }, z0.h
+ sumlall za.d[w8, 0:3], { z0.h - z3.h }, z0.h
+ sumlall za.d[w8, 0:3], { z0.h - z1.h }, { z0.h - z1.h }
+ sumlall za.d[w8, 0:3], { z0.h - z3.h }, { z0.h - z3.h }
--- /dev/null
+#as: -march=armv8-a+sme2
+#source: sme2-i16i64-2.s
+#error_output: sme2-i16i64-2-noarch.l
--- /dev/null
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w11,0:3\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,12:15\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],z31\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],z0\.h,z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],z0\.h,z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w9,8:11\],z21\.h,z9\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w11,0:3\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,4:7\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z30\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w9,4:7\],{z18\.h-z19\.h},z9\.h\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w11,0:3\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,4:7\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z28\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w10,0:3\],{z24\.h-z27\.h},z14\.h\[6\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w11,0:3\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,12:15\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],z0\.h,z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w10,4:7\],z25\.h,z7\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w11,0:3\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,4:7\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z30\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z31\.h,z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z31\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w9,4:7\],{z19\.h-z20\.h},z13\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w11,0:3\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,4:7\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z28\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z29\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z30\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z31\.h-z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w9,0:3\],{z25\.h-z28\.h},z14\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w11,0:3\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,4:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w10,4:7\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w11,0:3\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,4:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w11,0:3\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w11,0:3\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,12:15\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],z31\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],z0\.h,z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],z0\.h,z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w9,8:11\],z21\.h,z9\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w11,0:3\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,4:7\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z30\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w9,4:7\],{z18\.h-z19\.h},z9\.h\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w11,0:3\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,4:7\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z28\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w10,0:3\],{z24\.h-z27\.h},z14\.h\[6\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w11,0:3\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,12:15\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],z0\.h,z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w10,4:7\],z25\.h,z7\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w11,0:3\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,4:7\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z30\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z31\.h,z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z31\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w9,4:7\],{z19\.h-z20\.h},z13\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w11,0:3\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,4:7\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z28\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z29\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z30\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z31\.h-z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w9,0:3\],{z25\.h-z28\.h},z14\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w11,0:3\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,4:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w10,4:7\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w11,0:3\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,4:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w11,0:3\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w11,0:3\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,12:15\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],z31\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],z0\.h,z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],z0\.h,z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w9,8:11\],z21\.h,z9\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w11,0:3\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,4:7\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z30\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w9,4:7\],{z18\.h-z19\.h},z9\.h\[5\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w11,0:3\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,4:7\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z28\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w10,0:3\],{z24\.h-z27\.h},z14\.h\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w11,0:3\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,12:15\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],z0\.h,z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w10,4:7\],z25\.h,z7\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w11,0:3\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,4:7\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z30\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z31\.h,z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z31\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w9,4:7\],{z19\.h-z20\.h},z13\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w11,0:3\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,4:7\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z28\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z29\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z30\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z31\.h-z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w9,0:3\],{z25\.h-z28\.h},z14\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w11,0:3\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,4:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w10,4:7\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w11,0:3\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,4:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w11,0:3\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w11,0:3\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,12:15\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],z31\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],z0\.h,z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],z0\.h,z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w9,8:11\],z21\.h,z9\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w11,0:3\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,4:7\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z30\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w9,4:7\],{z18\.h-z19\.h},z9\.h\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w11,0:3\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,4:7\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z28\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w10,0:3\],{z24\.h-z27\.h},z14\.h\[6\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w11,0:3\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,12:15\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],z0\.h,z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w10,4:7\],z25\.h,z7\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w11,0:3\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,4:7\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z30\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z31\.h,z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z31\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w9,4:7\],{z19\.h-z20\.h},z13\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w11,0:3\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,4:7\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z28\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z29\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z30\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z31\.h-z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w9,0:3\],{z25\.h-z28\.h},z14\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w11,0:3\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,4:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w10,4:7\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w11,0:3\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,4:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w11,0:3\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
--- /dev/null
+#as: -march=armv8-a+sme2+sme-i16i64
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
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+[^:]+: c1806000 smlall za\.d\[w11, 0:3\], z0\.h, z0\.h\[0\]
+[^:]+: c1800003 smlall za\.d\[w8, 12:15\], z0\.h, z0\.h\[0\]
+[^:]+: c18003e0 smlall za\.d\[w8, 0:3\], z31\.h, z0\.h\[0\]
+[^:]+: c18f0000 smlall za\.d\[w8, 0:3\], z0\.h, z15\.h\[0\]
+[^:]+: c1808c00 smlall za\.d\[w8, 0:3\], z0\.h, z0\.h\[7\]
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+[^:]+: c1900000 smlall za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1900000 smlall za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
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+[^:]+: c1606408 smlsll za\.d\[w11, 0:3\], z0\.h, z0\.h
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+ smlall za.d[w8, 4:7], { z0.h - z3.h }, z0.h[0]
+ smlall za.d[w8, 0:3], { z28.h - z31.h }, z0.h[0]
+ smlall za.d[w8, 0:3], { z0.h - z3.h }, z15.h[0]
+ smlall za.d[w8, 0:3], { z0.h - z3.h }, z0.h[7]
+ smlall za.d[w10, 0:3], { z24.h - z27.h }, z14.h[6]
+
+ smlall za.d[w8, 0:3], z0.h, z0.h
+ smlall za.d[w11, 0:3], z0.h, z0.h
+ smlall za.d[w8, 12:15], z0.h, z0.h
+ smlall za.d[w8, 0:3], z31.h, z0.h
+ smlall za.d[w8, 0:3], z0.h, z15.h
+ smlall za.d[w10, 4:7], z25.h, z7.h
+
+ smlall za.d[w8, 0:3], { z0.h - z1.h }, z0.h
+ smlall za.d[w8, 0:3, vgx2], { z0.h - z1.h }, z0.h
+ smlall za.d[w11, 0:3], { z0.h - z1.h }, z0.h
+ smlall za.d[w8, 4:7], { z0.h - z1.h }, z0.h
+ smlall za.d[w8, 0:3], { z30.h - z31.h }, z0.h
+ smlall za.d[w8, 0:3], { z31.h, z0.h }, z0.h
+ smlall za.d[w8, 0:3], { z31.h - z0.h }, z0.h
+ smlall za.d[w8, 0:3], { z0.h - z1.h }, z15.h
+ smlall za.d[w9, 4:7], { z19.h - z20.h }, z13.h
+
+ smlall za.d[w8, 0:3], { z0.h - z3.h }, z0.h
+ smlall za.d[w8, 0:3, vgx4], { z0.h - z3.h }, z0.h
+ smlall za.d[w11, 0:3], { z0.h - z3.h }, z0.h
+ smlall za.d[w8, 4:7], { z0.h - z3.h }, z0.h
+ smlall za.d[w8, 0:3], { z28.h - z31.h }, z0.h
+ smlall za.d[w8, 0:3], { z29.h - z0.h }, z0.h
+ smlall za.d[w8, 0:3], { z30.h, z31.h, z0.h, z1.h }, z0.h
+ smlall za.d[w8, 0:3], { z30.h - z1.h }, z0.h
+ smlall za.d[w8, 0:3], { z31.h - z2.h }, z0.h
+ smlall za.d[w8, 0:3], { z0.h - z3.h }, z15.h
+ smlall za.d[w9, 0:3], { z25.h - z28.h }, z14.h
+
+ smlall za.d[w8, 0:3], { z0.h - z1.h }, { z0.h - z1.h }
+ smlall za.d[w8, 0:3, vgx2], { z0.h - z1.h }, { z0.h - z1.h }
+ smlall za.d[w11, 0:3], { z0.h - z1.h }, { z0.h - z1.h }
+ smlall za.d[w8, 4:7], { z0.h - z1.h }, { z0.h - z1.h }
+ smlall za.d[w8, 0:3], { z30.h - z31.h }, { z0.h - z1.h }
+ smlall za.d[w8, 0:3], { z0.h - z1.h }, { z30.h - z31.h }
+ smlall za.d[w10, 4:7], { z22.h - z23.h }, { z18.h - z19.h }
+
+ smlall za.d[w8, 0:3], { z0.h - z3.h }, { z0.h - z3.h }
+ smlall za.d[w8, 0:3, vgx4], { z0.h - z3.h }, { z0.h - z3.h }
+ smlall za.d[w11, 0:3], { z0.h - z3.h }, { z0.h - z3.h }
+ smlall za.d[w8, 4:7], { z0.h - z3.h }, { z0.h - z3.h }
+ smlall za.d[w8, 0:3], { z28.h - z31.h }, { z0.h - z3.h }
+ smlall za.d[w8, 0:3], { z0.h - z3.h }, { z28.h - z31.h }
+ smlall za.d[w11, 0:3], { z16.h - z19.h }, { z24.h - z27.h }
+
+ smlsll za.d[w8, 0:3], z0.h, z0.h[0]
+ smlsll za.d[w11, 0:3], z0.h, z0.h[0]
+ smlsll za.d[w8, 12:15], z0.h, z0.h[0]
+ smlsll za.d[w8, 0:3], z31.h, z0.h[0]
+ smlsll za.d[w8, 0:3], z0.h, z15.h[0]
+ smlsll za.d[w8, 0:3], z0.h, z0.h[7]
+ smlsll za.d[w9, 8:11], z21.h, z9.h[3]
+
+ smlsll za.d[w8, 0:3], { z0.h - z1.h }, z0.h[0]
+ smlsll za.d[w8, 0:3, vgx2], { z0.h - z1.h }, z0.h[0]
+ smlsll za.d[w11, 0:3], { z0.h - z1.h }, z0.h[0]
+ smlsll za.d[w8, 4:7], { z0.h - z1.h }, z0.h[0]
+ smlsll za.d[w8, 0:3], { z30.h - z31.h }, z0.h[0]
+ smlsll za.d[w8, 0:3], { z0.h - z1.h }, z15.h[0]
+ smlsll za.d[w8, 0:3], { z0.h - z1.h }, z0.h[7]
+ smlsll za.d[w9, 4:7], { z18.h - z19.h }, z9.h[2]
+
+ smlsll za.d[w8, 0:3], { z0.h - z3.h }, z0.h[0]
+ smlsll za.d[w8, 0:3, vgx4], { z0.h - z3.h }, z0.h[0]
+ smlsll za.d[w11, 0:3], { z0.h - z3.h }, z0.h[0]
+ smlsll za.d[w8, 4:7], { z0.h - z3.h }, z0.h[0]
+ smlsll za.d[w8, 0:3], { z28.h - z31.h }, z0.h[0]
+ smlsll za.d[w8, 0:3], { z0.h - z3.h }, z15.h[0]
+ smlsll za.d[w8, 0:3], { z0.h - z3.h }, z0.h[7]
+ smlsll za.d[w10, 0:3], { z24.h - z27.h }, z14.h[6]
+
+ smlsll za.d[w8, 0:3], z0.h, z0.h
+ smlsll za.d[w11, 0:3], z0.h, z0.h
+ smlsll za.d[w8, 12:15], z0.h, z0.h
+ smlsll za.d[w8, 0:3], z31.h, z0.h
+ smlsll za.d[w8, 0:3], z0.h, z15.h
+ smlsll za.d[w10, 4:7], z25.h, z7.h
+
+ smlsll za.d[w8, 0:3], { z0.h - z1.h }, z0.h
+ smlsll za.d[w8, 0:3, vgx2], { z0.h - z1.h }, z0.h
+ smlsll za.d[w11, 0:3], { z0.h - z1.h }, z0.h
+ smlsll za.d[w8, 4:7], { z0.h - z1.h }, z0.h
+ smlsll za.d[w8, 0:3], { z30.h - z31.h }, z0.h
+ smlsll za.d[w8, 0:3], { z31.h, z0.h }, z0.h
+ smlsll za.d[w8, 0:3], { z31.h - z0.h }, z0.h
+ smlsll za.d[w8, 0:3], { z0.h - z1.h }, z15.h
+ smlsll za.d[w9, 4:7], { z19.h - z20.h }, z13.h
+
+ smlsll za.d[w8, 0:3], { z0.h - z3.h }, z0.h
+ smlsll za.d[w8, 0:3, vgx4], { z0.h - z3.h }, z0.h
+ smlsll za.d[w11, 0:3], { z0.h - z3.h }, z0.h
+ smlsll za.d[w8, 4:7], { z0.h - z3.h }, z0.h
+ smlsll za.d[w8, 0:3], { z28.h - z31.h }, z0.h
+ smlsll za.d[w8, 0:3], { z29.h - z0.h }, z0.h
+ smlsll za.d[w8, 0:3], { z30.h, z31.h, z0.h, z1.h }, z0.h
+ smlsll za.d[w8, 0:3], { z30.h - z1.h }, z0.h
+ smlsll za.d[w8, 0:3], { z31.h - z2.h }, z0.h
+ smlsll za.d[w8, 0:3], { z0.h - z3.h }, z15.h
+ smlsll za.d[w9, 0:3], { z25.h - z28.h }, z14.h
+
+ smlsll za.d[w8, 0:3], { z0.h - z1.h }, { z0.h - z1.h }
+ smlsll za.d[w8, 0:3, vgx2], { z0.h - z1.h }, { z0.h - z1.h }
+ smlsll za.d[w11, 0:3], { z0.h - z1.h }, { z0.h - z1.h }
+ smlsll za.d[w8, 4:7], { z0.h - z1.h }, { z0.h - z1.h }
+ smlsll za.d[w8, 0:3], { z30.h - z31.h }, { z0.h - z1.h }
+ smlsll za.d[w8, 0:3], { z0.h - z1.h }, { z30.h - z31.h }
+ smlsll za.d[w10, 4:7], { z22.h - z23.h }, { z18.h - z19.h }
+
+ smlsll za.d[w8, 0:3], { z0.h - z3.h }, { z0.h - z3.h }
+ smlsll za.d[w8, 0:3, vgx4], { z0.h - z3.h }, { z0.h - z3.h }
+ smlsll za.d[w11, 0:3], { z0.h - z3.h }, { z0.h - z3.h }
+ smlsll za.d[w8, 4:7], { z0.h - z3.h }, { z0.h - z3.h }
+ smlsll za.d[w8, 0:3], { z28.h - z31.h }, { z0.h - z3.h }
+ smlsll za.d[w8, 0:3], { z0.h - z3.h }, { z28.h - z31.h }
+ smlsll za.d[w11, 0:3], { z16.h - z19.h }, { z24.h - z27.h }
+
+ umlall za.d[w8, 0:3], z0.h, z0.h[0]
+ umlall za.d[w11, 0:3], z0.h, z0.h[0]
+ umlall za.d[w8, 12:15], z0.h, z0.h[0]
+ umlall za.d[w8, 0:3], z31.h, z0.h[0]
+ umlall za.d[w8, 0:3], z0.h, z15.h[0]
+ umlall za.d[w8, 0:3], z0.h, z0.h[7]
+ umlall za.d[w9, 8:11], z21.h, z9.h[3]
+
+ umlall za.d[w8, 0:3], { z0.h - z1.h }, z0.h[0]
+ umlall za.d[w8, 0:3, vgx2], { z0.h - z1.h }, z0.h[0]
+ umlall za.d[w11, 0:3], { z0.h - z1.h }, z0.h[0]
+ umlall za.d[w8, 4:7], { z0.h - z1.h }, z0.h[0]
+ umlall za.d[w8, 0:3], { z30.h - z31.h }, z0.h[0]
+ umlall za.d[w8, 0:3], { z0.h - z1.h }, z15.h[0]
+ umlall za.d[w8, 0:3], { z0.h - z1.h }, z0.h[7]
+ umlall za.d[w9, 4:7], { z18.h - z19.h }, z9.h[5]
+
+ umlall za.d[w8, 0:3], { z0.h - z3.h }, z0.h[0]
+ umlall za.d[w8, 0:3, vgx4], { z0.h - z3.h }, z0.h[0]
+ umlall za.d[w11, 0:3], { z0.h - z3.h }, z0.h[0]
+ umlall za.d[w8, 4:7], { z0.h - z3.h }, z0.h[0]
+ umlall za.d[w8, 0:3], { z28.h - z31.h }, z0.h[0]
+ umlall za.d[w8, 0:3], { z0.h - z3.h }, z15.h[0]
+ umlall za.d[w8, 0:3], { z0.h - z3.h }, z0.h[7]
+ umlall za.d[w10, 0:3], { z24.h - z27.h }, z14.h[1]
+
+ umlall za.d[w8, 0:3], z0.h, z0.h
+ umlall za.d[w11, 0:3], z0.h, z0.h
+ umlall za.d[w8, 12:15], z0.h, z0.h
+ umlall za.d[w8, 0:3], z31.h, z0.h
+ umlall za.d[w8, 0:3], z0.h, z15.h
+ umlall za.d[w10, 4:7], z25.h, z7.h
+
+ umlall za.d[w8, 0:3], { z0.h - z1.h }, z0.h
+ umlall za.d[w8, 0:3, vgx2], { z0.h - z1.h }, z0.h
+ umlall za.d[w11, 0:3], { z0.h - z1.h }, z0.h
+ umlall za.d[w8, 4:7], { z0.h - z1.h }, z0.h
+ umlall za.d[w8, 0:3], { z30.h - z31.h }, z0.h
+ umlall za.d[w8, 0:3], { z31.h, z0.h }, z0.h
+ umlall za.d[w8, 0:3], { z31.h - z0.h }, z0.h
+ umlall za.d[w8, 0:3], { z0.h - z1.h }, z15.h
+ umlall za.d[w9, 4:7], { z19.h - z20.h }, z13.h
+
+ umlall za.d[w8, 0:3], { z0.h - z3.h }, z0.h
+ umlall za.d[w8, 0:3, vgx4], { z0.h - z3.h }, z0.h
+ umlall za.d[w11, 0:3], { z0.h - z3.h }, z0.h
+ umlall za.d[w8, 4:7], { z0.h - z3.h }, z0.h
+ umlall za.d[w8, 0:3], { z28.h - z31.h }, z0.h
+ umlall za.d[w8, 0:3], { z29.h - z0.h }, z0.h
+ umlall za.d[w8, 0:3], { z30.h, z31.h, z0.h, z1.h }, z0.h
+ umlall za.d[w8, 0:3], { z30.h - z1.h }, z0.h
+ umlall za.d[w8, 0:3], { z31.h - z2.h }, z0.h
+ umlall za.d[w8, 0:3], { z0.h - z3.h }, z15.h
+ umlall za.d[w9, 0:3], { z25.h - z28.h }, z14.h
+
+ umlall za.d[w8, 0:3], { z0.h - z1.h }, { z0.h - z1.h }
+ umlall za.d[w8, 0:3, vgx2], { z0.h - z1.h }, { z0.h - z1.h }
+ umlall za.d[w11, 0:3], { z0.h - z1.h }, { z0.h - z1.h }
+ umlall za.d[w8, 4:7], { z0.h - z1.h }, { z0.h - z1.h }
+ umlall za.d[w8, 0:3], { z30.h - z31.h }, { z0.h - z1.h }
+ umlall za.d[w8, 0:3], { z0.h - z1.h }, { z30.h - z31.h }
+ umlall za.d[w10, 4:7], { z22.h - z23.h }, { z18.h - z19.h }
+
+ umlall za.d[w8, 0:3], { z0.h - z3.h }, { z0.h - z3.h }
+ umlall za.d[w8, 0:3, vgx4], { z0.h - z3.h }, { z0.h - z3.h }
+ umlall za.d[w11, 0:3], { z0.h - z3.h }, { z0.h - z3.h }
+ umlall za.d[w8, 4:7], { z0.h - z3.h }, { z0.h - z3.h }
+ umlall za.d[w8, 0:3], { z28.h - z31.h }, { z0.h - z3.h }
+ umlall za.d[w8, 0:3], { z0.h - z3.h }, { z28.h - z31.h }
+ umlall za.d[w11, 0:3], { z16.h - z19.h }, { z24.h - z27.h }
+
+ umlsll za.d[w8, 0:3], z0.h, z0.h[0]
+ umlsll za.d[w11, 0:3], z0.h, z0.h[0]
+ umlsll za.d[w8, 12:15], z0.h, z0.h[0]
+ umlsll za.d[w8, 0:3], z31.h, z0.h[0]
+ umlsll za.d[w8, 0:3], z0.h, z15.h[0]
+ umlsll za.d[w8, 0:3], z0.h, z0.h[7]
+ umlsll za.d[w9, 8:11], z21.h, z9.h[3]
+
+ umlsll za.d[w8, 0:3], { z0.h - z1.h }, z0.h[0]
+ umlsll za.d[w8, 0:3, vgx2], { z0.h - z1.h }, z0.h[0]
+ umlsll za.d[w11, 0:3], { z0.h - z1.h }, z0.h[0]
+ umlsll za.d[w8, 4:7], { z0.h - z1.h }, z0.h[0]
+ umlsll za.d[w8, 0:3], { z30.h - z31.h }, z0.h[0]
+ umlsll za.d[w8, 0:3], { z0.h - z1.h }, z15.h[0]
+ umlsll za.d[w8, 0:3], { z0.h - z1.h }, z0.h[7]
+ umlsll za.d[w9, 4:7], { z18.h - z19.h }, z9.h[2]
+
+ umlsll za.d[w8, 0:3], { z0.h - z3.h }, z0.h[0]
+ umlsll za.d[w8, 0:3, vgx4], { z0.h - z3.h }, z0.h[0]
+ umlsll za.d[w11, 0:3], { z0.h - z3.h }, z0.h[0]
+ umlsll za.d[w8, 4:7], { z0.h - z3.h }, z0.h[0]
+ umlsll za.d[w8, 0:3], { z28.h - z31.h }, z0.h[0]
+ umlsll za.d[w8, 0:3], { z0.h - z3.h }, z15.h[0]
+ umlsll za.d[w8, 0:3], { z0.h - z3.h }, z0.h[7]
+ umlsll za.d[w10, 0:3], { z24.h - z27.h }, z14.h[6]
+
+ umlsll za.d[w8, 0:3], z0.h, z0.h
+ umlsll za.d[w11, 0:3], z0.h, z0.h
+ umlsll za.d[w8, 12:15], z0.h, z0.h
+ umlsll za.d[w8, 0:3], z31.h, z0.h
+ umlsll za.d[w8, 0:3], z0.h, z15.h
+ umlsll za.d[w10, 4:7], z25.h, z7.h
+
+ umlsll za.d[w8, 0:3], { z0.h - z1.h }, z0.h
+ umlsll za.d[w8, 0:3, vgx2], { z0.h - z1.h }, z0.h
+ umlsll za.d[w11, 0:3], { z0.h - z1.h }, z0.h
+ umlsll za.d[w8, 4:7], { z0.h - z1.h }, z0.h
+ umlsll za.d[w8, 0:3], { z30.h - z31.h }, z0.h
+ umlsll za.d[w8, 0:3], { z31.h, z0.h }, z0.h
+ umlsll za.d[w8, 0:3], { z31.h - z0.h }, z0.h
+ umlsll za.d[w8, 0:3], { z0.h - z1.h }, z15.h
+ umlsll za.d[w9, 4:7], { z19.h - z20.h }, z13.h
+
+ umlsll za.d[w8, 0:3], { z0.h - z3.h }, z0.h
+ umlsll za.d[w8, 0:3, vgx4], { z0.h - z3.h }, z0.h
+ umlsll za.d[w11, 0:3], { z0.h - z3.h }, z0.h
+ umlsll za.d[w8, 4:7], { z0.h - z3.h }, z0.h
+ umlsll za.d[w8, 0:3], { z28.h - z31.h }, z0.h
+ umlsll za.d[w8, 0:3], { z29.h - z0.h }, z0.h
+ umlsll za.d[w8, 0:3], { z30.h, z31.h, z0.h, z1.h }, z0.h
+ umlsll za.d[w8, 0:3], { z30.h - z1.h }, z0.h
+ umlsll za.d[w8, 0:3], { z31.h - z2.h }, z0.h
+ umlsll za.d[w8, 0:3], { z0.h - z3.h }, z15.h
+ umlsll za.d[w9, 0:3], { z25.h - z28.h }, z14.h
+
+ umlsll za.d[w8, 0:3], { z0.h - z1.h }, { z0.h - z1.h }
+ umlsll za.d[w8, 0:3, vgx2], { z0.h - z1.h }, { z0.h - z1.h }
+ umlsll za.d[w11, 0:3], { z0.h - z1.h }, { z0.h - z1.h }
+ umlsll za.d[w8, 4:7], { z0.h - z1.h }, { z0.h - z1.h }
+ umlsll za.d[w8, 0:3], { z30.h - z31.h }, { z0.h - z1.h }
+ umlsll za.d[w8, 0:3], { z0.h - z1.h }, { z30.h - z31.h }
+ umlsll za.d[w10, 4:7], { z22.h - z23.h }, { z18.h - z19.h }
+
+ umlsll za.d[w8, 0:3], { z0.h - z3.h }, { z0.h - z3.h }
+ umlsll za.d[w8, 0:3, vgx4], { z0.h - z3.h }, { z0.h - z3.h }
+ umlsll za.d[w11, 0:3], { z0.h - z3.h }, { z0.h - z3.h }
+ umlsll za.d[w8, 4:7], { z0.h - z3.h }, { z0.h - z3.h }
+ umlsll za.d[w8, 0:3], { z28.h - z31.h }, { z0.h - z3.h }
+ umlsll za.d[w8, 0:3], { z0.h - z3.h }, { z28.h - z31.h }
+ umlsll za.d[w11, 0:3], { z16.h - z19.h }, { z24.h - z27.h }
AARCH64_OPND_SME_PNn3_INDEX2, /* Indexed pred-as-counter reg, bits [9:5]. */
AARCH64_OPND_SME_list_of_64bit_tiles, /* SME list of ZA tiles. */
AARCH64_OPND_SME_ZA_HV_idx_ldstr, /* SME destination ZA tile vector. */
+ AARCH64_OPND_SME_ZA_array_off1x4, /* SME ZA[<Wv>, #<imm1>*4:<imm1>*4+3]. */
AARCH64_OPND_SME_ZA_array_off2x2, /* SME ZA[<Wv>, #<imm2>*2:<imm2>*2+1]. */
+ AARCH64_OPND_SME_ZA_array_off2x4, /* SME ZA[<Wv>, #<imm2>*4:<imm2>*4+3]. */
AARCH64_OPND_SME_ZA_array_off3_0, /* SME ZA[<Wv>{, #<imm3>}]. */
AARCH64_OPND_SME_ZA_array_off3_5, /* SME ZA[<Wv>{, #<imm3>}]. */
AARCH64_OPND_SME_ZA_array_off3x2, /* SME ZA[<Wv>, #<imm3>*2:<imm3>*2+1]. */
AARCH64_OPND_SME_PnT_Wm_imm, /* SME <Pn>.<T>[<Wm>, #<imm>]. */
AARCH64_OPND_SME_Zm_INDEX1, /* Zn.T[index], bits [19:16,10]. */
AARCH64_OPND_SME_Zm_INDEX2, /* Zn.T[index], bits [19:16,11:10]. */
+ AARCH64_OPND_SME_Zm_INDEX3_1, /* Zn.T[index], bits [19:16,10,2:1]. */
AARCH64_OPND_SME_Zm_INDEX3_2, /* Zn.T[index], bits [19:16,11:10,2]. */
AARCH64_OPND_SME_Zm_INDEX3_10, /* Zn.T[index], bits [19:16,15,11:10]. */
+ AARCH64_OPND_SME_Zm_INDEX4_1, /* Zn.T[index], bits [19:16,11:10,2:1]. */
+ AARCH64_OPND_SME_Zm_INDEX4_10, /* Zn.T[index], bits [19:16,15,12:10]. */
AARCH64_OPND_SME_Zn_INDEX1_16, /* Zn[index], bits [9:5] and [16:16]. */
AARCH64_OPND_SME_Zn_INDEX2_15, /* Zn[index], bits [9:5] and [16:15]. */
AARCH64_OPND_SME_Zn_INDEX2_16, /* Zn[index], bits [9:5] and [17:16]. */
case 33:
case 34:
case 35:
- case 263:
+ case 268:
return aarch64_ins_reglane (self, info, code, inst, errors);
case 36:
return aarch64_ins_reglist (self, info, code, inst, errors);
case 193:
case 194:
case 237:
- case 257:
- case 258:
- case 260:
case 262:
+ case 263:
+ case 265:
case 267:
- case 268:
+ case 272:
+ case 273:
return aarch64_ins_imm (self, info, code, inst, errors);
case 44:
case 45:
case 107:
return aarch64_ins_prfop (self, info, code, inst, errors);
case 108:
- case 259:
- case 261:
+ case 264:
+ case 266:
return aarch64_ins_none (self, info, code, inst, errors);
case 109:
return aarch64_ins_hint (self, info, code, inst, errors);
return aarch64_ins_sme_za_hv_tiles_range (self, info, code, inst, errors);
case 235:
case 236:
- case 247:
- case 248:
case 249:
case 250:
case 251:
case 254:
case 255:
case 256:
+ case 257:
+ case 258:
+ case 259:
+ case 260:
+ case 261:
return aarch64_ins_simple_index (self, info, code, inst, errors);
case 239:
case 240:
case 241:
case 242:
case 243:
- return aarch64_ins_sme_za_array (self, info, code, inst, errors);
case 244:
- return aarch64_ins_sme_addr_ri_u4xvl (self, info, code, inst, errors);
case 245:
- return aarch64_ins_sme_sm_za (self, info, code, inst, errors);
+ return aarch64_ins_sme_za_array (self, info, code, inst, errors);
case 246:
+ return aarch64_ins_sme_addr_ri_u4xvl (self, info, code, inst, errors);
+ case 247:
+ return aarch64_ins_sme_sm_za (self, info, code, inst, errors);
+ case 248:
return aarch64_ins_sme_pred_reg_with_index (self, info, code, inst, errors);
- case 264:
- case 265:
- case 266:
+ case 269:
+ case 270:
+ case 271:
return aarch64_ins_x0_to_x30 (self, info, code, inst, errors);
default: assert (0); abort ();
}
10987654321098765432109876543210
x1000000x10x100xxxxxxxxxxxxxxxxx
zero. */
- return 2734;
+ return 2779;
}
}
}
10987654321098765432109876543210
x0x00000001xxxxx000xxxxxxxxxxxx0
st1b. */
- return 2631;
+ return 2647;
}
else
{
10987654321098765432109876543210
x0x00000001xxxxx100xxxxxxxxxxxx0
st1b. */
- return 2632;
+ return 2648;
}
}
else
10987654321098765432109876543210
x0x00000001xxxxx010xxxxxxxxxxxx0
st1w. */
- return 2655;
+ return 2671;
}
else
{
10987654321098765432109876543210
x0x00000001xxxxx110xxxxxxxxxxxx0
st1w. */
- return 2656;
+ return 2672;
}
}
}
10987654321098765432109876543210
x0x00000001xxxxx001xxxxxxxxxxxx0
st1h. */
- return 2647;
+ return 2663;
}
else
{
10987654321098765432109876543210
x0x00000001xxxxx101xxxxxxxxxxxx0
st1h. */
- return 2648;
+ return 2664;
}
}
else
10987654321098765432109876543210
x0x00000001xxxxx011xxxxxxxxxxxx0
st1d. */
- return 2639;
+ return 2655;
}
else
{
10987654321098765432109876543210
x0x00000001xxxxx111xxxxxxxxxxxx0
st1d. */
- return 2640;
+ return 2656;
}
}
}
10987654321098765432109876543210
x0x00000001xxxxx000xxxxxxxxxxxx1
stnt1b. */
- return 2663;
+ return 2679;
}
else
{
10987654321098765432109876543210
x0x00000001xxxxx100xxxxxxxxxxxx1
stnt1b. */
- return 2664;
+ return 2680;
}
}
else
10987654321098765432109876543210
x0x00000001xxxxx010xxxxxxxxxxxx1
stnt1w. */
- return 2687;
+ return 2703;
}
else
{
10987654321098765432109876543210
x0x00000001xxxxx110xxxxxxxxxxxx1
stnt1w. */
- return 2688;
+ return 2704;
}
}
}
10987654321098765432109876543210
x0x00000001xxxxx001xxxxxxxxxxxx1
stnt1h. */
- return 2679;
+ return 2695;
}
else
{
10987654321098765432109876543210
x0x00000001xxxxx101xxxxxxxxxxxx1
stnt1h. */
- return 2680;
+ return 2696;
}
}
else
10987654321098765432109876543210
x0x00000001xxxxx011xxxxxxxxxxxx1
stnt1d. */
- return 2671;
+ return 2687;
}
else
{
10987654321098765432109876543210
x0x00000001xxxxx111xxxxxxxxxxxx1
stnt1d. */
- return 2672;
+ return 2688;
}
}
}
10987654321098765432109876543210
x0x00000011xxxxx000xxxxxxxxxxxx0
st1b. */
- return 2627;
+ return 2643;
}
else
{
10987654321098765432109876543210
x0x00000011xxxxx100xxxxxxxxxxxx0
st1b. */
- return 2628;
+ return 2644;
}
}
else
10987654321098765432109876543210
x0x00000011xxxxx010xxxxxxxxxxxx0
st1w. */
- return 2651;
+ return 2667;
}
else
{
10987654321098765432109876543210
x0x00000011xxxxx110xxxxxxxxxxxx0
st1w. */
- return 2652;
+ return 2668;
}
}
}
10987654321098765432109876543210
x0x00000011xxxxx001xxxxxxxxxxxx0
st1h. */
- return 2643;
+ return 2659;
}
else
{
10987654321098765432109876543210
x0x00000011xxxxx101xxxxxxxxxxxx0
st1h. */
- return 2644;
+ return 2660;
}
}
else
10987654321098765432109876543210
x0x00000011xxxxx011xxxxxxxxxxxx0
st1d. */
- return 2635;
+ return 2651;
}
else
{
10987654321098765432109876543210
x0x00000011xxxxx111xxxxxxxxxxxx0
st1d. */
- return 2636;
+ return 2652;
}
}
}
10987654321098765432109876543210
x0x00000011xxxxx000xxxxxxxxxxxx1
stnt1b. */
- return 2659;
+ return 2675;
}
else
{
10987654321098765432109876543210
x0x00000011xxxxx100xxxxxxxxxxxx1
stnt1b. */
- return 2660;
+ return 2676;
}
}
else
10987654321098765432109876543210
x0x00000011xxxxx010xxxxxxxxxxxx1
stnt1w. */
- return 2683;
+ return 2699;
}
else
{
10987654321098765432109876543210
x0x00000011xxxxx110xxxxxxxxxxxx1
stnt1w. */
- return 2684;
+ return 2700;
}
}
}
10987654321098765432109876543210
x0x00000011xxxxx001xxxxxxxxxxxx1
stnt1h. */
- return 2675;
+ return 2691;
}
else
{
10987654321098765432109876543210
x0x00000011xxxxx101xxxxxxxxxxxx1
stnt1h. */
- return 2676;
+ return 2692;
}
}
else
10987654321098765432109876543210
x0x00000011xxxxx011xxxxxxxxxxxx1
stnt1d. */
- return 2667;
+ return 2683;
}
else
{
10987654321098765432109876543210
x0x00000011xxxxx111xxxxxxxxxxxx1
stnt1d. */
- return 2668;
+ return 2684;
}
}
}
{
if (((word >> 23) & 0x1) == 0)
{
- if (((word >> 15) & 0x1) == 0)
+ if (((word >> 29) & 0x1) == 0)
{
- if (((word >> 30) & 0x1) == 0)
+ if (((word >> 3) & 0x1) == 0)
{
- if (((word >> 3) & 0x1) == 0)
+ if (((word >> 4) & 0x1) == 0)
{
- if (((word >> 13) & 0x1) == 0)
+ if (((word >> 20) & 0x1) == 0)
{
- if (((word >> 14) & 0x1) == 0)
+ if (((word >> 2) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x0x00001000xxxxx000xxxxxxxxx0xxx
- ld1b. */
- return 2507;
+ xx0000010000xxxxxxxxxxxxxxx000xx
+ smlall. */
+ return 2611;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x0x00001000xxxxx010xxxxxxxxx0xxx
- ld1w. */
- return 2531;
+ xx0000010000xxxxxxxxxxxxxxx001xx
+ usmlall. */
+ return 2763;
}
}
else
{
- if (((word >> 14) & 0x1) == 0)
+ if (((word >> 5) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x0x00001000xxxxx001xxxxxxxxx0xxx
- ld1h. */
- return 2523;
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000010001xxxx0xxxxxxxxx000xxx
+ smlall. */
+ return 2612;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000010001xxxx1xxxxxxxxx000xxx
+ smlall. */
+ return 2613;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x0x00001000xxxxx011xxxxxxxxx0xxx
- ld1d. */
- return 2515;
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000010001xxxx0xxxxxxxxx100xxx
+ usmlall. */
+ return 2764;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000010001xxxx1xxxxxxxxx100xxx
+ usmlall. */
+ return 2765;
+ }
}
}
}
else
{
- if (((word >> 13) & 0x1) == 0)
+ if (((word >> 20) & 0x1) == 0)
{
- if (((word >> 14) & 0x1) == 0)
+ if (((word >> 2) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x0x00001000xxxxx000xxxxxxxxx1xxx
- ldnt1b. */
- return 2539;
+ xx0000010000xxxxxxxxxxxxxxx100xx
+ umlall. */
+ return 2735;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x0x00001000xxxxx010xxxxxxxxx1xxx
- ldnt1w. */
- return 2563;
+ xx0000010000xxxxxxxxxxxxxxx101xx
+ sumlall. */
+ return 2714;
}
}
else
{
- if (((word >> 14) & 0x1) == 0)
+ if (((word >> 5) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x0x00001000xxxxx001xxxxxxxxx1xxx
- ldnt1h. */
- return 2555;
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000010001xxxx0xxxxxxxxx010xxx
+ umlall. */
+ return 2736;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000010001xxxx1xxxxxxxxx010xxx
+ umlall. */
+ return 2737;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x0x00001000xxxxx011xxxxxxxxx1xxx
- ldnt1d. */
- return 2547;
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000010001xxxx0xxxxxxxxx110xxx
+ sumlall. */
+ return 2715;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000010001xxxx1xxxxxxxxx110xxx
+ sumlall. */
+ return 2716;
+ }
}
}
}
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1x00001000xxxxx0xxxxxxxxxxxxxxx
- ldr. */
- return 2413;
- }
- }
- else
- {
- if (((word >> 3) & 0x1) == 0)
- {
- if (((word >> 13) & 0x1) == 0)
+ if (((word >> 4) & 0x1) == 0)
{
- if (((word >> 14) & 0x1) == 0)
+ if (((word >> 20) & 0x1) == 0)
{
- if (((word >> 30) & 0x1) == 0)
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000010000xxxxxxxxxxxxxxx01xxx
+ smlsll. */
+ return 2627;
+ }
+ else
+ {
+ if (((word >> 15) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x0x00001000xxxxx100xxxxxxxxx0xxx
- ld1b. */
- return 2508;
+ xx0000010001xxxx0xxxxxxxxxx01xxx
+ smlsll. */
+ return 2628;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1x00001000xxxxx100xxxxxxxxx0xxx
- ldr. */
- return 2565;
+ xx0000010001xxxx1xxxxxxxxxx01xxx
+ smlsll. */
+ return 2629;
}
}
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001000xxxxx110xxxxxxxxx0xxx
- ld1w. */
- return 2532;
- }
- }
- else
- {
- if (((word >> 14) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001000xxxxx101xxxxxxxxx0xxx
- ld1h. */
- return 2524;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001000xxxxx111xxxxxxxxx0xxx
- ld1d. */
- return 2516;
- }
- }
- }
- else
- {
- if (((word >> 13) & 0x1) == 0)
- {
- if (((word >> 14) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001000xxxxx100xxxxxxxxx1xxx
- ldnt1b. */
- return 2540;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001000xxxxx110xxxxxxxxx1xxx
- ldnt1w. */
- return 2564;
- }
}
else
{
- if (((word >> 14) & 0x1) == 0)
+ if (((word >> 20) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- xxx00001000xxxxx101xxxxxxxxx1xxx
- ldnt1h. */
- return 2556;
+ xx0000010000xxxxxxxxxxxxxxx11xxx
+ umlsll. */
+ return 2751;
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001000xxxxx111xxxxxxxxx1xxx
- ldnt1d. */
- return 2548;
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000010001xxxx0xxxxxxxxxx11xxx
+ umlsll. */
+ return 2752;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000010001xxxx1xxxxxxxxxx11xxx
+ umlsll. */
+ return 2753;
+ }
}
}
}
}
- }
- else
- {
- if (((word >> 3) & 0x1) == 0)
+ else
{
- if (((word >> 4) & 0x1) == 0)
+ if (((word >> 15) & 0x1) == 0)
{
- if (((word >> 29) & 0x1) == 0)
+ if (((word >> 30) & 0x1) == 0)
{
- if (((word >> 30) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x0000001100xxxxxxxxxxxxxxxx00xxx
- bfmopa. */
- return 2363;
- }
- else
+ if (((word >> 3) & 0x1) == 0)
{
- if (((word >> 20) & 0x1) == 0)
+ if (((word >> 13) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x10000011000xxxxxxxxxxxxxxx00xxx
- fmlal. */
- return 2477;
+ if (((word >> 14) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100001000xxxxx000xxxxxxxxx0xxx
+ ld1b. */
+ return 2507;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100001000xxxxx010xxxxxxxxx0xxx
+ ld1w. */
+ return 2531;
+ }
}
else
{
- if (((word >> 15) & 0x1) == 0)
+ if (((word >> 14) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000011001xxxx0xxxxxxxxxx00xxx
- fmlal. */
- return 2478;
+ x0100001000xxxxx001xxxxxxxxx0xxx
+ ld1h. */
+ return 2523;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000011001xxxx1xxxxxxxxxx00xxx
- fmlal. */
- return 2479;
+ x0100001000xxxxx011xxxxxxxxx0xxx
+ ld1d. */
+ return 2515;
}
}
}
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xx100001100xxxxxxxxxxxxxxxx00xxx
- usmopa. */
- return 2384;
- }
- }
- else
- {
- if (((word >> 29) & 0x1) == 0)
- {
- if (((word >> 30) & 0x1) == 0)
+ else
+ {
+ if (((word >> 13) & 0x1) == 0)
+ {
+ if (((word >> 14) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100001000xxxxx000xxxxxxxxx1xxx
+ ldnt1b. */
+ return 2539;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100001000xxxxx010xxxxxxxxx1xxx
+ ldnt1w. */
+ return 2563;
+ }
+ }
+ else
+ {
+ if (((word >> 14) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100001000xxxxx001xxxxxxxxx1xxx
+ ldnt1h. */
+ return 2555;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100001000xxxxx011xxxxxxxxx1xxx
+ ldnt1d. */
+ return 2547;
+ }
+ }
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1100001000xxxxx0xxxxxxxxxxxxxxx
+ ldr. */
+ return 2413;
+ }
+ }
+ else
+ {
+ if (((word >> 3) & 0x1) == 0)
+ {
+ if (((word >> 13) & 0x1) == 0)
+ {
+ if (((word >> 14) & 0x1) == 0)
+ {
+ if (((word >> 30) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100001000xxxxx100xxxxxxxxx0xxx
+ ld1b. */
+ return 2508;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1100001000xxxxx100xxxxxxxxx0xxx
+ ldr. */
+ return 2565;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx100001000xxxxx110xxxxxxxxx0xxx
+ ld1w. */
+ return 2532;
+ }
+ }
+ else
+ {
+ if (((word >> 14) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx100001000xxxxx101xxxxxxxxx0xxx
+ ld1h. */
+ return 2524;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx100001000xxxxx111xxxxxxxxx0xxx
+ ld1d. */
+ return 2516;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 13) & 0x1) == 0)
+ {
+ if (((word >> 14) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx100001000xxxxx100xxxxxxxxx1xxx
+ ldnt1b. */
+ return 2540;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx100001000xxxxx110xxxxxxxxx1xxx
+ ldnt1w. */
+ return 2564;
+ }
+ }
+ else
+ {
+ if (((word >> 14) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx100001000xxxxx101xxxxxxxxx1xxx
+ ldnt1h. */
+ return 2556;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx100001000xxxxx111xxxxxxxxx1xxx
+ ldnt1d. */
+ return 2548;
+ }
+ }
+ }
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 3) & 0x1) == 0)
+ {
+ if (((word >> 4) & 0x1) == 0)
+ {
+ if (((word >> 29) & 0x1) == 0)
+ {
+ if (((word >> 30) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0000001100xxxxxxxxxxxxxxxx00xxx
+ bfmopa. */
+ return 2363;
+ }
+ else
+ {
+ if (((word >> 12) & 0x1) == 0)
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011000xxxxxxx0xxxxxxx00xxx
+ smlall. */
+ return 2780;
+ }
+ else
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011001xxxx0xx0xxxxxxx00xxx
+ smlall. */
+ return 2781;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011001xxxx1xx0xxxxxxx00xxx
+ smlall. */
+ return 2782;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011000xxxxxxx1xxxxxxx00xxx
+ fmlal. */
+ return 2477;
+ }
+ else
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011001xxxx0xx1xxxxxxx00xxx
+ fmlal. */
+ return 2478;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011001xxxx1xx1xxxxxxx00xxx
+ fmlal. */
+ return 2479;
+ }
+ }
+ }
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx100001100xxxxxxxxxxxxxxxx00xxx
+ usmopa. */
+ return 2384;
+ }
+ }
+ else
+ {
+ if (((word >> 29) & 0x1) == 0)
+ {
+ if (((word >> 30) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
}
else
{
- if (((word >> 20) & 0x1) == 0)
+ if (((word >> 12) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x10000011000xxxxxxxxxxxxxxx10xxx
- bfmlal. */
- return 2436;
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011000xxxxxxx0xxxxxxx10xxx
+ umlall. */
+ return 2786;
+ }
+ else
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011001xxxx0xx0xxxxxxx10xxx
+ umlall. */
+ return 2787;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011001xxxx1xx0xxxxxxx10xxx
+ umlall. */
+ return 2788;
+ }
+ }
}
else
{
- if (((word >> 15) & 0x1) == 0)
+ if (((word >> 20) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000011001xxxx0xxxxxxxxxx10xxx
+ x10000011000xxxxxxx1xxxxxxx10xxx
bfmlal. */
- return 2437;
+ return 2436;
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x10000011001xxxx1xxxxxxxxxx10xxx
- bfmlal. */
- return 2438;
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011001xxxx0xx1xxxxxxx10xxx
+ bfmlal. */
+ return 2437;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011001xxxx1xx1xxxxxxx10xxx
+ bfmlal. */
+ return 2438;
+ }
}
}
}
{
if (((word >> 4) & 0x1) == 0)
{
- if (((word >> 20) & 0x1) == 0)
+ if (((word >> 12) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx000011000xxxxxxxxxxxxxxx01xxx
- fmlsl. */
- return 2491;
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000011000xxxxxxx0xxxxxxx01xxx
+ smlsll. */
+ return 2783;
+ }
+ else
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000011001xxxx0xx0xxxxxxx01xxx
+ smlsll. */
+ return 2784;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000011001xxxx1xx0xxxxxxx01xxx
+ smlsll. */
+ return 2785;
+ }
+ }
}
else
{
- if (((word >> 15) & 0x1) == 0)
+ if (((word >> 20) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- xxx000011001xxxx0xxxxxxxxxx01xxx
+ xxx000011000xxxxxxx1xxxxxxx01xxx
fmlsl. */
- return 2492;
+ return 2491;
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx000011001xxxx1xxxxxxxxxx01xxx
- fmlsl. */
- return 2493;
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000011001xxxx0xx1xxxxxxx01xxx
+ fmlsl. */
+ return 2492;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000011001xxxx1xx1xxxxxxx01xxx
+ fmlsl. */
+ return 2493;
+ }
}
}
}
else
{
- if (((word >> 20) & 0x1) == 0)
+ if (((word >> 12) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx000011000xxxxxxxxxxxxxxx11xxx
- bfmlsl. */
- return 2444;
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000011000xxxxxxx0xxxxxxx11xxx
+ umlsll. */
+ return 2789;
+ }
+ else
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000011001xxxx0xx0xxxxxxx11xxx
+ umlsll. */
+ return 2790;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000011001xxxx1xx0xxxxxxx11xxx
+ umlsll. */
+ return 2791;
+ }
+ }
}
else
{
- if (((word >> 15) & 0x1) == 0)
+ if (((word >> 20) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- xxx000011001xxxx0xxxxxxxxxx11xxx
+ xxx000011000xxxxxxx1xxxxxxx11xxx
bfmlsl. */
- return 2445;
+ return 2444;
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx000011001xxxx1xxxxxxxxxx11xxx
- bfmlsl. */
- return 2446;
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000011001xxxx0xx1xxxxxxx11xxx
+ bfmlsl. */
+ return 2445;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000011001xxxx1xx1xxxxxxx11xxx
+ bfmlsl. */
+ return 2446;
+ }
}
}
}
10987654321098765432109876543210
xx000001110xxxxx0xx0xxxxxxx00xxx
fmla. */
- return 2735;
+ return 2792;
}
else
{
10987654321098765432109876543210
xx000001110xxxxx1xx0xxxxxxx00xxx
fmla. */
- return 2736;
+ return 2793;
}
}
else
10987654321098765432109876543210
xx0000011100xxxxxxxxxxxxxxx01xxx
smlsl. */
- return 2611;
+ return 2619;
}
else
{
10987654321098765432109876543210
xx0000011101xxxx0xxxxxxxxxx01xxx
smlsl. */
- return 2612;
+ return 2620;
}
else
{
10987654321098765432109876543210
xx0000011101xxxx1xxxxxxxxxx01xxx
smlsl. */
- return 2613;
+ return 2621;
}
}
}
10987654321098765432109876543210
xx000001110xxxxx0xx0xxxxxxx10xxx
fmls. */
- return 2737;
+ return 2794;
}
else
{
10987654321098765432109876543210
xx000001110xxxxx1xx0xxxxxxx10xxx
fmls. */
- return 2738;
+ return 2795;
}
}
else
10987654321098765432109876543210
xx0000011100xxxxxxx1xxxxxxx10xxx
umlal. */
- return 2706;
+ return 2727;
}
else
{
10987654321098765432109876543210
xx0000011101xxxx0xx1xxxxxxx10xxx
umlal. */
- return 2707;
+ return 2728;
}
else
{
10987654321098765432109876543210
xx0000011101xxxx1xx1xxxxxxx10xxx
umlal. */
- return 2708;
+ return 2729;
}
}
}
10987654321098765432109876543210
xxx000011100xxxxxxxxxxxxxxx11xxx
umlsl. */
- return 2714;
+ return 2743;
}
else
{
10987654321098765432109876543210
xxx000011101xxxx0xxxxxxxxxx11xxx
umlsl. */
- return 2715;
+ return 2744;
}
else
{
10987654321098765432109876543210
xxx000011101xxxx1xxxxxxxxxx11xxx
umlsl. */
- return 2716;
+ return 2745;
}
}
}
{
if (((word >> 10) & 0x1) == 0)
{
- if (((word >> 12) & 0x1) == 0)
+ if (((word >> 11) & 0x1) == 0)
{
- if (((word >> 22) & 0x1) == 0)
+ if (((word >> 2) & 0x1) == 0)
{
if (((word >> 23) & 0x1) == 0)
{
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000010010xxxx0xx0x0xxxxx00xxx
- fmlal. */
- return 2481;
+ x10000010x10xxxx0xxx00xxxxx000xx
+ smlall. */
+ return 2615;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000010011xxxx0xx0x0xxxxx00xxx
- fmlal. */
- return 2482;
+ x10000010x11xxxx0xxx00xxxxx000xx
+ smlall. */
+ return 2616;
}
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001101xxxx00xx0x0xxxxx00xxx
- fmlal. */
- return 2483;
+ x10000011x1xxxx00xxx00xxxxx000xx
+ smlall. */
+ return 2617;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001101xxxx10xx0x0xxxxx00xxx
- fmlal. */
- return 2484;
+ x10000011x1xxxx10xxx00xxxxx000xx
+ smlall. */
+ return 2618;
}
}
}
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000010110xxxx0xx0x0xxxxx00xxx
- smlal. */
- return 2607;
+ x10000010x10xxxx0xxx00xxxxx001xx
+ usmlall. */
+ return 2767;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000010111xxxx0xx0x0xxxxx00xxx
- smlal. */
- return 2608;
+ x10000010x11xxxx0xxx00xxxxx001xx
+ usmlall. */
+ return 2768;
}
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001111xxxx00xx0x0xxxxx00xxx
- smlal. */
- return 2609;
+ x10000011x1xxxx00xxx00xxxxx001xx
+ usmlall. */
+ return 2769;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001111xxxx10xx0x0xxxxx00xxx
- smlal. */
- return 2610;
+ x10000011x1xxxx10xxx00xxxxx001xx
+ usmlall. */
+ return 2770;
}
}
}
}
else
{
- if (((word >> 23) & 0x1) == 0)
+ if (((word >> 12) & 0x1) == 0)
{
- if (((word >> 20) & 0x1) == 0)
+ if (((word >> 22) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x10000010x10xxxx0xx1x0xxxxx00xxx
- fmla. */
- return 2473;
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010010xxxx0xx010xxxxx00xxx
+ fmlal. */
+ return 2481;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010011xxxx0xx010xxxxx00xxx
+ fmlal. */
+ return 2482;
+ }
+ }
+ else
+ {
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001101xxxx00xx010xxxxx00xxx
+ fmlal. */
+ return 2483;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001101xxxx10xx010xxxxx00xxx
+ fmlal. */
+ return 2484;
+ }
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x10000010x11xxxx0xx1x0xxxxx00xxx
- fmla. */
- return 2474;
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010110xxxx0xx010xxxxx00xxx
+ smlal. */
+ return 2607;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010111xxxx0xx010xxxxx00xxx
+ smlal. */
+ return 2608;
+ }
+ }
+ else
+ {
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001111xxxx00xx010xxxxx00xxx
+ smlal. */
+ return 2609;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001111xxxx10xx010xxxxx00xxx
+ smlal. */
+ return 2610;
+ }
+ }
}
}
else
{
- if (((word >> 16) & 0x1) == 0)
+ if (((word >> 23) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x10000011x1xxxx00xx1x0xxxxx00xxx
- fmla. */
- return 2475;
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x10xxxx0xx110xxxxx00xxx
+ fmla. */
+ return 2473;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x11xxxx0xx110xxxxx00xxx
+ fmla. */
+ return 2474;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x10000011x1xxxx10xx1x0xxxxx00xxx
- fmla. */
- return 2476;
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx00xx110xxxxx00xxx
+ fmla. */
+ return 2475;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx10xx110xxxxx00xxx
+ fmla. */
+ return 2476;
+ }
}
}
}
}
else
{
- if (((word >> 12) & 0x1) == 0)
+ if (((word >> 11) & 0x1) == 0)
{
- if (((word >> 22) & 0x1) == 0)
+ if (((word >> 2) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001x01xxxxx0xx0x1xxxxx00xxx
- fmlal. */
- return 2480;
+ x1000001xx1xxxxx0xxx01xxxxx000xx
+ smlall. */
+ return 2614;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001x11xxxxx0xx0x1xxxxx00xxx
- smlal. */
- return 2606;
+ x1000001xx1xxxxx0xxx01xxxxx001xx
+ usmlall. */
+ return 2766;
}
}
else
{
- if (((word >> 16) & 0x1) == 0)
+ if (((word >> 12) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxx00xx1x1xxxxx00xxx
- fadd. */
- return 2453;
+ if (((word >> 22) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001x01xxxxx0xx011xxxxx00xxx
+ fmlal. */
+ return 2480;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001x11xxxxx0xx011xxxxx00xxx
+ smlal. */
+ return 2606;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxx10xx1x1xxxxx00xxx
- fadd. */
- return 2454;
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxx00xx111xxxxx00xxx
+ fadd. */
+ return 2453;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxx10xx111xxxxx00xxx
+ fadd. */
+ return 2454;
+ }
}
}
}
{
if (((word >> 10) & 0x1) == 0)
{
- if (((word >> 12) & 0x1) == 0)
+ if (((word >> 11) & 0x1) == 0)
{
- if (((word >> 22) & 0x1) == 0)
+ if (((word >> 2) & 0x1) == 0)
{
if (((word >> 23) & 0x1) == 0)
{
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000010010xxxx0xx0x0xxxxx10xxx
- bfmlal. */
- return 2440;
+ x10000010x10xxxx0xxx00xxxxx100xx
+ umlall. */
+ return 2739;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000010011xxxx0xx0x0xxxxx10xxx
- bfmlal. */
- return 2441;
+ x10000010x11xxxx0xxx00xxxxx100xx
+ umlall. */
+ return 2740;
+ }
+ }
+ else
+ {
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx00xxx00xxxxx100xx
+ umlall. */
+ return 2741;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx10xxx00xxxxx100xx
+ umlall. */
+ return 2742;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx10xxxx0xxx00xxxxx101xx
+ sumlall. */
+ return 2717;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx11xxxx0xxx00xxxxx101xx
+ sumlall. */
+ return 2718;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 12) & 0x1) == 0)
+ {
+ if (((word >> 22) & 0x1) == 0)
+ {
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010010xxxx0xx010xxxxx10xxx
+ bfmlal. */
+ return 2440;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010011xxxx0xx010xxxxx10xxx
+ bfmlal. */
+ return 2441;
+ }
+ }
+ else
+ {
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001101xxxx00xx010xxxxx10xxx
+ bfmlal. */
+ return 2442;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001101xxxx10xx010xxxxx10xxx
+ bfmlal. */
+ return 2443;
+ }
}
}
else
{
- if (((word >> 16) & 0x1) == 0)
+ if (((word >> 23) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001101xxxx00xx0x0xxxxx10xxx
- bfmlal. */
- return 2442;
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010110xxxx0xx010xxxxx10xxx
+ umlal. */
+ return 2731;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010111xxxx0xx010xxxxx10xxx
+ umlal. */
+ return 2732;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001101xxxx10xx0x0xxxxx10xxx
- bfmlal. */
- return 2443;
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001111xxxx00xx010xxxxx10xxx
+ umlal. */
+ return 2733;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001111xxxx10xx010xxxxx10xxx
+ umlal. */
+ return 2734;
+ }
}
}
}
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000010110xxxx0xx0x0xxxxx10xxx
- umlal. */
- return 2710;
+ x10000010x10xxxx0xx110xxxxx10xxx
+ add. */
+ return 2430;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000010111xxxx0xx0x0xxxxx10xxx
- umlal. */
- return 2711;
+ x10000010x11xxxx0xx110xxxxx10xxx
+ add. */
+ return 2431;
}
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001111xxxx00xx0x0xxxxx10xxx
- umlal. */
- return 2712;
+ x10000011x1xxxx00xx110xxxxx10xxx
+ add. */
+ return 2432;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001111xxxx10xx0x0xxxxx10xxx
- umlal. */
- return 2713;
+ x10000011x1xxxx10xx110xxxxx10xxx
+ add. */
+ return 2433;
}
}
}
}
+ }
+ else
+ {
+ if (((word >> 11) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx0xxx01xxxxx10xxx
+ umlall. */
+ return 2738;
+ }
else
{
- if (((word >> 23) & 0x1) == 0)
+ if (((word >> 12) & 0x1) == 0)
{
- if (((word >> 20) & 0x1) == 0)
+ if (((word >> 22) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000010x10xxxx0xx1x0xxxxx10xxx
- add. */
- return 2430;
+ x1000001x01xxxxx0xx011xxxxx10xxx
+ bfmlal. */
+ return 2439;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000010x11xxxx0xx1x0xxxxx10xxx
- add. */
- return 2431;
+ x1000001x11xxxxx0xx011xxxxx10xxx
+ umlal. */
+ return 2730;
}
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000011x1xxxx00xx1x0xxxxx10xxx
+ x1000001xx1xxxx00xx111xxxxx10xxx
add. */
- return 2432;
+ return 2428;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000011x1xxxx10xx1x0xxxxx10xxx
+ x1000001xx1xxxx10xx111xxxxx10xxx
add. */
- return 2433;
+ return 2429;
}
}
}
}
- else
+ }
+ }
+ else
+ {
+ if (((word >> 4) & 0x1) == 0)
+ {
+ if (((word >> 10) & 0x1) == 0)
{
- if (((word >> 12) & 0x1) == 0)
+ if (((word >> 11) & 0x1) == 0)
{
- if (((word >> 22) & 0x1) == 0)
+ if (((word >> 23) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001x01xxxxx0xx0x1xxxxx10xxx
- bfmlal. */
- return 2439;
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x10xxxx0xxx00xxxxx01xxx
+ smlsll. */
+ return 2631;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x11xxxx0xxx00xxxxx01xxx
+ smlsll. */
+ return 2632;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001x11xxxxx0xx0x1xxxxx10xxx
- umlal. */
- return 2709;
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx00xxx00xxxxx01xxx
+ smlsll. */
+ return 2633;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx10xxx00xxxxx01xxx
+ smlsll. */
+ return 2634;
+ }
}
}
else
{
- if (((word >> 16) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxx00xx1x1xxxxx10xxx
- add. */
- return 2428;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxx10xx1x1xxxxx10xxx
- add. */
- return 2429;
- }
- }
- }
- }
- }
- else
- {
- if (((word >> 4) & 0x1) == 0)
- {
- if (((word >> 10) & 0x1) == 0)
- {
- if (((word >> 12) & 0x1) == 0)
- {
- if (((word >> 22) & 0x1) == 0)
+ if (((word >> 12) & 0x1) == 0)
{
- if (((word >> 23) & 0x1) == 0)
+ if (((word >> 22) & 0x1) == 0)
{
- if (((word >> 20) & 0x1) == 0)
+ if (((word >> 23) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x10000010010xxxx0xx0x0xxxxx01xxx
- fmlsl. */
- return 2495;
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010010xxxx0xx010xxxxx01xxx
+ fmlsl. */
+ return 2495;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010011xxxx0xx010xxxxx01xxx
+ fmlsl. */
+ return 2496;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x10000010011xxxx0xx0x0xxxxx01xxx
- fmlsl. */
- return 2496;
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001101xxxx00xx010xxxxx01xxx
+ fmlsl. */
+ return 2497;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001101xxxx10xx010xxxxx01xxx
+ fmlsl. */
+ return 2498;
+ }
}
}
else
{
- if (((word >> 16) & 0x1) == 0)
+ if (((word >> 23) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001101xxxx00xx0x0xxxxx01xxx
- fmlsl. */
- return 2497;
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010110xxxx0xx010xxxxx01xxx
+ smlsl. */
+ return 2623;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010111xxxx0xx010xxxxx01xxx
+ smlsl. */
+ return 2624;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001101xxxx10xx0x0xxxxx01xxx
- fmlsl. */
- return 2498;
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001111xxxx00xx010xxxxx01xxx
+ smlsl. */
+ return 2625;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001111xxxx10xx010xxxxx01xxx
+ smlsl. */
+ return 2626;
+ }
}
}
}
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000010110xxxx0xx0x0xxxxx01xxx
- smlsl. */
- return 2615;
+ x10000010x10xxxx0xx110xxxxx01xxx
+ fmls. */
+ return 2487;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000010111xxxx0xx0x0xxxxx01xxx
- smlsl. */
- return 2616;
+ x10000010x11xxxx0xx110xxxxx01xxx
+ fmls. */
+ return 2488;
}
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001111xxxx00xx0x0xxxxx01xxx
- smlsl. */
- return 2617;
+ x10000011x1xxxx00xx110xxxxx01xxx
+ fmls. */
+ return 2489;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001111xxxx10xx0x0xxxxx01xxx
- smlsl. */
- return 2618;
+ x10000011x1xxxx10xx110xxxxx01xxx
+ fmls. */
+ return 2490;
}
}
}
}
+ }
+ else
+ {
+ if (((word >> 11) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx0xxx01xxxxx01xxx
+ smlsll. */
+ return 2630;
+ }
else
{
- if (((word >> 23) & 0x1) == 0)
+ if (((word >> 12) & 0x1) == 0)
{
- if (((word >> 20) & 0x1) == 0)
+ if (((word >> 22) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000010x10xxxx0xx1x0xxxxx01xxx
- fmls. */
- return 2487;
+ x1000001x01xxxxx0xx011xxxxx01xxx
+ fmlsl. */
+ return 2494;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000010x11xxxx0xx1x0xxxxx01xxx
- fmls. */
- return 2488;
+ x1000001x11xxxxx0xx011xxxxx01xxx
+ smlsl. */
+ return 2622;
}
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000011x1xxxx00xx1x0xxxxx01xxx
- fmls. */
- return 2489;
+ x1000001xx1xxxx00xx111xxxxx01xxx
+ fsub. */
+ return 2499;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000011x1xxxx10xx1x0xxxxx01xxx
- fmls. */
- return 2490;
+ x1000001xx1xxxx10xx111xxxxx01xxx
+ fsub. */
+ return 2500;
}
}
}
}
- else
+ }
+ else
+ {
+ if (((word >> 10) & 0x1) == 0)
{
- if (((word >> 12) & 0x1) == 0)
+ if (((word >> 11) & 0x1) == 0)
{
- if (((word >> 22) & 0x1) == 0)
+ if (((word >> 23) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001x01xxxxx0xx0x1xxxxx01xxx
- fmlsl. */
- return 2494;
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x10xxxx0xxx00xxxxx11xxx
+ umlsll. */
+ return 2755;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x11xxxx0xxx00xxxxx11xxx
+ umlsll. */
+ return 2756;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001x11xxxxx0xx0x1xxxxx01xxx
- smlsl. */
- return 2614;
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx00xxx00xxxxx11xxx
+ umlsll. */
+ return 2757;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx10xxx00xxxxx11xxx
+ umlsll. */
+ return 2758;
+ }
}
}
else
{
- if (((word >> 16) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxx00xx1x1xxxxx01xxx
- fsub. */
- return 2499;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxx10xx1x1xxxxx01xxx
- fsub. */
- return 2500;
- }
- }
- }
- }
- else
- {
- if (((word >> 10) & 0x1) == 0)
- {
- if (((word >> 12) & 0x1) == 0)
- {
- if (((word >> 22) & 0x1) == 0)
+ if (((word >> 12) & 0x1) == 0)
{
- if (((word >> 23) & 0x1) == 0)
+ if (((word >> 22) & 0x1) == 0)
{
- if (((word >> 20) & 0x1) == 0)
+ if (((word >> 23) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x10000010010xxxx0xx0x0xxxxx11xxx
- bfmlsl. */
- return 2448;
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010010xxxx0xx010xxxxx11xxx
+ bfmlsl. */
+ return 2448;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010011xxxx0xx010xxxxx11xxx
+ bfmlsl. */
+ return 2449;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x10000010011xxxx0xx0x0xxxxx11xxx
- bfmlsl. */
- return 2449;
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001101xxxx00xx010xxxxx11xxx
+ bfmlsl. */
+ return 2450;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001101xxxx10xx010xxxxx11xxx
+ bfmlsl. */
+ return 2451;
+ }
}
}
else
{
- if (((word >> 16) & 0x1) == 0)
+ if (((word >> 23) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001101xxxx00xx0x0xxxxx11xxx
- bfmlsl. */
- return 2450;
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010110xxxx0xx010xxxxx11xxx
+ umlsl. */
+ return 2747;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010111xxxx0xx010xxxxx11xxx
+ umlsl. */
+ return 2748;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001101xxxx10xx0x0xxxxx11xxx
- bfmlsl. */
- return 2451;
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001111xxxx00xx010xxxxx11xxx
+ umlsl. */
+ return 2749;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001111xxxx10xx010xxxxx11xxx
+ umlsl. */
+ return 2750;
+ }
}
}
}
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000010110xxxx0xx0x0xxxxx11xxx
- umlsl. */
- return 2718;
+ x10000010x10xxxx0xx110xxxxx11xxx
+ sub. */
+ return 2710;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000010111xxxx0xx0x0xxxxx11xxx
- umlsl. */
- return 2719;
+ x10000010x11xxxx0xx110xxxxx11xxx
+ sub. */
+ return 2711;
}
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001111xxxx00xx0x0xxxxx11xxx
- umlsl. */
- return 2720;
+ x10000011x1xxxx00xx110xxxxx11xxx
+ sub. */
+ return 2712;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001111xxxx10xx0x0xxxxx11xxx
- umlsl. */
- return 2721;
+ x10000011x1xxxx10xx110xxxxx11xxx
+ sub. */
+ return 2713;
}
}
}
}
+ }
+ else
+ {
+ if (((word >> 11) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx0xxx01xxxxx11xxx
+ umlsll. */
+ return 2754;
+ }
else
{
- if (((word >> 23) & 0x1) == 0)
+ if (((word >> 12) & 0x1) == 0)
{
- if (((word >> 20) & 0x1) == 0)
+ if (((word >> 22) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000010x10xxxx0xx1x0xxxxx11xxx
- sub. */
- return 2694;
+ x1000001x01xxxxx0xx011xxxxx11xxx
+ bfmlsl. */
+ return 2447;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000010x11xxxx0xx1x0xxxxx11xxx
- sub. */
- return 2695;
+ x1000001x11xxxxx0xx011xxxxx11xxx
+ umlsl. */
+ return 2746;
}
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000011x1xxxx00xx1x0xxxxx11xxx
+ x1000001xx1xxxx00xx111xxxxx11xxx
sub. */
- return 2696;
+ return 2708;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000011x1xxxx10xx1x0xxxxx11xxx
+ x1000001xx1xxxx10xx111xxxxx11xxx
sub. */
- return 2697;
+ return 2709;
}
}
}
}
- else
- {
- if (((word >> 12) & 0x1) == 0)
- {
- if (((word >> 22) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001x01xxxxx0xx0x1xxxxx11xxx
- bfmlsl. */
- return 2447;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001x11xxxxx0xx0x1xxxxx11xxx
- umlsl. */
- return 2717;
- }
- }
- else
- {
- if (((word >> 16) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxx00xx1x1xxxxx11xxx
- sub. */
- return 2692;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxx10xx1x1xxxxx11xxx
- sub. */
- return 2693;
- }
- }
- }
}
}
}
10987654321098765432109876543210
x1000001xx1xxxxx1x1001x0xx0xxxx0
sqdmulh. */
- return 2619;
+ return 2635;
}
else
{
10987654321098765432109876543210
x1000001xx1xxxxx1x1101x0xx0xxxx0
sqdmulh. */
- return 2621;
+ return 2637;
}
}
else
10987654321098765432109876543210
x1000001xx1xxxxx1x1011x0xx0xxxx0
sqdmulh. */
- return 2620;
+ return 2636;
}
else
{
10987654321098765432109876543210
x1000001xx1xxxxx1x1111x0xx0xxxx0
sqdmulh. */
- return 2622;
+ return 2638;
}
}
}
10987654321098765432109876543210
x1000001xx1xxxxx1xx00x10xx1xxxx0
srshl. */
- return 2623;
+ return 2639;
}
else
{
10987654321098765432109876543210
x1000001xx1xxxxx1xx10x10xx1xxxx0
srshl. */
- return 2625;
+ return 2641;
}
}
else
10987654321098765432109876543210
x1000001xx1xxxxx1xx01x10xx1xxxx0
srshl. */
- return 2624;
+ return 2640;
}
else
{
10987654321098765432109876543210
x1000001xx1xxxxx1xx11x10xx1xxxx0
srshl. */
- return 2626;
+ return 2642;
}
}
}
10987654321098765432109876543210
x1000001xx1xxxxx1xx00xx0xx0xxxx1
umax. */
- return 2698;
+ return 2719;
}
else
{
10987654321098765432109876543210
x1000001xx1xxxxx1xx10xx0xx0xxxx1
umax. */
- return 2700;
+ return 2721;
}
}
else
10987654321098765432109876543210
x1000001xx1xxxxx1xx01xx0xx0xxxx1
umax. */
- return 2699;
+ return 2720;
}
else
{
10987654321098765432109876543210
x1000001xx1xxxxx1xx11xx0xx0xxxx1
umax. */
- return 2701;
+ return 2722;
}
}
}
10987654321098765432109876543210
x1000001xx1xxxxx1xx00x00xx1xxxx1
umin. */
- return 2702;
+ return 2723;
}
else
{
10987654321098765432109876543210
x1000001xx1xxxxx1xx10x00xx1xxxx1
umin. */
- return 2704;
+ return 2725;
}
}
else
10987654321098765432109876543210
x1000001xx1xxxxx1xx01x00xx1xxxx1
umin. */
- return 2703;
+ return 2724;
}
else
{
10987654321098765432109876543210
x1000001xx1xxxxx1xx11x00xx1xxxx1
umin. */
- return 2705;
+ return 2726;
}
}
}
10987654321098765432109876543210
x1000001xx1xxxxx1xx00x10xx1xxxx1
urshl. */
- return 2722;
+ return 2759;
}
else
{
10987654321098765432109876543210
x1000001xx1xxxxx1xx10x10xx1xxxx1
urshl. */
- return 2724;
+ return 2761;
}
}
else
10987654321098765432109876543210
x1000001xx1xxxxx1xx01x10xx1xxxx1
urshl. */
- return 2723;
+ return 2760;
}
else
{
10987654321098765432109876543210
x1000001xx1xxxxx1xx11x10xx1xxxx1
urshl. */
- return 2725;
+ return 2762;
}
}
}
10987654321098765432109876543210
x0100001001xxxxx000xxxxxxxxx0xxx
st1b. */
- return 2633;
+ return 2649;
}
else
{
10987654321098765432109876543210
x0100001001xxxxx010xxxxxxxxx0xxx
st1w. */
- return 2657;
+ return 2673;
}
}
else
10987654321098765432109876543210
x0100001001xxxxx001xxxxxxxxx0xxx
st1h. */
- return 2649;
+ return 2665;
}
else
{
10987654321098765432109876543210
x0100001001xxxxx011xxxxxxxxx0xxx
st1d. */
- return 2641;
+ return 2657;
}
}
}
10987654321098765432109876543210
x0100001001xxxxx000xxxxxxxxx1xxx
stnt1b. */
- return 2665;
+ return 2681;
}
else
{
10987654321098765432109876543210
x0100001001xxxxx010xxxxxxxxx1xxx
stnt1w. */
- return 2689;
+ return 2705;
}
}
else
10987654321098765432109876543210
x0100001001xxxxx001xxxxxxxxx1xxx
stnt1h. */
- return 2681;
+ return 2697;
}
else
{
10987654321098765432109876543210
x0100001001xxxxx011xxxxxxxxx1xxx
stnt1d. */
- return 2673;
+ return 2689;
}
}
}
10987654321098765432109876543210
x0100001001xxxxx100xxxxxxxxx0xxx
st1b. */
- return 2634;
+ return 2650;
}
else
{
10987654321098765432109876543210
x1100001001xxxxx100xxxxxxxxx0xxx
str. */
- return 2691;
+ return 2707;
}
}
else
10987654321098765432109876543210
xx100001001xxxxx110xxxxxxxxx0xxx
st1w. */
- return 2658;
+ return 2674;
}
}
else
10987654321098765432109876543210
xx100001001xxxxx101xxxxxxxxx0xxx
st1h. */
- return 2650;
+ return 2666;
}
else
{
10987654321098765432109876543210
xx100001001xxxxx111xxxxxxxxx0xxx
st1d. */
- return 2642;
+ return 2658;
}
}
}
10987654321098765432109876543210
xx100001001xxxxx100xxxxxxxxx1xxx
stnt1b. */
- return 2666;
+ return 2682;
}
else
{
10987654321098765432109876543210
xx100001001xxxxx110xxxxxxxxx1xxx
stnt1w. */
- return 2690;
+ return 2706;
}
}
else
10987654321098765432109876543210
xx100001001xxxxx101xxxxxxxxx1xxx
stnt1h. */
- return 2682;
+ return 2698;
}
else
{
10987654321098765432109876543210
xx100001001xxxxx111xxxxxxxxx1xxx
stnt1d. */
- return 2674;
+ return 2690;
}
}
}
10987654321098765432109876543210
xx100001011xxxxx000xxxxxxxxx0xxx
st1b. */
- return 2629;
+ return 2645;
}
else
{
10987654321098765432109876543210
xx100001011xxxxx100xxxxxxxxx0xxx
st1b. */
- return 2630;
+ return 2646;
}
}
else
10987654321098765432109876543210
xx100001011xxxxx010xxxxxxxxx0xxx
st1w. */
- return 2653;
+ return 2669;
}
else
{
10987654321098765432109876543210
xx100001011xxxxx110xxxxxxxxx0xxx
st1w. */
- return 2654;
+ return 2670;
}
}
}
10987654321098765432109876543210
xx100001011xxxxx001xxxxxxxxx0xxx
st1h. */
- return 2645;
+ return 2661;
}
else
{
10987654321098765432109876543210
xx100001011xxxxx101xxxxxxxxx0xxx
st1h. */
- return 2646;
+ return 2662;
}
}
else
10987654321098765432109876543210
xx100001011xxxxx011xxxxxxxxx0xxx
st1d. */
- return 2637;
+ return 2653;
}
else
{
10987654321098765432109876543210
xx100001011xxxxx111xxxxxxxxx0xxx
st1d. */
- return 2638;
+ return 2654;
}
}
}
10987654321098765432109876543210
xx100001011xxxxx000xxxxxxxxx1xxx
stnt1b. */
- return 2661;
+ return 2677;
}
else
{
10987654321098765432109876543210
xx100001011xxxxx100xxxxxxxxx1xxx
stnt1b. */
- return 2662;
+ return 2678;
}
}
else
10987654321098765432109876543210
xx100001011xxxxx010xxxxxxxxx1xxx
stnt1w. */
- return 2685;
+ return 2701;
}
else
{
10987654321098765432109876543210
xx100001011xxxxx110xxxxxxxxx1xxx
stnt1w. */
- return 2686;
+ return 2702;
}
}
}
10987654321098765432109876543210
xx100001011xxxxx001xxxxxxxxx1xxx
stnt1h. */
- return 2677;
+ return 2693;
}
else
{
10987654321098765432109876543210
xx100001011xxxxx101xxxxxxxxx1xxx
stnt1h. */
- return 2678;
+ return 2694;
}
}
else
10987654321098765432109876543210
xx100001011xxxxx011xxxxxxxxx1xxx
stnt1d. */
- return 2669;
+ return 2685;
}
else
{
10987654321098765432109876543210
xx100001011xxxxx111xxxxxxxxx1xxx
stnt1d. */
- return 2670;
+ return 2686;
}
}
}
10987654321098765432109876543210
00011001000xxxxxxxxx00xxxxxxxxxx
stlurb. */
- return 2779;
+ return 2836;
}
else
{
10987654321098765432109876543210
10011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2787;
+ return 2844;
}
}
else
10987654321098765432109876543210
01011001000xxxxxxxxx00xxxxxxxxxx
stlurh. */
- return 2783;
+ return 2840;
}
else
{
10987654321098765432109876543210
11011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2790;
+ return 2847;
}
}
}
10987654321098765432109876543210
xx011001000xxxxx0000x1xxxxxxxxxx
cpyfp. */
- return 2839;
+ return 2896;
}
else
{
10987654321098765432109876543210
xx011001000xxxxx1000x1xxxxxxxxxx
cpyfprn. */
- return 2845;
+ return 2902;
}
}
else
10987654321098765432109876543210
xx011001000xxxxx0100x1xxxxxxxxxx
cpyfpwn. */
- return 2842;
+ return 2899;
}
else
{
10987654321098765432109876543210
xx011001000xxxxx1100x1xxxxxxxxxx
cpyfpn. */
- return 2848;
+ return 2905;
}
}
}
10987654321098765432109876543210
xx011001000xxxxx0010x1xxxxxxxxxx
cpyfprt. */
- return 2863;
+ return 2920;
}
else
{
10987654321098765432109876543210
xx011001000xxxxx1010x1xxxxxxxxxx
cpyfprtrn. */
- return 2869;
+ return 2926;
}
}
else
10987654321098765432109876543210
xx011001000xxxxx0110x1xxxxxxxxxx
cpyfprtwn. */
- return 2866;
+ return 2923;
}
else
{
10987654321098765432109876543210
xx011001000xxxxx1110x1xxxxxxxxxx
cpyfprtn. */
- return 2872;
+ return 2929;
}
}
}
10987654321098765432109876543210
xx011001000xxxxx0001x1xxxxxxxxxx
cpyfpwt. */
- return 2851;
+ return 2908;
}
else
{
10987654321098765432109876543210
xx011001000xxxxx1001x1xxxxxxxxxx
cpyfpwtrn. */
- return 2857;
+ return 2914;
}
}
else
10987654321098765432109876543210
xx011001000xxxxx0101x1xxxxxxxxxx
cpyfpwtwn. */
- return 2854;
+ return 2911;
}
else
{
10987654321098765432109876543210
xx011001000xxxxx1101x1xxxxxxxxxx
cpyfpwtn. */
- return 2860;
+ return 2917;
}
}
}
10987654321098765432109876543210
xx011001000xxxxx0011x1xxxxxxxxxx
cpyfpt. */
- return 2875;
+ return 2932;
}
else
{
10987654321098765432109876543210
xx011001000xxxxx1011x1xxxxxxxxxx
cpyfptrn. */
- return 2881;
+ return 2938;
}
}
else
10987654321098765432109876543210
xx011001000xxxxx0111x1xxxxxxxxxx
cpyfptwn. */
- return 2878;
+ return 2935;
}
else
{
10987654321098765432109876543210
xx011001000xxxxx1111x1xxxxxxxxxx
cpyfptn. */
- return 2884;
+ return 2941;
}
}
}
10987654321098765432109876543210
00011001010xxxxxxxxx00xxxxxxxxxx
ldapurb. */
- return 2780;
+ return 2837;
}
else
{
10987654321098765432109876543210
10011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2788;
+ return 2845;
}
}
else
10987654321098765432109876543210
01011001010xxxxxxxxx00xxxxxxxxxx
ldapurh. */
- return 2784;
+ return 2841;
}
else
{
10987654321098765432109876543210
11011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2791;
+ return 2848;
}
}
}
10987654321098765432109876543210
xx011001010xxxxx0000x1xxxxxxxxxx
cpyfm. */
- return 2840;
+ return 2897;
}
else
{
10987654321098765432109876543210
xx011001010xxxxx1000x1xxxxxxxxxx
cpyfmrn. */
- return 2846;
+ return 2903;
}
}
else
10987654321098765432109876543210
xx011001010xxxxx0100x1xxxxxxxxxx
cpyfmwn. */
- return 2843;
+ return 2900;
}
else
{
10987654321098765432109876543210
xx011001010xxxxx1100x1xxxxxxxxxx
cpyfmn. */
- return 2849;
+ return 2906;
}
}
}
10987654321098765432109876543210
xx011001010xxxxx0010x1xxxxxxxxxx
cpyfmrt. */
- return 2864;
+ return 2921;
}
else
{
10987654321098765432109876543210
xx011001010xxxxx1010x1xxxxxxxxxx
cpyfmrtrn. */
- return 2870;
+ return 2927;
}
}
else
10987654321098765432109876543210
xx011001010xxxxx0110x1xxxxxxxxxx
cpyfmrtwn. */
- return 2867;
+ return 2924;
}
else
{
10987654321098765432109876543210
xx011001010xxxxx1110x1xxxxxxxxxx
cpyfmrtn. */
- return 2873;
+ return 2930;
}
}
}
10987654321098765432109876543210
xx011001010xxxxx0001x1xxxxxxxxxx
cpyfmwt. */
- return 2852;
+ return 2909;
}
else
{
10987654321098765432109876543210
xx011001010xxxxx1001x1xxxxxxxxxx
cpyfmwtrn. */
- return 2858;
+ return 2915;
}
}
else
10987654321098765432109876543210
xx011001010xxxxx0101x1xxxxxxxxxx
cpyfmwtwn. */
- return 2855;
+ return 2912;
}
else
{
10987654321098765432109876543210
xx011001010xxxxx1101x1xxxxxxxxxx
cpyfmwtn. */
- return 2861;
+ return 2918;
}
}
}
10987654321098765432109876543210
xx011001010xxxxx0011x1xxxxxxxxxx
cpyfmt. */
- return 2876;
+ return 2933;
}
else
{
10987654321098765432109876543210
xx011001010xxxxx1011x1xxxxxxxxxx
cpyfmtrn. */
- return 2882;
+ return 2939;
}
}
else
10987654321098765432109876543210
xx011001010xxxxx0111x1xxxxxxxxxx
cpyfmtwn. */
- return 2879;
+ return 2936;
}
else
{
10987654321098765432109876543210
xx011001010xxxxx1111x1xxxxxxxxxx
cpyfmtn. */
- return 2885;
+ return 2942;
}
}
}
10987654321098765432109876543210
00011001100xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2782;
+ return 2839;
}
else
{
10987654321098765432109876543210
10011001100xxxxxxxxx00xxxxxxxxxx
ldapursw. */
- return 2789;
+ return 2846;
}
}
else
10987654321098765432109876543210
x1011001100xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2786;
+ return 2843;
}
}
else
10987654321098765432109876543210
x0011001110xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2781;
+ return 2838;
}
else
{
10987654321098765432109876543210
x1011001110xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2785;
+ return 2842;
}
}
}
10987654321098765432109876543210
xx011001100xxxxx0000x1xxxxxxxxxx
cpyfe. */
- return 2841;
+ return 2898;
}
else
{
10987654321098765432109876543210
xx011001110xxxxx0000x1xxxxxxxxxx
setp. */
- return 2935;
+ return 2992;
}
}
else
10987654321098765432109876543210
xx011001100xxxxx1000x1xxxxxxxxxx
cpyfern. */
- return 2847;
+ return 2904;
}
else
{
10987654321098765432109876543210
xx011001110xxxxx1000x1xxxxxxxxxx
sete. */
- return 2937;
+ return 2994;
}
}
}
10987654321098765432109876543210
xx011001100xxxxx0100x1xxxxxxxxxx
cpyfewn. */
- return 2844;
+ return 2901;
}
else
{
10987654321098765432109876543210
xx011001110xxxxx0100x1xxxxxxxxxx
setm. */
- return 2936;
+ return 2993;
}
}
else
10987654321098765432109876543210
xx0110011x0xxxxx1100x1xxxxxxxxxx
cpyfen. */
- return 2850;
+ return 2907;
}
}
}
10987654321098765432109876543210
xx011001100xxxxx0010x1xxxxxxxxxx
cpyfert. */
- return 2865;
+ return 2922;
}
else
{
10987654321098765432109876543210
xx011001110xxxxx0010x1xxxxxxxxxx
setpn. */
- return 2941;
+ return 2998;
}
}
else
10987654321098765432109876543210
xx011001100xxxxx1010x1xxxxxxxxxx
cpyfertrn. */
- return 2871;
+ return 2928;
}
else
{
10987654321098765432109876543210
xx011001110xxxxx1010x1xxxxxxxxxx
seten. */
- return 2943;
+ return 3000;
}
}
}
10987654321098765432109876543210
xx011001100xxxxx0110x1xxxxxxxxxx
cpyfertwn. */
- return 2868;
+ return 2925;
}
else
{
10987654321098765432109876543210
xx011001110xxxxx0110x1xxxxxxxxxx
setmn. */
- return 2942;
+ return 2999;
}
}
else
10987654321098765432109876543210
xx0110011x0xxxxx1110x1xxxxxxxxxx
cpyfertn. */
- return 2874;
+ return 2931;
}
}
}
10987654321098765432109876543210
xx011001100xxxxx0001x1xxxxxxxxxx
cpyfewt. */
- return 2853;
+ return 2910;
}
else
{
10987654321098765432109876543210
xx011001110xxxxx0001x1xxxxxxxxxx
setpt. */
- return 2938;
+ return 2995;
}
}
else
10987654321098765432109876543210
xx011001100xxxxx1001x1xxxxxxxxxx
cpyfewtrn. */
- return 2859;
+ return 2916;
}
else
{
10987654321098765432109876543210
xx011001110xxxxx1001x1xxxxxxxxxx
setet. */
- return 2940;
+ return 2997;
}
}
}
10987654321098765432109876543210
xx011001100xxxxx0101x1xxxxxxxxxx
cpyfewtwn. */
- return 2856;
+ return 2913;
}
else
{
10987654321098765432109876543210
xx011001110xxxxx0101x1xxxxxxxxxx
setmt. */
- return 2939;
+ return 2996;
}
}
else
10987654321098765432109876543210
xx0110011x0xxxxx1101x1xxxxxxxxxx
cpyfewtn. */
- return 2862;
+ return 2919;
}
}
}
10987654321098765432109876543210
xx011001100xxxxx0011x1xxxxxxxxxx
cpyfet. */
- return 2877;
+ return 2934;
}
else
{
10987654321098765432109876543210
xx011001110xxxxx0011x1xxxxxxxxxx
setptn. */
- return 2944;
+ return 3001;
}
}
else
10987654321098765432109876543210
xx011001100xxxxx1011x1xxxxxxxxxx
cpyfetrn. */
- return 2883;
+ return 2940;
}
else
{
10987654321098765432109876543210
xx011001110xxxxx1011x1xxxxxxxxxx
setetn. */
- return 2946;
+ return 3003;
}
}
}
10987654321098765432109876543210
xx011001100xxxxx0111x1xxxxxxxxxx
cpyfetwn. */
- return 2880;
+ return 2937;
}
else
{
10987654321098765432109876543210
xx011001110xxxxx0111x1xxxxxxxxxx
setmtn. */
- return 2945;
+ return 3002;
}
}
else
10987654321098765432109876543210
xx0110011x0xxxxx1111x1xxxxxxxxxx
cpyfetn. */
- return 2886;
+ return 2943;
}
}
}
10987654321098765432109876543210
x1x11010110xxxx0x01000xxxxxxxxxx
abs. */
- return 2964;
+ return 3021;
}
else
{
10987654321098765432109876543210
xxx11010110xxxxxx11000xxxxxxxxxx
smax. */
- return 2967;
+ return 3024;
}
}
}
10987654321098765432109876543210
xxx11010x00xxxxxx0xx10xxxxxxxxxx
setf8. */
- return 2777;
+ return 2834;
}
else
{
10987654321098765432109876543210
xxx11010x00xxxxxx1xx10xxxxxxxxxx
setf16. */
- return 2778;
+ return 2835;
}
}
else
10987654321098765432109876543210
xxx11010110xxxxxx11010xxxxxxxxxx
smin. */
- return 2969;
+ return 3026;
}
}
}
10987654321098765432109876543210
xxx11010110xxxx0x00110xxxxxxxxxx
ctz. */
- return 2966;
+ return 3023;
}
else
{
10987654321098765432109876543210
xxx11010000xxxxxxxxx01xxxxxxxxxx
rmif. */
- return 2776;
+ return 2833;
}
else
{
10987654321098765432109876543210
xxx11010x10xxxxxx11001xxxxxxxxxx
umax. */
- return 2968;
+ return 3025;
}
}
}
10987654321098765432109876543210
xxx11010xx0xxxxxx11011xxxxxxxxxx
umin. */
- return 2970;
+ return 3027;
}
}
}
10987654321098765432109876543210
xxx11010xx0xxxx0x00111xxxxxxxxxx
cnt. */
- return 2965;
+ return 3022;
}
else
{
10987654321098765432109876543210
010001x01x1xxxxx000110xxxxxxxxxx
usdot. */
- return 2796;
+ return 2853;
}
}
}
10987654321098765432109876543210
010001x01x1xxxxx000111xxxxxxxxxx
sudot. */
- return 2797;
+ return 2854;
}
}
}
10987654321098765432109876543210
010001x0xx0xxxxx011110xxxxxxxxxx
usdot. */
- return 2795;
+ return 2852;
}
}
}
10987654321098765432109876543210
011001x0100xxx10101xxxxxxxxxxxxx
bfcvtnt. */
- return 2824;
+ return 2881;
}
}
else
10987654321098765432109876543210
101001x00x1xxxxxx00xxxxxxxxxxxxx
ld1rob. */
- return 2800;
+ return 2857;
}
else
{
10987654321098765432109876543210
101001x01x1xxxxxx00xxxxxxxxxxxxx
ld1roh. */
- return 2801;
+ return 2858;
}
}
else
10987654321098765432109876543210
011001x0011xxxxx010xxxxxxxxxxxxx
bfdot. */
- return 2821;
+ return 2878;
}
else
{
10987654321098765432109876543210
011001x0111xxxxx010xx0xxxxxxxxxx
bfmlalb. */
- return 2828;
+ return 2885;
}
else
{
10987654321098765432109876543210
011001x0111xxxxx010xx1xxxxxxxxxx
bfmlalt. */
- return 2827;
+ return 2884;
}
}
else
10987654321098765432109876543210
x11001x0011xxxxx1x0xxxxxxxxxxxxx
bfdot. */
- return 2820;
+ return 2877;
}
else
{
10987654321098765432109876543210
011001x0111xxxxx1x0xx0xxxxxxxxxx
bfmlalb. */
- return 2826;
+ return 2883;
}
else
{
10987654321098765432109876543210
011001x0111xxxxx1x0xx1xxxxxxxxxx
bfmlalt. */
- return 2825;
+ return 2882;
}
}
else
10987654321098765432109876543210
101001x00x1xxxxx001xxxxxxxxxxxxx
ld1rob. */
- return 2804;
+ return 2861;
}
else
{
10987654321098765432109876543210
101001x01x1xxxxx001xxxxxxxxxxxxx
ld1roh. */
- return 2805;
+ return 2862;
}
}
else
10987654321098765432109876543210
011001x0101xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2798;
+ return 2855;
}
else
{
10987654321098765432109876543210
011001x0011xxxxx111xxxxxxxxxxxxx
bfmmla. */
- return 2822;
+ return 2879;
}
else
{
10987654321098765432109876543210
011001x0111xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2799;
+ return 2856;
}
else
{
10987654321098765432109876543210
000001x1101xxxxx000x00xxxxxxxxxx
zip1. */
- return 2808;
+ return 2865;
}
else
{
10987654321098765432109876543210
000001x1101xxxxx000010xxxxxxxxxx
uzp1. */
- return 2810;
+ return 2867;
}
else
{
10987654321098765432109876543210
000001x1101xxxxx000110xxxxxxxxxx
trn1. */
- return 2812;
+ return 2869;
}
}
}
10987654321098765432109876543210
000001x1101xxxxx000x01xxxxxxxxxx
zip2. */
- return 2809;
+ return 2866;
}
else
{
10987654321098765432109876543210
000001x1101xxxxx000011xxxxxxxxxx
uzp2. */
- return 2811;
+ return 2868;
}
else
{
10987654321098765432109876543210
000001x1101xxxxx000111xxxxxxxxxx
trn2. */
- return 2813;
+ return 2870;
}
}
}
10987654321098765432109876543210
010001x1000xxxxx100110xxxxxxxxxx
smmla. */
- return 2792;
+ return 2849;
}
else
{
10987654321098765432109876543210
010001x1100xxxxx100110xxxxxxxxxx
usmmla. */
- return 2794;
+ return 2851;
}
}
else
10987654321098765432109876543210
010001x1x10xxxxx100110xxxxxxxxxx
ummla. */
- return 2793;
+ return 2850;
}
}
}
10987654321098765432109876543210
101001x10x1xxxxx000xxxxxxxxxxxxx
ld1row. */
- return 2802;
+ return 2859;
}
else
{
10987654321098765432109876543210
101001x11x1xxxxx000xxxxxxxxxxxxx
ld1rod. */
- return 2803;
+ return 2860;
}
}
}
10987654321098765432109876543210
101001x10x1xxxxx001xxxxxxxxxxxxx
ld1row. */
- return 2806;
+ return 2863;
}
else
{
10987654321098765432109876543210
101001x11x1xxxxx001xxxxxxxxxxxxx
ld1rod. */
- return 2807;
+ return 2864;
}
}
}
10987654321098765432109876543210
001001x1xx1xxxxx01x000xxxxx10xxx
whilege. */
- return 2726;
+ return 2771;
}
else
{
10987654321098765432109876543210
001001x1xx1xxxxx01x000xxxxx11xxx
whilegt. */
- return 2727;
+ return 2772;
}
}
else
10987654321098765432109876543210
001001x1xx1xxxxx01x010xxxxx10xxx
whilehs. */
- return 2729;
+ return 2774;
}
else
{
10987654321098765432109876543210
001001x1xx1xxxxx01x010xxxxx11xxx
whilehi. */
- return 2728;
+ return 2773;
}
}
else
10987654321098765432109876543210
001001x1xx1xxxxx01x001xxxxx10xxx
whilelt. */
- return 2733;
+ return 2778;
}
else
{
10987654321098765432109876543210
001001x1xx1xxxxx01x001xxxxx11xxx
whilele. */
- return 2730;
+ return 2775;
}
}
else
10987654321098765432109876543210
001001x1xx1xxxxx01x011xxxxx10xxx
whilelo. */
- return 2731;
+ return 2776;
}
else
{
10987654321098765432109876543210
001001x1xx1xxxxx01x011xxxxx11xxx
whilels. */
- return 2732;
+ return 2777;
}
}
else
10987654321098765432109876543210
011001x110001x10101xxxxxxxxxxxxx
bfcvt. */
- return 2823;
+ return 2880;
}
}
else
10987654321098765432109876543210
x1010100xxxxxxxxxxxxxxxxxxx1xxxx
bc.c. */
- return 2959;
+ return 3016;
}
else
{
10987654321098765432109876543210
xx01110100xxxxxx0000xxxxxxxxxxxx
cpyp. */
- return 2887;
+ return 2944;
}
else
{
10987654321098765432109876543210
xx01110110xxxxxx0000xxxxxxxxxxxx
cpye. */
- return 2889;
+ return 2946;
}
}
else
10987654321098765432109876543210
xx01110100xxxxxx1000xxxxxxxxxxxx
cpyprn. */
- return 2893;
+ return 2950;
}
else
{
10987654321098765432109876543210
xx01110110xxxxxx1000xxxxxxxxxxxx
cpyern. */
- return 2895;
+ return 2952;
}
}
}
10987654321098765432109876543210
xx01110100xxxxxx0100xxxxxxxxxxxx
cpypwn. */
- return 2890;
+ return 2947;
}
else
{
10987654321098765432109876543210
xx01110110xxxxxx0100xxxxxxxxxxxx
cpyewn. */
- return 2892;
+ return 2949;
}
}
else
10987654321098765432109876543210
xx01110100xxxxxx1100xxxxxxxxxxxx
cpypn. */
- return 2896;
+ return 2953;
}
else
{
10987654321098765432109876543210
xx01110110xxxxxx1100xxxxxxxxxxxx
cpyen. */
- return 2898;
+ return 2955;
}
}
}
10987654321098765432109876543210
xx01110100xxxxxx0010xxxxxxxxxxxx
cpyprt. */
- return 2911;
+ return 2968;
}
else
{
10987654321098765432109876543210
xx01110110xxxxxx0010xxxxxxxxxxxx
cpyert. */
- return 2913;
+ return 2970;
}
}
else
10987654321098765432109876543210
xx01110100xxxxxx1010xxxxxxxxxxxx
cpyprtrn. */
- return 2917;
+ return 2974;
}
else
{
10987654321098765432109876543210
xx01110110xxxxxx1010xxxxxxxxxxxx
cpyertrn. */
- return 2919;
+ return 2976;
}
}
}
10987654321098765432109876543210
xx01110100xxxxxx0110xxxxxxxxxxxx
cpyprtwn. */
- return 2914;
+ return 2971;
}
else
{
10987654321098765432109876543210
xx01110110xxxxxx0110xxxxxxxxxxxx
cpyertwn. */
- return 2916;
+ return 2973;
}
}
else
10987654321098765432109876543210
xx01110100xxxxxx1110xxxxxxxxxxxx
cpyprtn. */
- return 2920;
+ return 2977;
}
else
{
10987654321098765432109876543210
xx01110110xxxxxx1110xxxxxxxxxxxx
cpyertn. */
- return 2922;
+ return 2979;
}
}
}
10987654321098765432109876543210
xx01110100xxxxxx0001xxxxxxxxxxxx
cpypwt. */
- return 2899;
+ return 2956;
}
else
{
10987654321098765432109876543210
xx01110110xxxxxx0001xxxxxxxxxxxx
cpyewt. */
- return 2901;
+ return 2958;
}
}
else
10987654321098765432109876543210
xx01110100xxxxxx1001xxxxxxxxxxxx
cpypwtrn. */
- return 2905;
+ return 2962;
}
else
{
10987654321098765432109876543210
xx01110110xxxxxx1001xxxxxxxxxxxx
cpyewtrn. */
- return 2907;
+ return 2964;
}
}
}
10987654321098765432109876543210
xx01110100xxxxxx0101xxxxxxxxxxxx
cpypwtwn. */
- return 2902;
+ return 2959;
}
else
{
10987654321098765432109876543210
xx01110110xxxxxx0101xxxxxxxxxxxx
cpyewtwn. */
- return 2904;
+ return 2961;
}
}
else
10987654321098765432109876543210
xx01110100xxxxxx1101xxxxxxxxxxxx
cpypwtn. */
- return 2908;
+ return 2965;
}
else
{
10987654321098765432109876543210
xx01110110xxxxxx1101xxxxxxxxxxxx
cpyewtn. */
- return 2910;
+ return 2967;
}
}
}
10987654321098765432109876543210
xx01110100xxxxxx0011xxxxxxxxxxxx
cpypt. */
- return 2923;
+ return 2980;
}
else
{
10987654321098765432109876543210
xx01110110xxxxxx0011xxxxxxxxxxxx
cpyet. */
- return 2925;
+ return 2982;
}
}
else
10987654321098765432109876543210
xx01110100xxxxxx1011xxxxxxxxxxxx
cpyptrn. */
- return 2929;
+ return 2986;
}
else
{
10987654321098765432109876543210
xx01110110xxxxxx1011xxxxxxxxxxxx
cpyetrn. */
- return 2931;
+ return 2988;
}
}
}
10987654321098765432109876543210
xx01110100xxxxxx0111xxxxxxxxxxxx
cpyptwn. */
- return 2926;
+ return 2983;
}
else
{
10987654321098765432109876543210
xx01110110xxxxxx0111xxxxxxxxxxxx
cpyetwn. */
- return 2928;
+ return 2985;
}
}
else
10987654321098765432109876543210
xx01110100xxxxxx1111xxxxxxxxxxxx
cpyptn. */
- return 2932;
+ return 2989;
}
else
{
10987654321098765432109876543210
xx01110110xxxxxx1111xxxxxxxxxxxx
cpyetn. */
- return 2934;
+ return 2991;
}
}
}
10987654321098765432109876543210
xx01110101xxxxxx0000xxxxxxxxxxxx
cpym. */
- return 2888;
+ return 2945;
}
else
{
10987654321098765432109876543210
xx01110111xxxxxx0000xxxxxxxxxxxx
setgp. */
- return 2947;
+ return 3004;
}
}
else
10987654321098765432109876543210
xx01110101xxxxxx1000xxxxxxxxxxxx
cpymrn. */
- return 2894;
+ return 2951;
}
else
{
10987654321098765432109876543210
xx01110111xxxxxx1000xxxxxxxxxxxx
setge. */
- return 2949;
+ return 3006;
}
}
}
10987654321098765432109876543210
xx01110101xxxxxx0100xxxxxxxxxxxx
cpymwn. */
- return 2891;
+ return 2948;
}
else
{
10987654321098765432109876543210
xx01110111xxxxxx0100xxxxxxxxxxxx
setgm. */
- return 2948;
+ return 3005;
}
}
else
10987654321098765432109876543210
xx011101x1xxxxxx1100xxxxxxxxxxxx
cpymn. */
- return 2897;
+ return 2954;
}
}
}
10987654321098765432109876543210
xx01110101xxxxxx0010xxxxxxxxxxxx
cpymrt. */
- return 2912;
+ return 2969;
}
else
{
10987654321098765432109876543210
xx01110111xxxxxx0010xxxxxxxxxxxx
setgpn. */
- return 2953;
+ return 3010;
}
}
else
10987654321098765432109876543210
xx01110101xxxxxx1010xxxxxxxxxxxx
cpymrtrn. */
- return 2918;
+ return 2975;
}
else
{
10987654321098765432109876543210
xx01110111xxxxxx1010xxxxxxxxxxxx
setgen. */
- return 2955;
+ return 3012;
}
}
}
10987654321098765432109876543210
xx01110101xxxxxx0110xxxxxxxxxxxx
cpymrtwn. */
- return 2915;
+ return 2972;
}
else
{
10987654321098765432109876543210
xx01110111xxxxxx0110xxxxxxxxxxxx
setgmn. */
- return 2954;
+ return 3011;
}
}
else
10987654321098765432109876543210
xx011101x1xxxxxx1110xxxxxxxxxxxx
cpymrtn. */
- return 2921;
+ return 2978;
}
}
}
10987654321098765432109876543210
xx01110101xxxxxx0001xxxxxxxxxxxx
cpymwt. */
- return 2900;
+ return 2957;
}
else
{
10987654321098765432109876543210
xx01110111xxxxxx0001xxxxxxxxxxxx
setgpt. */
- return 2950;
+ return 3007;
}
}
else
10987654321098765432109876543210
xx01110101xxxxxx1001xxxxxxxxxxxx
cpymwtrn. */
- return 2906;
+ return 2963;
}
else
{
10987654321098765432109876543210
xx01110111xxxxxx1001xxxxxxxxxxxx
setget. */
- return 2952;
+ return 3009;
}
}
}
10987654321098765432109876543210
xx01110101xxxxxx0101xxxxxxxxxxxx
cpymwtwn. */
- return 2903;
+ return 2960;
}
else
{
10987654321098765432109876543210
xx01110111xxxxxx0101xxxxxxxxxxxx
setgmt. */
- return 2951;
+ return 3008;
}
}
else
10987654321098765432109876543210
xx011101x1xxxxxx1101xxxxxxxxxxxx
cpymwtn. */
- return 2909;
+ return 2966;
}
}
}
10987654321098765432109876543210
xx01110101xxxxxx0011xxxxxxxxxxxx
cpymt. */
- return 2924;
+ return 2981;
}
else
{
10987654321098765432109876543210
xx01110111xxxxxx0011xxxxxxxxxxxx
setgptn. */
- return 2956;
+ return 3013;
}
}
else
10987654321098765432109876543210
xx01110101xxxxxx1011xxxxxxxxxxxx
cpymtrn. */
- return 2930;
+ return 2987;
}
else
{
10987654321098765432109876543210
xx01110111xxxxxx1011xxxxxxxxxxxx
setgetn. */
- return 2958;
+ return 3015;
}
}
}
10987654321098765432109876543210
xx01110101xxxxxx0111xxxxxxxxxxxx
cpymtwn. */
- return 2927;
+ return 2984;
}
else
{
10987654321098765432109876543210
xx01110111xxxxxx0111xxxxxxxxxxxx
setgmtn. */
- return 2957;
+ return 3014;
}
}
else
10987654321098765432109876543210
xx011101x1xxxxxx1111xxxxxxxxxxxx
cpymtn. */
- return 2933;
+ return 2990;
}
}
}
10987654321098765432109876543210
0x001110xx0xxxxx1x1001xxxxxxxxxx
smmla. */
- return 2814;
+ return 2871;
}
}
}
10987654321098765432109876543210
0x001110xx0xxxxx1x0101xxxxxxxxxx
sdot. */
- return 2740;
+ return 2797;
}
}
else
10987654321098765432109876543210
0x001110xx0xxxxx1x1011xxxxxxxxxx
usmmla. */
- return 2816;
+ return 2873;
}
}
}
10987654321098765432109876543210
0x001110xx0xxxxx1x0111xxxxxxxxxx
usdot. */
- return 2817;
+ return 2874;
}
}
else
10987654321098765432109876543210
1x001110000xxxxxxxxxxxxxxxxxxxxx
eor3. */
- return 2747;
+ return 2804;
}
else
{
10987654321098765432109876543210
1x001110100xxxxxxxxxxxxxxxxxxxxx
xar. */
- return 2749;
+ return 2806;
}
}
else
10987654321098765432109876543210
1x001110x10xxxxx0xxxxxxxxxxxxxxx
sm3ss1. */
- return 2751;
+ return 2808;
}
else
{
10987654321098765432109876543210
1x001110010xxxxx1xxx00xxxxxxxxxx
sm3tt1a. */
- return 2752;
+ return 2809;
}
else
{
10987654321098765432109876543210
1x001110110xxxxx1xxx00xxxxxxxxxx
sha512su0. */
- return 2745;
+ return 2802;
}
}
else
10987654321098765432109876543210
1x001110x10xxxxx1xxx10xxxxxxxxxx
sm3tt2a. */
- return 2754;
+ return 2811;
}
}
else
10987654321098765432109876543210
1x001110010xxxxx1xxx01xxxxxxxxxx
sm3tt1b. */
- return 2753;
+ return 2810;
}
else
{
10987654321098765432109876543210
1x001110110xxxxx1xxx01xxxxxxxxxx
sm4e. */
- return 2758;
+ return 2815;
}
}
else
10987654321098765432109876543210
1x001110x10xxxxx1xxx11xxxxxxxxxx
sm3tt2b. */
- return 2755;
+ return 2812;
}
}
}
10987654321098765432109876543210
xx101110xx0xxxxx100101xxxxxxxxxx
udot. */
- return 2739;
+ return 2796;
}
}
else
10987654321098765432109876543210
xx101110xx0xxxxx101x01xxxxxxxxxx
ummla. */
- return 2815;
+ return 2872;
}
else
{
10987654321098765432109876543210
xx101110xx0xxxxx1x1011xxxxxxxxxx
bfmmla. */
- return 2831;
+ return 2888;
}
else
{
10987654321098765432109876543210
xx1011100x0xxxxx1x1111xxxxxxxxxx
bfdot. */
- return 2829;
+ return 2886;
}
else
{
10987654321098765432109876543210
x01011101x0xxxxx1x1111xxxxxxxxxx
bfmlalb. */
- return 2836;
+ return 2893;
}
else
{
10987654321098765432109876543210
x11011101x0xxxxx1x1111xxxxxxxxxx
bfmlalt. */
- return 2835;
+ return 2892;
}
}
}
10987654321098765432109876543210
000011101x1xxxx1011010xxxxxxxxxx
bfcvtn. */
- return 2832;
+ return 2889;
}
else
{
10987654321098765432109876543210
010011101x1xxxx1011010xxxxxxxxxx
bfcvtn2. */
- return 2833;
+ return 2890;
}
}
}
10987654321098765432109876543210
1x001110xx1xxxxx0xxxxxxxxxxxxxxx
bcax. */
- return 2750;
+ return 2807;
}
}
else
10987654321098765432109876543210
11001110xx1xxxxx100000xxxxxxxxxx
sha512h. */
- return 2743;
+ return 2800;
}
}
}
10987654321098765432109876543210
11001110xx1xxxxx110000xxxxxxxxxx
sm3partw1. */
- return 2756;
+ return 2813;
}
}
}
10987654321098765432109876543210
1x001110xx1xxxxx100010xxxxxxxxxx
sha512su1. */
- return 2746;
+ return 2803;
}
}
else
10987654321098765432109876543210
1x0011100x1xxxxx110010xxxxxxxxxx
sm4ekey. */
- return 2759;
+ return 2816;
}
}
else
10987654321098765432109876543210
1x001110xx1xxxxx100001xxxxxxxxxx
sha512h2. */
- return 2744;
+ return 2801;
}
}
else
10987654321098765432109876543210
1x0011100x1xxxxx110001xxxxxxxxxx
sm3partw2. */
- return 2757;
+ return 2814;
}
}
else
10987654321098765432109876543210
1x001110xx1xxxxx100011xxxxxxxxxx
rax1. */
- return 2748;
+ return 2805;
}
}
else
10987654321098765432109876543210
x01011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2762;
+ return 2819;
}
else
{
10987654321098765432109876543210
x11011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2766;
+ return 2823;
}
}
}
10987654321098765432109876543210
x01011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2763;
+ return 2820;
}
else
{
10987654321098765432109876543210
x11011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2767;
+ return 2824;
}
}
}
10987654321098765432109876543210
x00011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2760;
+ return 2817;
}
else
{
10987654321098765432109876543210
x10011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2764;
+ return 2821;
}
}
else
10987654321098765432109876543210
x00011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2761;
+ return 2818;
}
else
{
10987654321098765432109876543210
x10011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2765;
+ return 2822;
}
}
else
10987654321098765432109876543210
x0001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2768;
+ return 2825;
}
else
{
10987654321098765432109876543210
x1001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2772;
+ return 2829;
}
}
else
10987654321098765432109876543210
x0001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2769;
+ return 2826;
}
else
{
10987654321098765432109876543210
x1001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2773;
+ return 2830;
}
}
else
10987654321098765432109876543210
x0101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2770;
+ return 2827;
}
else
{
10987654321098765432109876543210
x1101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2774;
+ return 2831;
}
}
}
10987654321098765432109876543210
x0101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2771;
+ return 2828;
}
else
{
10987654321098765432109876543210
x1101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2775;
+ return 2832;
}
}
}
10987654321098765432109876543210
xx001111xxxxxxxx1110x0xxxxxxxxxx
sdot. */
- return 2742;
+ return 2799;
}
else
{
10987654321098765432109876543210
xx101111xxxxxxxx1110x0xxxxxxxxxx
udot. */
- return 2741;
+ return 2798;
}
}
}
10987654321098765432109876543210
xx00111100xxxxxx1111x0xxxxxxxxxx
sudot. */
- return 2819;
+ return 2876;
}
else
{
10987654321098765432109876543210
xx00111110xxxxxx1111x0xxxxxxxxxx
usdot. */
- return 2818;
+ return 2875;
}
}
else
10987654321098765432109876543210
xx00111101xxxxxx1111x0xxxxxxxxxx
bfdot. */
- return 2830;
+ return 2887;
}
else
{
10987654321098765432109876543210
x000111111xxxxxx1111x0xxxxxxxxxx
bfmlalb. */
- return 2838;
+ return 2895;
}
else
{
10987654321098765432109876543210
x100111111xxxxxx1111x0xxxxxxxxxx
bfmlalt. */
- return 2837;
+ return 2894;
}
}
}
case 2407: value = 2412; break; /* st1q --> st1q. */
case 2412: return NULL; /* st1q --> NULL. */
case 12: value = 19; break; /* add --> addg. */
- case 19: value = 2960; break; /* addg --> smax. */
- case 2960: value = 2961; break; /* smax --> umax. */
- case 2961: value = 2962; break; /* umax --> smin. */
- case 2962: value = 2963; break; /* smin --> umin. */
- case 2963: return NULL; /* umin --> NULL. */
+ case 19: value = 3017; break; /* addg --> smax. */
+ case 3017: value = 3018; break; /* smax --> umax. */
+ case 3018: value = 3019; break; /* umax --> smin. */
+ case 3019: value = 3020; break; /* smin --> umin. */
+ case 3020: return NULL; /* umin --> NULL. */
case 16: value = 20; break; /* sub --> subg. */
case 20: return NULL; /* subg --> NULL. */
case 971: value = 975; break; /* stnp --> stp. */
case 824: return NULL; /* fsqrt --> NULL. */
case 832: value = 833; break; /* frintz --> frintz. */
case 833: return NULL; /* frintz --> NULL. */
- case 825: value = 2834; break; /* fcvt --> bfcvt. */
- case 2834: return NULL; /* bfcvt --> NULL. */
+ case 825: value = 2891; break; /* fcvt --> bfcvt. */
+ case 2891: return NULL; /* bfcvt --> NULL. */
case 834: value = 835; break; /* frinta --> frinta. */
case 835: return NULL; /* frinta --> NULL. */
case 836: value = 837; break; /* frintx --> frintx. */
case 33:
case 34:
case 35:
- case 263:
+ case 268:
return aarch64_ext_reglane (self, info, code, inst, errors);
case 36:
return aarch64_ext_reglist (self, info, code, inst, errors);
case 193:
case 194:
case 237:
- case 257:
- case 258:
- case 260:
case 262:
+ case 263:
+ case 265:
case 267:
- case 268:
+ case 272:
+ case 273:
return aarch64_ext_imm (self, info, code, inst, errors);
case 44:
case 45:
case 107:
return aarch64_ext_prfop (self, info, code, inst, errors);
case 108:
- case 259:
- case 261:
+ case 264:
+ case 266:
return aarch64_ext_none (self, info, code, inst, errors);
case 109:
return aarch64_ext_hint (self, info, code, inst, errors);
return aarch64_ext_sme_za_hv_tiles_range (self, info, code, inst, errors);
case 235:
case 236:
- case 247:
- case 248:
case 249:
case 250:
case 251:
case 254:
case 255:
case 256:
+ case 257:
+ case 258:
+ case 259:
+ case 260:
+ case 261:
return aarch64_ext_simple_index (self, info, code, inst, errors);
case 239:
case 240:
case 241:
case 242:
case 243:
- return aarch64_ext_sme_za_array (self, info, code, inst, errors);
case 244:
- return aarch64_ext_sme_addr_ri_u4xvl (self, info, code, inst, errors);
case 245:
- return aarch64_ext_sme_sm_za (self, info, code, inst, errors);
+ return aarch64_ext_sme_za_array (self, info, code, inst, errors);
case 246:
+ return aarch64_ext_sme_addr_ri_u4xvl (self, info, code, inst, errors);
+ case 247:
+ return aarch64_ext_sme_sm_za (self, info, code, inst, errors);
+ case 248:
return aarch64_ext_sme_pred_reg_with_index (self, info, code, inst, errors);
- case 264:
- case 265:
- case 266:
+ case 269:
+ case 270:
+ case 271:
return aarch64_ext_x0_to_x30 (self, info, code, inst, errors);
default: assert (0); abort ();
}
{AARCH64_OPND_CLASS_SVE_REG, "SME_PNn3_INDEX2", 8 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_PNn3, FLD_imm2_8}, "an indexed SVE predicate-as-counter register"},
{AARCH64_OPND_CLASS_SVE_REG, "SME_list_of_64bit_tiles", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_zero_mask}, "a list of 64-bit ZA element tiles"},
{AARCH64_OPND_CLASS_ZA_ACCESS, "SME_ZA_HV_idx_ldstr", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_size_22,FLD_index2,FLD_SME_V,FLD_SME_Rv,FLD_imm4_0}, "an SME horizontal or vertical vector access register"},
+ {AARCH64_OPND_CLASS_ZA_ACCESS, "SME_ZA_array_off1x4", 4 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Rv,FLD_imm1_0}, "ZA array"},
{AARCH64_OPND_CLASS_ZA_ACCESS, "SME_ZA_array_off2x2", 2 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Rv,FLD_imm2_0}, "ZA array"},
+ {AARCH64_OPND_CLASS_ZA_ACCESS, "SME_ZA_array_off2x4", 4 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Rv,FLD_imm2_0}, "ZA array"},
{AARCH64_OPND_CLASS_ZA_ACCESS, "SME_ZA_array_off3_0", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Rv,FLD_imm3_0}, "ZA array"},
{AARCH64_OPND_CLASS_ZA_ACCESS, "SME_ZA_array_off3_5", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Rv,FLD_imm3_5}, "ZA array"},
{AARCH64_OPND_CLASS_ZA_ACCESS, "SME_ZA_array_off3x2", 2 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Rv,FLD_imm3_0}, "ZA array"},
{AARCH64_OPND_CLASS_SVE_REG, "SME_PnT_Wm_imm", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Rm,FLD_SVE_Pn,FLD_SME_i1,FLD_SME_tszh,FLD_SME_tszl}, "Source scalable predicate register with index "},
{AARCH64_OPND_CLASS_SVE_REG, "SME_Zm_INDEX1", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Zm, FLD_imm1_10}, "an indexed SVE vector register"},
{AARCH64_OPND_CLASS_SVE_REG, "SME_Zm_INDEX2", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Zm, FLD_imm2_10}, "an indexed SVE vector register"},
+ {AARCH64_OPND_CLASS_SVE_REG, "SME_Zm_INDEX3_1", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Zm, FLD_imm1_10, FLD_imm2_1}, "an indexed SVE vector register"},
{AARCH64_OPND_CLASS_SVE_REG, "SME_Zm_INDEX3_2", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Zm, FLD_imm2_10, FLD_imm1_2}, "an indexed SVE vector register"},
{AARCH64_OPND_CLASS_SVE_REG, "SME_Zm_INDEX3_10", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Zm, FLD_imm1_15, FLD_imm2_10}, "an indexed SVE vector register"},
+ {AARCH64_OPND_CLASS_SVE_REG, "SME_Zm_INDEX4_1", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Zm, FLD_imm2_10, FLD_imm2_1}, "an indexed SVE vector register"},
+ {AARCH64_OPND_CLASS_SVE_REG, "SME_Zm_INDEX4_10", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Zm, FLD_imm1_15, FLD_imm3_10}, "an indexed SVE vector register"},
{AARCH64_OPND_CLASS_SVE_REG, "SME_Zn_INDEX1_16", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Zn, FLD_imm1_16}, "an indexed SVE vector register"},
{AARCH64_OPND_CLASS_SVE_REG, "SME_Zn_INDEX2_15", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Zn, FLD_imm2_15}, "an indexed SVE vector register"},
{AARCH64_OPND_CLASS_SVE_REG, "SME_Zn_INDEX2_16", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Zn, FLD_imm2_16}, "an indexed SVE vector register"},
{ 0, 4 }, /* cond2: condition in truly conditional-executed inst. */
{ 5, 5 }, /* defgh: d:e:f:g:h bits in AdvSIMD modified immediate. */
{ 21, 2 }, /* hw: in move wide constant instructions. */
+ { 0, 1 }, /* imm1_0: general immediate in bits [0]. */
{ 2, 1 }, /* imm1_2: general immediate in bits [2]. */
{ 8, 1 }, /* imm1_8: general immediate in bits [8]. */
{ 10, 1 }, /* imm1_10: general immediate in bits [10]. */
{ 15, 1 }, /* imm1_15: general immediate in bits [15]. */
{ 16, 1 }, /* imm1_16: general immediate in bits [16]. */
{ 0, 2 }, /* imm2_0: general immediate in bits [1:0]. */
+ { 1, 2 }, /* imm2_1: general immediate in bits [2:1]. */
{ 8, 2 }, /* imm2_8: general immediate in bits [9:8]. */
{ 10, 2 }, /* imm2_10: 2-bit immediate, bits [11:10] */
{ 15, 2 }, /* imm2_15: 2-bit immediate, bits [16:15] */
case AARCH64_OPND_SME_Zm_INDEX1:
case AARCH64_OPND_SME_Zm_INDEX2:
+ case AARCH64_OPND_SME_Zm_INDEX3_1:
case AARCH64_OPND_SME_Zm_INDEX3_2:
case AARCH64_OPND_SME_Zm_INDEX3_10:
+ case AARCH64_OPND_SME_Zm_INDEX4_1:
+ case AARCH64_OPND_SME_Zm_INDEX4_10:
size = get_operand_fields_width (get_operand_from_code (type)) - 4;
if (!check_reglane (opnd, mismatch_detail, idx, "z", 0, 15,
0, (1 << size) - 1))
return 0;
break;
+ case AARCH64_OPND_SME_ZA_array_off1x4:
+ if (!check_za_access (opnd, mismatch_detail, idx, 8, 1, 4,
+ get_opcode_dependent_value (opcode)))
+ return 0;
+ break;
+
case AARCH64_OPND_SME_ZA_array_off2x2:
if (!check_za_access (opnd, mismatch_detail, idx, 8, 3, 2,
get_opcode_dependent_value (opcode)))
return 0;
break;
+ case AARCH64_OPND_SME_ZA_array_off2x4:
+ if (!check_za_access (opnd, mismatch_detail, idx, 8, 3, 4,
+ get_opcode_dependent_value (opcode)))
+ return 0;
+ break;
+
case AARCH64_OPND_SME_ZA_array_off3x2:
if (!check_za_access (opnd, mismatch_detail, idx, 8, 7, 2,
get_opcode_dependent_value (opcode)))
case AARCH64_OPND_SVE_Zn_INDEX:
case AARCH64_OPND_SME_Zm_INDEX1:
case AARCH64_OPND_SME_Zm_INDEX2:
+ case AARCH64_OPND_SME_Zm_INDEX3_1:
case AARCH64_OPND_SME_Zm_INDEX3_2:
case AARCH64_OPND_SME_Zm_INDEX3_10:
+ case AARCH64_OPND_SME_Zm_INDEX4_1:
+ case AARCH64_OPND_SME_Zm_INDEX4_10:
case AARCH64_OPND_SME_Zn_INDEX1_16:
case AARCH64_OPND_SME_Zn_INDEX2_15:
case AARCH64_OPND_SME_Zn_INDEX2_16:
print_sme_za_list (buf, size, opnd->reg.regno, styler);
break;
+ case AARCH64_OPND_SME_ZA_array_off1x4:
case AARCH64_OPND_SME_ZA_array_off2x2:
+ case AARCH64_OPND_SME_ZA_array_off2x4:
case AARCH64_OPND_SME_ZA_array_off3_0:
case AARCH64_OPND_SME_ZA_array_off3_5:
case AARCH64_OPND_SME_ZA_array_off3x2:
FLD_cond2,
FLD_defgh,
FLD_hw,
+ FLD_imm1_0,
FLD_imm1_2,
FLD_imm1_8,
FLD_imm1_10,
FLD_imm1_15,
FLD_imm1_16,
FLD_imm2_0,
+ FLD_imm2_1,
FLD_imm2_8,
FLD_imm2_10,
FLD_imm2_15,
{ \
QLF3(S_D,S_D,S_D), \
}
+#define OP_SVE_DHH \
+{ \
+ QLF3(S_D,S_H,S_H), \
+}
#define OP_SVE_DMMD \
{ \
QLF4(S_D,P_M,P_M,S_D), \
static const aarch64_feature_set aarch64_feature_sme2 =
AARCH64_FEATURE (AARCH64_FEATURE_SVE2 | AARCH64_FEATURE_SME
| AARCH64_FEATURE_SME2, 0);
+static const aarch64_feature_set aarch64_feature_sme2_i16i64 =
+ AARCH64_FEATURE (AARCH64_FEATURE_SME2 | AARCH64_FEATURE_SME_I16I64, 0);
static const aarch64_feature_set aarch64_feature_sme2_f64f64 =
AARCH64_FEATURE (AARCH64_FEATURE_SME2 | AARCH64_FEATURE_SME_F64F64, 0);
static const aarch64_feature_set aarch64_feature_v8_6 =
#define SME_F64F64 &aarch64_feature_sme_f64f64
#define SME_I16I64 &aarch64_feature_sme_i16i64
#define SME2 &aarch64_feature_sme2
+#define SME2_I16I64 &aarch64_feature_sme2_i16i64
#define SME2_F64F64 &aarch64_feature_sme2_f64f64
#define ARMV8_6 &aarch64_feature_v8_6
#define ARMV8_6_SVE &aarch64_feature_v8_6
#define SME2_INSN(NAME,OPCODE,MASK,CLASS,OP,OPS,QUALS,FLAGS,TIED) \
{ NAME, OPCODE, MASK, CLASS, OP, SME2, OPS, QUALS, \
F_STRICT | FLAGS, 0, TIED, NULL }
+#define SME2_I16I64_INSN(NAME,OPCODE,MASK,CLASS,OP,OPS,QUALS,FLAGS,TIED) \
+ { NAME, OPCODE, MASK, CLASS, OP, SME2_I16I64, OPS, QUALS, \
+ F_STRICT | FLAGS, 0, TIED, NULL }
#define SME2_F64F64_INSN(NAME,OPCODE,MASK,CLASS,OP,OPS,QUALS,FLAGS,TIED) \
{ NAME, OPCODE, MASK, CLASS, OP, SME2_F64F64, OPS, QUALS, \
F_STRICT | FLAGS, 0, TIED, NULL }
SME2_INSN ("smlal", 0xc1700800, 0xfff09c1c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (4), 0),
SME2_INSN ("smlal", 0xc1e00800, 0xffe19c3c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx2, SME_Zmx2), OP_SVE_SHH, F_OD (2), 0),
SME2_INSN ("smlal", 0xc1e10800, 0xffe39c7c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx4, SME_Zmx4), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("smlall", 0xc1000000, 0xfff0001c, sme_misc, 0, OP3 (SME_ZA_array_off2x4, SVE_Zn, SME_Zm_INDEX4_10), OP_SVE_SBB, 0, 0),
+ SME2_INSN ("smlall", 0xc1100000, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx2, SME_Zm_INDEX4_1), OP_SVE_SBB, F_OD (2), 0),
+ SME2_INSN ("smlall", 0xc1108000, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx4, SME_Zm_INDEX4_1), OP_SVE_SBB, F_OD (4), 0),
+ SME2_INSN ("smlall", 0xc1200400, 0xffb09c1c, sme_int_sd, 0, OP3 (SME_ZA_array_off2x4, SVE_Zn, SME_Zm), OP_SVE_VVV_SD_BH, 0, 0),
+ SME2_INSN ("smlall", 0xc1200000, 0xffb09c1e, sme_int_sd, 0, OP3 (SME_ZA_array_off1x4, SVE_ZnxN, SME_Zm), OP_SVE_VVV_SD_BH, F_OD (2), 0),
+ SME2_INSN ("smlall", 0xc1300000, 0xffb09c1e, sme_int_sd, 0, OP3 (SME_ZA_array_off1x4, SVE_ZnxN, SME_Zm), OP_SVE_VVV_SD_BH, F_OD (4), 0),
+ SME2_INSN ("smlall", 0xc1a00000, 0xffa19c3e, sme_int_sd, 0, OP3 (SME_ZA_array_off1x4, SME_Znx2, SME_Zmx2), OP_SVE_VVV_SD_BH, F_OD (2), 0),
+ SME2_INSN ("smlall", 0xc1a10000, 0xffa39c7e, sme_int_sd, 0, OP3 (SME_ZA_array_off1x4, SME_Znx4, SME_Zmx4), OP_SVE_VVV_SD_BH, F_OD (4), 0),
SME2_INSN ("smlsl", 0xc1c01008, 0xfff01018, sme_misc, 0, OP3 (SME_ZA_array_off3x2, SVE_Zn, SME_Zm_INDEX3_10), OP_SVE_SHH, 0, 0),
SME2_INSN ("smlsl", 0xc1d01008, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx2, SME_Zm_INDEX3_2), OP_SVE_SHH, F_OD (2), 0),
SME2_INSN ("smlsl", 0xc1d09008, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx4, SME_Zm_INDEX3_2), OP_SVE_SHH, F_OD (4), 0),
SME2_INSN ("smlsl", 0xc1700808, 0xfff09c1c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (4), 0),
SME2_INSN ("smlsl", 0xc1e00808, 0xffe19c3c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx2, SME_Zmx2), OP_SVE_SHH, F_OD (2), 0),
SME2_INSN ("smlsl", 0xc1e10808, 0xffe39c7c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx4, SME_Zmx4), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("smlsll", 0xc1000008, 0xfff0001c, sme_misc, 0, OP3 (SME_ZA_array_off2x4, SVE_Zn, SME_Zm_INDEX4_10), OP_SVE_SBB, 0, 0),
+ SME2_INSN ("smlsll", 0xc1100008, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx2, SME_Zm_INDEX4_1), OP_SVE_SBB, F_OD (2), 0),
+ SME2_INSN ("smlsll", 0xc1108008, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx4, SME_Zm_INDEX4_1), OP_SVE_SBB, F_OD (4), 0),
+ SME2_INSN ("smlsll", 0xc1200408, 0xffb09c1c, sme_int_sd, 0, OP3 (SME_ZA_array_off2x4, SVE_Zn, SME_Zm), OP_SVE_VVV_SD_BH, 0, 0),
+ SME2_INSN ("smlsll", 0xc1200008, 0xffb09c1e, sme_int_sd, 0, OP3 (SME_ZA_array_off1x4, SVE_ZnxN, SME_Zm), OP_SVE_VVV_SD_BH, F_OD (2), 0),
+ SME2_INSN ("smlsll", 0xc1300008, 0xffb09c1e, sme_int_sd, 0, OP3 (SME_ZA_array_off1x4, SVE_ZnxN, SME_Zm), OP_SVE_VVV_SD_BH, F_OD (4), 0),
+ SME2_INSN ("smlsll", 0xc1a00008, 0xffa19c3e, sme_int_sd, 0, OP3 (SME_ZA_array_off1x4, SME_Znx2, SME_Zmx2), OP_SVE_VVV_SD_BH, F_OD (2), 0),
+ SME2_INSN ("smlsll", 0xc1a10008, 0xffa39c7e, sme_int_sd, 0, OP3 (SME_ZA_array_off1x4, SME_Znx4, SME_Zmx4), OP_SVE_VVV_SD_BH, F_OD (4), 0),
SME2_INSN ("sqdmulh", 0xc120a400, 0xff30ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("sqdmulh", 0xc120ac00, 0xff30ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("sqdmulh", 0xc120b400, 0xff21ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zmx2), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("sub", 0xc1301818, 0xffb09c18, sme_int_sd, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_VVV_SD, F_OD (4), 0),
SME2_INSN ("sub", 0xc1a01818, 0xffa19c38, sme_int_sd, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zmx2), OP_SVE_VVV_SD, F_OD (2), 0),
SME2_INSN ("sub", 0xc1a11818, 0xffa39c78, sme_int_sd, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zmx4), OP_SVE_VVV_SD, F_OD (4), 0),
+ SME2_INSN ("sumlall", 0xc1000014, 0xfff0001c, sme_misc, 0, OP3 (SME_ZA_array_off2x4, SVE_Zn, SME_Zm_INDEX4_10), OP_SVE_SBB, 0, 0),
+ SME2_INSN ("sumlall", 0xc1100030, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx2, SME_Zm_INDEX4_1), OP_SVE_SBB, F_OD (2), 0),
+ SME2_INSN ("sumlall", 0xc1108030, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx4, SME_Zm_INDEX4_1), OP_SVE_SBB, F_OD (4), 0),
+ SME2_INSN ("sumlall", 0xc1200014, 0xfff09c1e, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SVE_ZnxN, SME_Zm), OP_SVE_SBB, F_OD (2), 0),
+ SME2_INSN ("sumlall", 0xc1300014, 0xfff09c1e, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SVE_ZnxN, SME_Zm), OP_SVE_SBB, F_OD (4), 0),
SME2_INSN ("umax", 0xc120a001, 0xff30ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("umax", 0xc120a801, 0xff30ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("umax", 0xc120b001, 0xff21ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zmx2), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("umlal", 0xc1700810, 0xfff09c1c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (4), 0),
SME2_INSN ("umlal", 0xc1e00810, 0xffe19c3c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx2, SME_Zmx2), OP_SVE_SHH, F_OD (2), 0),
SME2_INSN ("umlal", 0xc1e10810, 0xffe39c7c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx4, SME_Zmx4), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("umlall", 0xc1000010, 0xfff0001c, sme_misc, 0, OP3 (SME_ZA_array_off2x4, SVE_Zn, SME_Zm_INDEX4_10), OP_SVE_SBB, 0, 0),
+ SME2_INSN ("umlall", 0xc1100010, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx2, SME_Zm_INDEX4_1), OP_SVE_SBB, F_OD (2), 0),
+ SME2_INSN ("umlall", 0xc1108010, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx4, SME_Zm_INDEX4_1), OP_SVE_SBB, F_OD (4), 0),
+ SME2_INSN ("umlall", 0xc1200410, 0xffb09c1c, sme_int_sd, 0, OP3 (SME_ZA_array_off2x4, SVE_Zn, SME_Zm), OP_SVE_VVV_SD_BH, 0, 0),
+ SME2_INSN ("umlall", 0xc1200010, 0xffb09c1e, sme_int_sd, 0, OP3 (SME_ZA_array_off1x4, SVE_ZnxN, SME_Zm), OP_SVE_VVV_SD_BH, F_OD (2), 0),
+ SME2_INSN ("umlall", 0xc1300010, 0xffb09c1e, sme_int_sd, 0, OP3 (SME_ZA_array_off1x4, SVE_ZnxN, SME_Zm), OP_SVE_VVV_SD_BH, F_OD (4), 0),
+ SME2_INSN ("umlall", 0xc1a00010, 0xffa19c3e, sme_int_sd, 0, OP3 (SME_ZA_array_off1x4, SME_Znx2, SME_Zmx2), OP_SVE_VVV_SD_BH, F_OD (2), 0),
+ SME2_INSN ("umlall", 0xc1a10010, 0xffa39c7e, sme_int_sd, 0, OP3 (SME_ZA_array_off1x4, SME_Znx4, SME_Zmx4), OP_SVE_VVV_SD_BH, F_OD (4), 0),
SME2_INSN ("umlsl", 0xc1c01018, 0xfff01018, sme_misc, 0, OP3 (SME_ZA_array_off3x2, SVE_Zn, SME_Zm_INDEX3_10), OP_SVE_SHH, 0, 0),
SME2_INSN ("umlsl", 0xc1d01018, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx2, SME_Zm_INDEX3_2), OP_SVE_SHH, F_OD (2), 0),
SME2_INSN ("umlsl", 0xc1d09018, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx4, SME_Zm_INDEX3_2), OP_SVE_SHH, F_OD (4), 0),
SME2_INSN ("umlsl", 0xc1700818, 0xfff09c1c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (4), 0),
SME2_INSN ("umlsl", 0xc1e00818, 0xffe19c3c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx2, SME_Zmx2), OP_SVE_SHH, F_OD (2), 0),
SME2_INSN ("umlsl", 0xc1e10818, 0xffe39c7c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx4, SME_Zmx4), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("umlsll", 0xc1000018, 0xfff0001c, sme_misc, 0, OP3 (SME_ZA_array_off2x4, SVE_Zn, SME_Zm_INDEX4_10), OP_SVE_SBB, 0, 0),
+ SME2_INSN ("umlsll", 0xc1100018, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx2, SME_Zm_INDEX4_1), OP_SVE_SBB, F_OD (2), 0),
+ SME2_INSN ("umlsll", 0xc1108018, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx4, SME_Zm_INDEX4_1), OP_SVE_SBB, F_OD (4), 0),
+ SME2_INSN ("umlsll", 0xc1200418, 0xffb09c1c, sme_int_sd, 0, OP3 (SME_ZA_array_off2x4, SVE_Zn, SME_Zm), OP_SVE_VVV_SD_BH, 0, 0),
+ SME2_INSN ("umlsll", 0xc1200018, 0xffb09c1e, sme_int_sd, 0, OP3 (SME_ZA_array_off1x4, SVE_ZnxN, SME_Zm), OP_SVE_VVV_SD_BH, F_OD (2), 0),
+ SME2_INSN ("umlsll", 0xc1300018, 0xffb09c1e, sme_int_sd, 0, OP3 (SME_ZA_array_off1x4, SVE_ZnxN, SME_Zm), OP_SVE_VVV_SD_BH, F_OD (4), 0),
+ SME2_INSN ("umlsll", 0xc1a00018, 0xffa19c3e, sme_int_sd, 0, OP3 (SME_ZA_array_off1x4, SME_Znx2, SME_Zmx2), OP_SVE_VVV_SD_BH, F_OD (2), 0),
+ SME2_INSN ("umlsll", 0xc1a10018, 0xffa39c7e, sme_int_sd, 0, OP3 (SME_ZA_array_off1x4, SME_Znx4, SME_Zmx4), OP_SVE_VVV_SD_BH, F_OD (4), 0),
SME2_INSN ("urshl", 0xc120a221, 0xff30ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("urshl", 0xc120aa21, 0xff30ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("urshl", 0xc120b221, 0xff21ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zmx2), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("urshl", 0xc120ba21, 0xff23ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zmx4), OP_SVE_VVV_BHSD, 0, 1),
+ SME2_INSN ("usmlall", 0xc1000004, 0xfff0001c, sme_misc, 0, OP3 (SME_ZA_array_off2x4, SVE_Zn, SME_Zm_INDEX4_10), OP_SVE_SBB, 0, 0),
+ SME2_INSN ("usmlall", 0xc1100020, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx2, SME_Zm_INDEX4_1), OP_SVE_SBB, F_OD (2), 0),
+ SME2_INSN ("usmlall", 0xc1108020, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx4, SME_Zm_INDEX4_1), OP_SVE_SBB, F_OD (4), 0),
+ SME2_INSN ("usmlall", 0xc1200404, 0xfff09c1c, sme_misc, 0, OP3 (SME_ZA_array_off2x4, SVE_Zn, SME_Zm), OP_SVE_VVV_SD_BH, 0, 0),
+ SME2_INSN ("usmlall", 0xc1200004, 0xfff09c1e, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SVE_ZnxN, SME_Zm), OP_SVE_VVV_SD_BH, F_OD (2), 0),
+ SME2_INSN ("usmlall", 0xc1300004, 0xfff09c1e, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SVE_ZnxN, SME_Zm), OP_SVE_VVV_SD_BH, F_OD (4), 0),
+ SME2_INSN ("usmlall", 0xc1a00004, 0xffe19c3e, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx2, SME_Zmx2), OP_SVE_SBB, F_OD (2), 0),
+ SME2_INSN ("usmlall", 0xc1a10004, 0xffe39c7e, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx4, SME_Zmx4), OP_SVE_SBB, F_OD (4), 0),
SME2_INSN ("whilege", 0x25204010, 0xff20dc18, sme_size_22, 0, OP4 (SME_PNd3, Rn, Rm, SME_VLxN_13), OP_SVE_VXXU_BHSD, 0, 0),
SME2_INSN ("whilegt", 0x25204018, 0xff20dc18, sme_size_22, 0, OP4 (SME_PNd3, Rn, Rm, SME_VLxN_13), OP_SVE_VXXU_BHSD, 0, 0),
SME2_INSN ("whilehi", 0x25204818, 0xff20dc18, sme_size_22, 0, OP4 (SME_PNd3, Rn, Rm, SME_VLxN_13), OP_SVE_VXXU_BHSD, 0, 0),
SME2_INSN ("whilelt", 0x25204410, 0xff20dc18, sme_size_22, 0, OP4 (SME_PNd3, Rn, Rm, SME_VLxN_13), OP_SVE_VXXU_BHSD, 0, 0),
SME2_INSN ("zero", 0xc0480001, 0xffffffff, sme_misc, 0, OP1 (SME_ZT0_LIST), {}, 0, 0),
+ /* SME2 I16I64 instructions. */
+ SME2_I16I64_INSN ("smlall", 0xc1800000, 0xfff0101c, sme_misc, 0, OP3 (SME_ZA_array_off2x4, SVE_Zn, SME_Zm_INDEX3_10), OP_SVE_DHH, 0, 0),
+ SME2_I16I64_INSN ("smlall", 0xc1900000, 0xfff09838, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx2, SME_Zm_INDEX3_1), OP_SVE_DHH, F_OD (2), 0),
+ SME2_I16I64_INSN ("smlall", 0xc1908000, 0xfff09878, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx4, SME_Zm_INDEX3_1), OP_SVE_DHH, F_OD (4), 0),
+ SME2_I16I64_INSN ("smlsll", 0xc1800008, 0xfff0101c, sme_misc, 0, OP3 (SME_ZA_array_off2x4, SVE_Zn, SME_Zm_INDEX3_10), OP_SVE_DHH, 0, 0),
+ SME2_I16I64_INSN ("smlsll", 0xc1900008, 0xfff09838, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx2, SME_Zm_INDEX3_1), OP_SVE_DHH, F_OD (2), 0),
+ SME2_I16I64_INSN ("smlsll", 0xc1908008, 0xfff09878, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx4, SME_Zm_INDEX3_1), OP_SVE_DHH, F_OD (4), 0),
+ SME2_I16I64_INSN ("umlall", 0xc1800010, 0xfff0101c, sme_misc, 0, OP3 (SME_ZA_array_off2x4, SVE_Zn, SME_Zm_INDEX3_10), OP_SVE_DHH, 0, 0),
+ SME2_I16I64_INSN ("umlall", 0xc1900010, 0xfff09838, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx2, SME_Zm_INDEX3_1), OP_SVE_DHH, F_OD (2), 0),
+ SME2_I16I64_INSN ("umlall", 0xc1908010, 0xfff09878, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx4, SME_Zm_INDEX3_1), OP_SVE_DHH, F_OD (4), 0),
+ SME2_I16I64_INSN ("umlsll", 0xc1800018, 0xfff0101c, sme_misc, 0, OP3 (SME_ZA_array_off2x4, SVE_Zn, SME_Zm_INDEX3_10), OP_SVE_DHH, 0, 0),
+ SME2_I16I64_INSN ("umlsll", 0xc1900018, 0xfff09838, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx2, SME_Zm_INDEX3_1), OP_SVE_DHH, F_OD (2), 0),
+ SME2_I16I64_INSN ("umlsll", 0xc1908018, 0xfff09878, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx4, SME_Zm_INDEX3_1), OP_SVE_DHH, F_OD (4), 0),
+
/* SME2 F64F64 instructions. */
SME2_F64F64_INSN ("fmla", 0xc1d00000, 0xfff09838, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zm_INDEX1), OP_SVE_DDD, F_OD (2), 0),
SME2_F64F64_INSN ("fmla", 0xc1d08000, 0xfff09878, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zm_INDEX1), OP_SVE_DDD, F_OD (4), 0),
Y(ZA_ACCESS, sme_za_hv_tiles, "SME_ZA_HV_idx_ldstr", 0, \
F(FLD_SME_size_22,FLD_index2,FLD_SME_V,FLD_SME_Rv,FLD_imm4_0), \
"an SME horizontal or vertical vector access register") \
+ Y(ZA_ACCESS, sme_za_array, "SME_ZA_array_off1x4", \
+ 4 << OPD_F_OD_LSB, F(FLD_SME_Rv,FLD_imm1_0), "ZA array") \
Y(ZA_ACCESS, sme_za_array, "SME_ZA_array_off2x2", \
2 << OPD_F_OD_LSB, F(FLD_SME_Rv,FLD_imm2_0), "ZA array") \
+ Y(ZA_ACCESS, sme_za_array, "SME_ZA_array_off2x4", \
+ 4 << OPD_F_OD_LSB, F(FLD_SME_Rv,FLD_imm2_0), "ZA array") \
Y(ZA_ACCESS, sme_za_array, "SME_ZA_array_off3_0", 0, \
F(FLD_SME_Rv,FLD_imm3_0), "ZA array") \
Y(ZA_ACCESS, sme_za_array, "SME_ZA_array_off3_5", 0, \
F(FLD_SME_Zm, FLD_imm1_10), "an indexed SVE vector register") \
Y(SVE_REG, simple_index, "SME_Zm_INDEX2", 0, \
F(FLD_SME_Zm, FLD_imm2_10), "an indexed SVE vector register") \
+ Y(SVE_REG, simple_index, "SME_Zm_INDEX3_1", 0, \
+ F(FLD_SME_Zm, FLD_imm1_10, FLD_imm2_1), \
+ "an indexed SVE vector register") \
Y(SVE_REG, simple_index, "SME_Zm_INDEX3_2", 0, \
F(FLD_SME_Zm, FLD_imm2_10, FLD_imm1_2), \
"an indexed SVE vector register") \
Y(SVE_REG, simple_index, "SME_Zm_INDEX3_10", 0, \
F(FLD_SME_Zm, FLD_imm1_15, FLD_imm2_10), \
"an indexed SVE vector register") \
+ Y(SVE_REG, simple_index, "SME_Zm_INDEX4_1", 0, \
+ F(FLD_SME_Zm, FLD_imm2_10, FLD_imm2_1), \
+ "an indexed SVE vector register") \
+ Y(SVE_REG, simple_index, "SME_Zm_INDEX4_10", 0, \
+ F(FLD_SME_Zm, FLD_imm1_15, FLD_imm3_10), \
+ "an indexed SVE vector register") \
Y(SVE_REG, simple_index, "SME_Zn_INDEX1_16", 0, \
F(FLD_SVE_Zn, FLD_imm1_16), "an indexed SVE vector register") \
Y(SVE_REG, simple_index, "SME_Zn_INDEX2_15", 0, \
projects / binutils-gdb.git / commitdiff