tests: update config.ini and stdout for the various tests.

These files were a bit too out of date and resulted in a bit of confusion.

diff --git a/tests/long/00.gzip/ref/alpha/tru64/o3-timing/config.ini b/tests/long/00.gzip/ref/alpha/tru64/o3-timing/config.ini
index 595b91bdc0ad3a1dbe2194d53b87118dcd060b80..737f0dea4a7870e924138cec10b988b005db0c22 100644 (file)
--- a/tests/long/00.gzip/ref/alpha/tru64/o3-timing/config.ini
+++ b/tests/long/00.gzip/ref/alpha/tru64/o3-timing/config.ini
@@ -394,6 +394,8 @@ port=system.physmem.port[0] system.cpu.l2cache.mem_side
 type=PhysicalMemory
 file=
 latency=1
+latency_var=0
+null=false
 range=0:134217727
 zero=false
 port=system.membus.port[0]

diff --git a/tests/long/00.gzip/ref/alpha/tru64/o3-timing/stdout b/tests/long/00.gzip/ref/alpha/tru64/o3-timing/stdout
index 9aaca3eebe2bda8086a2aca9772a9ee7162035bc..cbeafd848ad12a4d140e040affd417614718a439 100644 (file)
--- a/tests/long/00.gzip/ref/alpha/tru64/o3-timing/stdout
+++ b/tests/long/00.gzip/ref/alpha/tru64/o3-timing/stdout
@@ -1,3 +1,17 @@
+M5 Simulator System
+
+Copyright (c) 2001-2008
+The Regents of The University of Michigan
+All Rights Reserved
+
+
+M5 compiled Jul 21 2008 20:12:56
+M5 started Mon Jul 21 20:22:47 2008
+M5 executing on zizzer
+M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881
+M5 commit date Tue Jul 15 14:38:51 2008 -0400
+command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/long/00.gzip/alpha/tru64/o3-timing tests/run.py long/00.gzip/alpha/tru64/o3-timing
+Global frequency set at 1000000000000 ticks per second
 spec_init
 Loading Input Data
 Duplicating 262144 bytes

diff --git a/tests/long/00.gzip/ref/alpha/tru64/simple-atomic/config.ini b/tests/long/00.gzip/ref/alpha/tru64/simple-atomic/config.ini
index e21c42f32cc78dcfa81f5acc633353dcef496fdb..471b28d35ad1fe8e810aa72dacfba46e884aced9 100644 (file)
--- a/tests/long/00.gzip/ref/alpha/tru64/simple-atomic/config.ini
+++ b/tests/long/00.gzip/ref/alpha/tru64/simple-atomic/config.ini
@@ -25,7 +25,8 @@ max_loads_all_threads=0
 max_loads_any_thread=0
 phase=0
 progress_interval=0
-simulate_stalls=false
+simulate_data_stalls=false
+simulate_inst_stalls=false
 system=system
 tracer=system.cpu.tracer
 width=1
@@ -54,9 +55,11 @@ euid=100
 executable=/dist/m5/cpu2000/binaries/alpha/tru64/gzip
 gid=100
 input=cin
+max_stack_size=67108864
 output=cout
 pid=100
 ppid=99
+simpoint=0
 system=system
 uid=100
 
@@ -65,6 +68,7 @@ type=Bus
 block_size=64
 bus_id=0
 clock=1000
+header_cycles=1
 responder_set=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
@@ -73,6 +77,8 @@ port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 type=PhysicalMemory
 file=
 latency=1
+latency_var=0
+null=false
 range=0:134217727
 zero=false
 port=system.membus.port[0]

diff --git a/tests/long/00.gzip/ref/alpha/tru64/simple-atomic/stdout b/tests/long/00.gzip/ref/alpha/tru64/simple-atomic/stdout
index 9aaca3eebe2bda8086a2aca9772a9ee7162035bc..26bc81b057f1bab06d61c47e757e86c9920ee05c 100644 (file)
--- a/tests/long/00.gzip/ref/alpha/tru64/simple-atomic/stdout
+++ b/tests/long/00.gzip/ref/alpha/tru64/simple-atomic/stdout
@@ -1,3 +1,17 @@
+M5 Simulator System
+
+Copyright (c) 2001-2008
+The Regents of The University of Michigan
+All Rights Reserved
+
+
+M5 compiled Jul 21 2008 20:12:56
+M5 started Mon Jul 21 20:12:59 2008
+M5 executing on zizzer
+M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881
+M5 commit date Tue Jul 15 14:38:51 2008 -0400
+command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/long/00.gzip/alpha/tru64/simple-atomic tests/run.py long/00.gzip/alpha/tru64/simple-atomic
+Global frequency set at 1000000000000 ticks per second
 spec_init
 Loading Input Data
 Duplicating 262144 bytes

diff --git a/tests/long/00.gzip/ref/alpha/tru64/simple-timing/config.ini b/tests/long/00.gzip/ref/alpha/tru64/simple-timing/config.ini
index 87443a024be3672024f901b43ee1de6f768efde3..0c02ed13c5d853f70a6871d8d7ce28e6344872e5 100644 (file)
--- a/tests/long/00.gzip/ref/alpha/tru64/simple-timing/config.ini
+++ b/tests/long/00.gzip/ref/alpha/tru64/simple-timing/config.ini
@@ -174,6 +174,7 @@ max_stack_size=67108864
 output=cout
 pid=100
 ppid=99
+simpoint=0
 system=system
 uid=100
 
@@ -191,6 +192,8 @@ port=system.physmem.port[0] system.cpu.l2cache.mem_side
 type=PhysicalMemory
 file=
 latency=1
+latency_var=0
+null=false
 range=0:134217727
 zero=false
 port=system.membus.port[0]

diff --git a/tests/long/00.gzip/ref/alpha/tru64/simple-timing/stdout b/tests/long/00.gzip/ref/alpha/tru64/simple-timing/stdout
index 9aaca3eebe2bda8086a2aca9772a9ee7162035bc..1faa3f4e8ffa38deb7ac2b14ff4f2303c6fd73c8 100644 (file)
--- a/tests/long/00.gzip/ref/alpha/tru64/simple-timing/stdout
+++ b/tests/long/00.gzip/ref/alpha/tru64/simple-timing/stdout
@@ -1,3 +1,17 @@
+M5 Simulator System
+
+Copyright (c) 2001-2008
+The Regents of The University of Michigan
+All Rights Reserved
+
+
+M5 compiled Jul 21 2008 20:12:56
+M5 started Mon Jul 21 20:13:00 2008
+M5 executing on zizzer
+M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881
+M5 commit date Tue Jul 15 14:38:51 2008 -0400
+command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/long/00.gzip/alpha/tru64/simple-timing tests/run.py long/00.gzip/alpha/tru64/simple-timing
+Global frequency set at 1000000000000 ticks per second
 spec_init
 Loading Input Data
 Duplicating 262144 bytes

diff --git a/tests/long/00.gzip/ref/sparc/linux/o3-timing/config.ini b/tests/long/00.gzip/ref/sparc/linux/o3-timing/config.ini
index 4e87924caecae476d857b17c16879681a3aa3253..4219e15b791b0de18b822a16ed45e9e2101a2860 100644 (file)
--- a/tests/long/00.gzip/ref/sparc/linux/o3-timing/config.ini
+++ b/tests/long/00.gzip/ref/sparc/linux/o3-timing/config.ini
@@ -394,6 +394,8 @@ port=system.physmem.port[0] system.cpu.l2cache.mem_side
 type=PhysicalMemory
 file=
 latency=1
+latency_var=0
+null=false
 range=0:134217727
 zero=false
 port=system.membus.port[0]

diff --git a/tests/long/00.gzip/ref/sparc/linux/o3-timing/stdout b/tests/long/00.gzip/ref/sparc/linux/o3-timing/stdout
index d3d1e3cfb236ff9477ad57fff7e8c5ddab0beea9..ce2e79d1fea1d58cb37471af8edcdfb60d21bad3 100644 (file)
--- a/tests/long/00.gzip/ref/sparc/linux/o3-timing/stdout
+++ b/tests/long/00.gzip/ref/sparc/linux/o3-timing/stdout
@@ -1,3 +1,17 @@
+M5 Simulator System
+
+Copyright (c) 2001-2008
+The Regents of The University of Michigan
+All Rights Reserved
+
+
+M5 compiled Jul 21 2008 20:33:06
+M5 started Mon Jul 21 20:33:25 2008
+M5 executing on zizzer
+M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881
+M5 commit date Tue Jul 15 14:38:51 2008 -0400
+command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/long/00.gzip/sparc/linux/o3-timing tests/run.py long/00.gzip/sparc/linux/o3-timing
+Global frequency set at 1000000000000 ticks per second
 spec_init
 Loading Input Data
 Duplicating 262144 bytes
@@ -29,16 +43,4 @@ Uncompressing Data
 Uncompressed data 1048576 bytes in length
 Uncompressed data compared correctly
 Tested 1MB buffer: OK!
-M5 Simulator System
-
-Copyright (c) 2001-2008
-The Regents of The University of Michigan
-All Rights Reserved
-
-
-M5 compiled Mar 17 2008 06:14:16
-M5 started Mon Mar 17 06:14:18 2008
-M5 executing on zizzer
-command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/long/00.gzip/sparc/linux/o3-timing tests/run.py long/00.gzip/sparc/linux/o3-timing
-Global frequency set at 1000000000000 ticks per second
 Exiting @ tick 1102714100000 because target called exit()

diff --git a/tests/long/00.gzip/ref/sparc/linux/simple-atomic/config.ini b/tests/long/00.gzip/ref/sparc/linux/simple-atomic/config.ini
index b267c8dc4b6f415ad426fe85c13efadcdd866904..70a42097e725342d502e4b310656b7749afe79be 100644 (file)
--- a/tests/long/00.gzip/ref/sparc/linux/simple-atomic/config.ini
+++ b/tests/long/00.gzip/ref/sparc/linux/simple-atomic/config.ini
@@ -25,7 +25,8 @@ max_loads_all_threads=0
 max_loads_any_thread=0
 phase=0
 progress_interval=0
-simulate_stalls=false
+simulate_data_stalls=false
+simulate_inst_stalls=false
 system=system
 tracer=system.cpu.tracer
 width=1
@@ -58,6 +59,7 @@ max_stack_size=67108864
 output=cout
 pid=100
 ppid=99
+simpoint=0
 system=system
 uid=100
 
@@ -66,6 +68,7 @@ type=Bus
 block_size=64
 bus_id=0
 clock=1000
+header_cycles=1
 responder_set=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
@@ -74,6 +77,8 @@ port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 type=PhysicalMemory
 file=
 latency=1
+latency_var=0
+null=false
 range=0:134217727
 zero=false
 port=system.membus.port[0]

diff --git a/tests/long/00.gzip/ref/sparc/linux/simple-atomic/stdout b/tests/long/00.gzip/ref/sparc/linux/simple-atomic/stdout
index 5f4ac4eabe035923101a0eb74172bbd0f301464b..e334149fe8edc65d011bbb267ee77fd3fae87957 100644 (file)
--- a/tests/long/00.gzip/ref/sparc/linux/simple-atomic/stdout
+++ b/tests/long/00.gzip/ref/sparc/linux/simple-atomic/stdout
@@ -1,3 +1,17 @@
+M5 Simulator System
+
+Copyright (c) 2001-2008
+The Regents of The University of Michigan
+All Rights Reserved
+
+
+M5 compiled Jul 21 2008 20:33:06
+M5 started Mon Jul 21 20:33:20 2008
+M5 executing on zizzer
+M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881
+M5 commit date Tue Jul 15 14:38:51 2008 -0400
+command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/long/00.gzip/sparc/linux/simple-atomic tests/run.py long/00.gzip/sparc/linux/simple-atomic
+Global frequency set at 1000000000000 ticks per second
 spec_init
 Loading Input Data
 Duplicating 262144 bytes
@@ -29,16 +43,4 @@ Uncompressing Data
 Uncompressed data 1048576 bytes in length
 Uncompressed data compared correctly
 Tested 1MB buffer: OK!
-M5 Simulator System
-
-Copyright (c) 2001-2006
-The Regents of The University of Michigan
-All Rights Reserved
-
-
-M5 compiled Nov 28 2007 18:29:37
-M5 started Wed Nov 28 18:29:38 2007
-M5 executing on nacho
-command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/long/00.gzip/sparc/linux/simple-atomic tests/run.py long/00.gzip/sparc/linux/simple-atomic
-Global frequency set at 1000000000000 ticks per second
 Exiting @ tick 744759833500 because target called exit()

diff --git a/tests/long/00.gzip/ref/sparc/linux/simple-timing/config.ini b/tests/long/00.gzip/ref/sparc/linux/simple-timing/config.ini
index 6c34c6deed697a4a7651b04f74f85ce654f70697..af1b3a07f63148744839ab2fea5e28766fee99f4 100644 (file)
--- a/tests/long/00.gzip/ref/sparc/linux/simple-timing/config.ini
+++ b/tests/long/00.gzip/ref/sparc/linux/simple-timing/config.ini
@@ -174,6 +174,7 @@ max_stack_size=67108864
 output=cout
 pid=100
 ppid=99
+simpoint=0
 system=system
 uid=100
 
@@ -191,6 +192,8 @@ port=system.physmem.port[0] system.cpu.l2cache.mem_side
 type=PhysicalMemory
 file=
 latency=1
+latency_var=0
+null=false
 range=0:134217727
 zero=false
 port=system.membus.port[0]

diff --git a/tests/long/00.gzip/ref/sparc/linux/simple-timing/stdout b/tests/long/00.gzip/ref/sparc/linux/simple-timing/stdout
index ce05ca938f4bc064d9e7348acab2b4050949cabf..5597eb1d29e27fdb20cb1b2bb62b8824255835d1 100644 (file)
--- a/tests/long/00.gzip/ref/sparc/linux/simple-timing/stdout
+++ b/tests/long/00.gzip/ref/sparc/linux/simple-timing/stdout
@@ -1,3 +1,17 @@
+M5 Simulator System
+
+Copyright (c) 2001-2008
+The Regents of The University of Michigan
+All Rights Reserved
+
+
+M5 compiled Jul 21 2008 20:33:06
+M5 started Mon Jul 21 20:33:09 2008
+M5 executing on zizzer
+M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881
+M5 commit date Tue Jul 15 14:38:51 2008 -0400
+command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/long/00.gzip/sparc/linux/simple-timing tests/run.py long/00.gzip/sparc/linux/simple-timing
+Global frequency set at 1000000000000 ticks per second
 spec_init
 Loading Input Data
 Duplicating 262144 bytes
@@ -29,16 +43,4 @@ Uncompressing Data
 Uncompressed data 1048576 bytes in length
 Uncompressed data compared correctly
 Tested 1MB buffer: OK!
-M5 Simulator System
-
-Copyright (c) 2001-2008
-The Regents of The University of Michigan
-All Rights Reserved
-
-
-M5 compiled Feb 24 2008 13:27:50
-M5 started Mon Feb 25 16:16:45 2008
-M5 executing on tater
-command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/long/00.gzip/sparc/linux/simple-timing tests/run.py long/00.gzip/sparc/linux/simple-timing
-Global frequency set at 1000000000000 ticks per second
 Exiting @ tick 2070157841000 because target called exit()

diff --git a/tests/long/00.gzip/ref/x86/linux/simple-atomic/config.ini b/tests/long/00.gzip/ref/x86/linux/simple-atomic/config.ini
index 3572e375e56eab082a1bb72353321e07f2e96b24..7f66790fbd0623ef8dacc9d3c69fefd14a63268f 100644 (file)
--- a/tests/long/00.gzip/ref/x86/linux/simple-atomic/config.ini
+++ b/tests/long/00.gzip/ref/x86/linux/simple-atomic/config.ini
@@ -25,7 +25,8 @@ max_loads_all_threads=0
 max_loads_any_thread=0
 phase=0
 progress_interval=0
-simulate_stalls=false
+simulate_data_stalls=false
+simulate_inst_stalls=false
 system=system
 tracer=system.cpu.tracer
 width=1
@@ -77,6 +78,7 @@ type=PhysicalMemory
 file=
 latency=1
 latency_var=0
+null=false
 range=0:134217727
 zero=false
 port=system.membus.port[0]

diff --git a/tests/long/00.gzip/ref/x86/linux/simple-atomic/stdout b/tests/long/00.gzip/ref/x86/linux/simple-atomic/stdout
index 682b64f8a73aa5341da01d3cb6cf17e55c8d3027..79273f0824f8cf2156a303c1fc493021f76f5d41 100644 (file)
--- a/tests/long/00.gzip/ref/x86/linux/simple-atomic/stdout
+++ b/tests/long/00.gzip/ref/x86/linux/simple-atomic/stdout
@@ -1,3 +1,17 @@
+M5 Simulator System
+
+Copyright (c) 2001-2008
+The Regents of The University of Michigan
+All Rights Reserved
+
+
+M5 compiled Jul 21 2008 20:45:28
+M5 started Mon Jul 21 20:48:56 2008
+M5 executing on zizzer
+M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881
+M5 commit date Tue Jul 15 14:38:51 2008 -0400
+command line: build/X86_SE/m5.fast -d build/X86_SE/tests/fast/long/00.gzip/x86/linux/simple-atomic tests/run.py long/00.gzip/x86/linux/simple-atomic
+Global frequency set at 1000000000000 ticks per second
 spec_init
 Loading Input Data
 Duplicating 262144 bytes
@@ -29,16 +43,4 @@ Uncompressing Data
 Uncompressed data 1048576 bytes in length
 Uncompressed data compared correctly
 Tested 1MB buffer: OK!
-M5 Simulator System
-
-Copyright (c) 2001-2008
-The Regents of The University of Michigan
-All Rights Reserved
-
-
-M5 compiled May 17 2008 13:48:04
-M5 started Sat May 17 13:48:05 2008
-M5 executing on tater
-command line: build/X86_SE/m5.fast -d build/X86_SE/tests/fast/long/00.gzip/x86/linux/simple-atomic tests/run.py long/00.gzip/x86/linux/simple-atomic
-Global frequency set at 1000000000000 ticks per second
 Exiting @ tick 955075963000 because target called exit()

diff --git a/tests/long/10.mcf/ref/sparc/linux/simple-atomic/config.ini b/tests/long/10.mcf/ref/sparc/linux/simple-atomic/config.ini
index ef3141a334efadb8dce52938bb92946137667548..5c55bdb1c9a1489481e98f23f41620fc94e55b2e 100644 (file)
--- a/tests/long/10.mcf/ref/sparc/linux/simple-atomic/config.ini
+++ b/tests/long/10.mcf/ref/sparc/linux/simple-atomic/config.ini
@@ -25,7 +25,8 @@ max_loads_all_threads=0
 max_loads_any_thread=0
 phase=0
 progress_interval=0
-simulate_stalls=false
+simulate_data_stalls=false
+simulate_inst_stalls=false
 system=system
 tracer=system.cpu.tracer
 width=1
@@ -58,6 +59,7 @@ max_stack_size=67108864
 output=cout
 pid=100
 ppid=99
+simpoint=55300000000
 system=system
 uid=100
 
@@ -66,6 +68,7 @@ type=Bus
 block_size=64
 bus_id=0
 clock=1000
+header_cycles=1
 responder_set=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
@@ -74,6 +77,8 @@ port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 type=PhysicalMemory
 file=
 latency=1
+latency_var=0
+null=false
 range=0:268435455
 zero=false
 port=system.membus.port[0]

diff --git a/tests/long/10.mcf/ref/sparc/linux/simple-atomic/stdout b/tests/long/10.mcf/ref/sparc/linux/simple-atomic/stdout
index eb0a0f1961457e3ddad2225db1701e816fad934c..8fdd567399a01d3027a4e8b8119c4eca03844f39 100644 (file)
--- a/tests/long/10.mcf/ref/sparc/linux/simple-atomic/stdout
+++ b/tests/long/10.mcf/ref/sparc/linux/simple-atomic/stdout
@@ -1,3 +1,17 @@
+M5 Simulator System
+
+Copyright (c) 2001-2008
+The Regents of The University of Michigan
+All Rights Reserved
+
+
+M5 compiled Jul 21 2008 20:33:06
+M5 started Mon Jul 21 20:36:22 2008
+M5 executing on zizzer
+M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881
+M5 commit date Tue Jul 15 14:38:51 2008 -0400
+command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/long/10.mcf/sparc/linux/simple-atomic tests/run.py long/10.mcf/sparc/linux/simple-atomic
+Global frequency set at 1000000000000 ticks per second
 
 MCF SPEC version 1.6.I
 by  Andreas Loebel
@@ -14,16 +28,4 @@ simplex iterations         : 2663
 flow value                 : 3080014995
 checksum                   : 68389
 optimal
-M5 Simulator System
-
-Copyright (c) 2001-2006
-The Regents of The University of Michigan
-All Rights Reserved
-
-
-M5 compiled Nov 28 2007 18:29:37
-M5 started Wed Nov 28 18:29:38 2007
-M5 executing on nacho
-command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/long/10.mcf/sparc/linux/simple-atomic tests/run.py long/10.mcf/sparc/linux/simple-atomic
-Global frequency set at 1000000000000 ticks per second
 Exiting @ tick 122212687000 because target called exit()

diff --git a/tests/long/10.mcf/ref/sparc/linux/simple-timing/config.ini b/tests/long/10.mcf/ref/sparc/linux/simple-timing/config.ini
index a0f77bf1037a936ce03d0def8d5a72669ce929e0..a9213133f16ce548283b474fb998832309cdd576 100644 (file)
--- a/tests/long/10.mcf/ref/sparc/linux/simple-timing/config.ini
+++ b/tests/long/10.mcf/ref/sparc/linux/simple-timing/config.ini
@@ -174,6 +174,7 @@ max_stack_size=67108864
 output=cout
 pid=100
 ppid=99
+simpoint=55300000000
 system=system
 uid=100
 
@@ -191,6 +192,8 @@ port=system.physmem.port[0] system.cpu.l2cache.mem_side
 type=PhysicalMemory
 file=
 latency=1
+latency_var=0
+null=false
 range=0:268435455
 zero=false
 port=system.membus.port[0]

diff --git a/tests/long/10.mcf/ref/sparc/linux/simple-timing/stdout b/tests/long/10.mcf/ref/sparc/linux/simple-timing/stdout
index 8270f923d87ace80bf4d229e42c49a7297f4f553..5fdb31dc09e66fc156d69d5c1db98f118432ffd6 100644 (file)
--- a/tests/long/10.mcf/ref/sparc/linux/simple-timing/stdout
+++ b/tests/long/10.mcf/ref/sparc/linux/simple-timing/stdout
@@ -1,3 +1,17 @@
+M5 Simulator System
+
+Copyright (c) 2001-2008
+The Regents of The University of Michigan
+All Rights Reserved
+
+
+M5 compiled Jul 21 2008 20:33:06
+M5 started Mon Jul 21 20:33:32 2008
+M5 executing on zizzer
+M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881
+M5 commit date Tue Jul 15 14:38:51 2008 -0400
+command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/long/10.mcf/sparc/linux/simple-timing tests/run.py long/10.mcf/sparc/linux/simple-timing
+Global frequency set at 1000000000000 ticks per second
 
 MCF SPEC version 1.6.I
 by  Andreas Loebel
@@ -14,16 +28,4 @@ simplex iterations         : 2663
 flow value                 : 3080014995
 checksum                   : 68389
 optimal
-M5 Simulator System
-
-Copyright (c) 2001-2008
-The Regents of The University of Michigan
-All Rights Reserved
-
-
-M5 compiled Feb 24 2008 13:27:50
-M5 started Mon Feb 25 16:16:46 2008
-M5 executing on tater
-command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/long/10.mcf/sparc/linux/simple-timing tests/run.py long/10.mcf/sparc/linux/simple-timing
-Global frequency set at 1000000000000 ticks per second
 Exiting @ tick 363652229000 because target called exit()

diff --git a/tests/long/10.mcf/ref/x86/linux/simple-atomic/config.ini b/tests/long/10.mcf/ref/x86/linux/simple-atomic/config.ini
index d878cb4247c8b64334483cbb1e460196eff178bc..4ca62bb34b1758070dcfdea897b28a2166d7184a 100644 (file)
--- a/tests/long/10.mcf/ref/x86/linux/simple-atomic/config.ini
+++ b/tests/long/10.mcf/ref/x86/linux/simple-atomic/config.ini
@@ -25,7 +25,8 @@ max_loads_all_threads=0
 max_loads_any_thread=0
 phase=0
 progress_interval=0
-simulate_stalls=false
+simulate_data_stalls=false
+simulate_inst_stalls=false
 system=system
 tracer=system.cpu.tracer
 width=1
@@ -77,6 +78,7 @@ type=PhysicalMemory
 file=
 latency=1
 latency_var=0
+null=false
 range=0:268435455
 zero=false
 port=system.membus.port[0]

diff --git a/tests/long/10.mcf/ref/x86/linux/simple-atomic/stdout b/tests/long/10.mcf/ref/x86/linux/simple-atomic/stdout
index e519e0a5b2ece8767434a3addba590eedf411d02..996ca24f11a4f4e3e8c871427d51888b22ef00a9 100644 (file)
--- a/tests/long/10.mcf/ref/x86/linux/simple-atomic/stdout
+++ b/tests/long/10.mcf/ref/x86/linux/simple-atomic/stdout
@@ -1,3 +1,17 @@
+M5 Simulator System
+
+Copyright (c) 2001-2008
+The Regents of The University of Michigan
+All Rights Reserved
+
+
+M5 compiled Jul 21 2008 20:45:28
+M5 started Mon Jul 21 20:45:29 2008
+M5 executing on zizzer
+M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881
+M5 commit date Tue Jul 15 14:38:51 2008 -0400
+command line: build/X86_SE/m5.fast -d build/X86_SE/tests/fast/long/10.mcf/x86/linux/simple-atomic tests/run.py long/10.mcf/x86/linux/simple-atomic
+Global frequency set at 1000000000000 ticks per second
 
 MCF SPEC version 1.6.I
 by  Andreas Loebel
@@ -14,16 +28,4 @@ simplex iterations         : 2663
 flow value                 : 3080014995
 checksum                   : 68389
 optimal
-M5 Simulator System
-
-Copyright (c) 2001-2008
-The Regents of The University of Michigan
-All Rights Reserved
-
-
-M5 compiled May 17 2008 13:48:04
-M5 started Sat May 17 13:48:05 2008
-M5 executing on tater
-command line: build/X86_SE/m5.fast -d build/X86_SE/tests/fast/long/10.mcf/x86/linux/simple-atomic tests/run.py long/10.mcf/x86/linux/simple-atomic
-Global frequency set at 1000000000000 ticks per second
 Exiting @ tick 165703651500 because target called exit()

diff --git a/tests/long/20.parser/ref/x86/linux/simple-atomic/config.ini b/tests/long/20.parser/ref/x86/linux/simple-atomic/config.ini
index af0a9ce637f68195b5dc848041b121d3e7044f44..0b6f15f388531d2dbe0bb603851e3a3d1a37f6f1 100644 (file)
--- a/tests/long/20.parser/ref/x86/linux/simple-atomic/config.ini
+++ b/tests/long/20.parser/ref/x86/linux/simple-atomic/config.ini
@@ -25,7 +25,8 @@ max_loads_all_threads=0
 max_loads_any_thread=0
 phase=0
 progress_interval=0
-simulate_stalls=false
+simulate_data_stalls=false
+simulate_inst_stalls=false
 system=system
 tracer=system.cpu.tracer
 width=1
@@ -77,6 +78,7 @@ type=PhysicalMemory
 file=
 latency=1
 latency_var=0
+null=false
 range=0:134217727
 zero=false
 port=system.membus.port[0]

diff --git a/tests/long/20.parser/ref/x86/linux/simple-atomic/stdout b/tests/long/20.parser/ref/x86/linux/simple-atomic/stdout
index b105051a95c1a9a18cb65767320b8b4465b1d37d..2ab0ba3a263d200fc3446560313bb57221b23bc6 100644 (file)
--- a/tests/long/20.parser/ref/x86/linux/simple-atomic/stdout
+++ b/tests/long/20.parser/ref/x86/linux/simple-atomic/stdout
@@ -1,3 +1,17 @@
+M5 Simulator System
+
+Copyright (c) 2001-2008
+The Regents of The University of Michigan
+All Rights Reserved
+
+
+M5 compiled Jul 21 2008 20:45:28
+M5 started Mon Jul 21 20:45:29 2008
+M5 executing on zizzer
+M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881
+M5 commit date Tue Jul 15 14:38:51 2008 -0400
+command line: build/X86_SE/m5.fast -d build/X86_SE/tests/fast/long/20.parser/x86/linux/simple-atomic tests/run.py long/20.parser/x86/linux/simple-atomic
+Global frequency set at 1000000000000 ticks per second
 
  Reading the dictionary files: *************************************************
  58924 words stored in 3784810 bytes
@@ -57,16 +71,4 @@ Echoing of input sentence turned on.
   about 2 million people attended 
   the five best costumes got prizes 
 No errors!
-M5 Simulator System
-
-Copyright (c) 2001-2008
-The Regents of The University of Michigan
-All Rights Reserved
-
-
-M5 compiled May 17 2008 13:48:04
-M5 started Sat May 17 13:48:05 2008
-M5 executing on tater
-command line: build/X86_SE/m5.fast -d build/X86_SE/tests/fast/long/20.parser/x86/linux/simple-atomic tests/run.py long/20.parser/x86/linux/simple-atomic
-Global frequency set at 1000000000000 ticks per second
-Exiting @ tick 863350524000 because target called exit()
+Exiting @ tick 863350526500 because target called exit()

diff --git a/tests/long/30.eon/ref/alpha/tru64/o3-timing/config.ini b/tests/long/30.eon/ref/alpha/tru64/o3-timing/config.ini
index 56c9263b33f9cfb49ab87df38eeed95097f78185..bcc5363011a557824cb99e52586871ee0960ad54 100644 (file)
--- a/tests/long/30.eon/ref/alpha/tru64/o3-timing/config.ini
+++ b/tests/long/30.eon/ref/alpha/tru64/o3-timing/config.ini
@@ -394,6 +394,8 @@ port=system.physmem.port[0] system.cpu.l2cache.mem_side
 type=PhysicalMemory
 file=
 latency=1
+latency_var=0
+null=false
 range=0:134217727
 zero=false
 port=system.membus.port[0]

diff --git a/tests/long/30.eon/ref/alpha/tru64/o3-timing/stdout b/tests/long/30.eon/ref/alpha/tru64/o3-timing/stdout
index 50ed34325896b2e3f22eb366ef543c071f081b83..53e92e76c41f10e93bbabbfc913a00ea094ed766 100644 (file)
--- a/tests/long/30.eon/ref/alpha/tru64/o3-timing/stdout
+++ b/tests/long/30.eon/ref/alpha/tru64/o3-timing/stdout
@@ -1,2 +1,16 @@
+M5 Simulator System
+
+Copyright (c) 2001-2008
+The Regents of The University of Michigan
+All Rights Reserved
+
+
+M5 compiled Jul 21 2008 20:12:56
+M5 started Mon Jul 21 20:12:58 2008
+M5 executing on zizzer
+M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881
+M5 commit date Tue Jul 15 14:38:51 2008 -0400
+command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/long/30.eon/alpha/tru64/o3-timing tests/run.py long/30.eon/alpha/tru64/o3-timing
+Global frequency set at 1000000000000 ticks per second
 Eon, Version 1.1
 OO-style eon Time= 0.133333

diff --git a/tests/long/30.eon/ref/alpha/tru64/simple-atomic/config.ini b/tests/long/30.eon/ref/alpha/tru64/simple-atomic/config.ini
index bfc3d0e40af6d4dacd2871acdd2e72d335bb50f9..f1d9f437d8d5cb5a329751a9469e0fb609176bf2 100644 (file)
--- a/tests/long/30.eon/ref/alpha/tru64/simple-atomic/config.ini
+++ b/tests/long/30.eon/ref/alpha/tru64/simple-atomic/config.ini
@@ -25,7 +25,8 @@ max_loads_all_threads=0
 max_loads_any_thread=0
 phase=0
 progress_interval=0
-simulate_stalls=false
+simulate_data_stalls=false
+simulate_inst_stalls=false
 system=system
 tracer=system.cpu.tracer
 width=1
@@ -54,9 +55,11 @@ euid=100
 executable=/dist/m5/cpu2000/binaries/alpha/tru64/eon
 gid=100
 input=cin
+max_stack_size=67108864
 output=cout
 pid=100
 ppid=99
+simpoint=0
 system=system
 uid=100
 
@@ -65,6 +68,7 @@ type=Bus
 block_size=64
 bus_id=0
 clock=1000
+header_cycles=1
 responder_set=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
@@ -73,6 +77,8 @@ port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 type=PhysicalMemory
 file=
 latency=1
+latency_var=0
+null=false
 range=0:134217727
 zero=false
 port=system.membus.port[0]

diff --git a/tests/long/30.eon/ref/alpha/tru64/simple-atomic/stdout b/tests/long/30.eon/ref/alpha/tru64/simple-atomic/stdout
index 5f057b8dd242be25eabc8c1817609338953dc05d..285c8d75026315773aac1a45a389a51a478e54fe 100644 (file)
--- a/tests/long/30.eon/ref/alpha/tru64/simple-atomic/stdout
+++ b/tests/long/30.eon/ref/alpha/tru64/simple-atomic/stdout
@@ -1,2 +1,16 @@
+M5 Simulator System
+
+Copyright (c) 2001-2008
+The Regents of The University of Michigan
+All Rights Reserved
+
+
+M5 compiled Jul 21 2008 20:12:56
+M5 started Mon Jul 21 20:13:02 2008
+M5 executing on zizzer
+M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881
+M5 commit date Tue Jul 15 14:38:51 2008 -0400
+command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/long/30.eon/alpha/tru64/simple-atomic tests/run.py long/30.eon/alpha/tru64/simple-atomic
+Global frequency set at 1000000000000 ticks per second
 Eon, Version 1.1
 OO-style eon Time= 0.183333

diff --git a/tests/long/30.eon/ref/alpha/tru64/simple-timing/config.ini b/tests/long/30.eon/ref/alpha/tru64/simple-timing/config.ini
index 6912167e002ea76b7e795a601ba4a442d023ebd5..4e4683ed673850a537a351d25565db5e6fd2c38c 100644 (file)
--- a/tests/long/30.eon/ref/alpha/tru64/simple-timing/config.ini
+++ b/tests/long/30.eon/ref/alpha/tru64/simple-timing/config.ini
@@ -174,6 +174,7 @@ max_stack_size=67108864
 output=cout
 pid=100
 ppid=99
+simpoint=0
 system=system
 uid=100
 
@@ -191,6 +192,8 @@ port=system.physmem.port[0] system.cpu.l2cache.mem_side
 type=PhysicalMemory
 file=
 latency=1
+latency_var=0
+null=false
 range=0:134217727
 zero=false
 port=system.membus.port[0]

diff --git a/tests/long/30.eon/ref/alpha/tru64/simple-timing/stdout b/tests/long/30.eon/ref/alpha/tru64/simple-timing/stdout
index f9d4975068660191b266c508dff2fc43fe256a2f..9f21edbf01e64f78fe8c137907baf877d0b2070b 100644 (file)
--- a/tests/long/30.eon/ref/alpha/tru64/simple-timing/stdout
+++ b/tests/long/30.eon/ref/alpha/tru64/simple-timing/stdout
@@ -1,2 +1,16 @@
+M5 Simulator System
+
+Copyright (c) 2001-2008
+The Regents of The University of Michigan
+All Rights Reserved
+
+
+M5 compiled Jul 21 2008 20:12:56
+M5 started Mon Jul 21 20:13:28 2008
+M5 executing on zizzer
+M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881
+M5 commit date Tue Jul 15 14:38:51 2008 -0400
+command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/long/30.eon/alpha/tru64/simple-timing tests/run.py long/30.eon/alpha/tru64/simple-timing
+Global frequency set at 1000000000000 ticks per second
 Eon, Version 1.1
 OO-style eon Time= 0.566667

diff --git a/tests/long/40.perlbmk/ref/alpha/tru64/simple-atomic/config.ini b/tests/long/40.perlbmk/ref/alpha/tru64/simple-atomic/config.ini
index 9054cf093c631d0aa329639c6f550183153a5b6e..68b00e416e96f3ce2db798846fc103c24ae76dfc 100644 (file)
--- a/tests/long/40.perlbmk/ref/alpha/tru64/simple-atomic/config.ini
+++ b/tests/long/40.perlbmk/ref/alpha/tru64/simple-atomic/config.ini
@@ -25,7 +25,8 @@ max_loads_all_threads=0
 max_loads_any_thread=0
 phase=0
 progress_interval=0
-simulate_stalls=false
+simulate_data_stalls=false
+simulate_inst_stalls=false
 system=system
 tracer=system.cpu.tracer
 width=1
@@ -54,9 +55,11 @@ euid=100
 executable=/dist/m5/cpu2000/binaries/alpha/tru64/perlbmk
 gid=100
 input=cin
+max_stack_size=67108864
 output=cout
 pid=100
 ppid=99
+simpoint=0
 system=system
 uid=100
 
@@ -65,6 +68,7 @@ type=Bus
 block_size=64
 bus_id=0
 clock=1000
+header_cycles=1
 responder_set=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
@@ -73,6 +77,8 @@ port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 type=PhysicalMemory
 file=
 latency=1
+latency_var=0
+null=false
 range=0:134217727
 zero=false
 port=system.membus.port[0]

diff --git a/tests/long/40.perlbmk/ref/alpha/tru64/simple-atomic/stdout b/tests/long/40.perlbmk/ref/alpha/tru64/simple-atomic/stdout
index d4a078b85e876aa6df491db66daa0bd050575b38..e78146575a1c13284088ebe02fe4c672a8e8f169 100644 (file)
--- a/tests/long/40.perlbmk/ref/alpha/tru64/simple-atomic/stdout
+++ b/tests/long/40.perlbmk/ref/alpha/tru64/simple-atomic/stdout
@@ -1,3 +1,17 @@
+M5 Simulator System
+
+Copyright (c) 2001-2008
+The Regents of The University of Michigan
+All Rights Reserved
+
+
+M5 compiled Jul 21 2008 20:12:56
+M5 started Mon Jul 21 20:12:58 2008
+M5 executing on zizzer
+M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881
+M5 commit date Tue Jul 15 14:38:51 2008 -0400
+command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/long/40.perlbmk/alpha/tru64/simple-atomic tests/run.py long/40.perlbmk/alpha/tru64/simple-atomic
+Global frequency set at 1000000000000 ticks per second
 1375000: 2038431008
 1374000: 3487365506
 1373000: 4184770123

diff --git a/tests/long/40.perlbmk/ref/alpha/tru64/simple-timing/config.ini b/tests/long/40.perlbmk/ref/alpha/tru64/simple-timing/config.ini
index 7985d086998960c05f80170a6ecf831e69810dcf..3606039437b03ee9030a951525cb332a429856a4 100644 (file)
--- a/tests/long/40.perlbmk/ref/alpha/tru64/simple-timing/config.ini
+++ b/tests/long/40.perlbmk/ref/alpha/tru64/simple-timing/config.ini
@@ -174,6 +174,7 @@ max_stack_size=67108864
 output=cout
 pid=100
 ppid=99
+simpoint=0
 system=system
 uid=100
 
@@ -191,6 +192,8 @@ port=system.physmem.port[0] system.cpu.l2cache.mem_side
 type=PhysicalMemory
 file=
 latency=1
+latency_var=0
+null=false
 range=0:134217727
 zero=false
 port=system.membus.port[0]

diff --git a/tests/long/40.perlbmk/ref/alpha/tru64/simple-timing/stdout b/tests/long/40.perlbmk/ref/alpha/tru64/simple-timing/stdout
index d4a078b85e876aa6df491db66daa0bd050575b38..722e49f95944c96ee456481d70d009f988fedf7b 100644 (file)
--- a/tests/long/40.perlbmk/ref/alpha/tru64/simple-timing/stdout
+++ b/tests/long/40.perlbmk/ref/alpha/tru64/simple-timing/stdout
@@ -1,3 +1,17 @@
+M5 Simulator System
+
+Copyright (c) 2001-2008
+The Regents of The University of Michigan
+All Rights Reserved
+
+
+M5 compiled Jul 21 2008 20:12:56
+M5 started Mon Jul 21 20:13:00 2008
+M5 executing on zizzer
+M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881
+M5 commit date Tue Jul 15 14:38:51 2008 -0400
+command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/long/40.perlbmk/alpha/tru64/simple-timing tests/run.py long/40.perlbmk/alpha/tru64/simple-timing
+Global frequency set at 1000000000000 ticks per second
 1375000: 2038431008
 1374000: 3487365506
 1373000: 4184770123

diff --git a/tests/long/50.vortex/ref/alpha/tru64/o3-timing/config.ini b/tests/long/50.vortex/ref/alpha/tru64/o3-timing/config.ini
index 78b7f1eec52a2c88efd40923fd665438c2d656d2..162b46290c664cbbb18bdf8bffc28ae01b47a999 100644 (file)
--- a/tests/long/50.vortex/ref/alpha/tru64/o3-timing/config.ini
+++ b/tests/long/50.vortex/ref/alpha/tru64/o3-timing/config.ini
@@ -394,6 +394,8 @@ port=system.physmem.port[0] system.cpu.l2cache.mem_side
 type=PhysicalMemory
 file=
 latency=1
+latency_var=0
+null=false
 range=0:134217727
 zero=false
 port=system.membus.port[0]

diff --git a/tests/long/50.vortex/ref/alpha/tru64/o3-timing/stdout b/tests/long/50.vortex/ref/alpha/tru64/o3-timing/stdout
index e69de29bb2d1d6434b8b29ae775ad8c2e48c5391..f03ee0333cc27b1fe8e0820b599ed953697c0276 100644 (file)
--- a/tests/long/50.vortex/ref/alpha/tru64/o3-timing/stdout
+++ b/tests/long/50.vortex/ref/alpha/tru64/o3-timing/stdout
@@ -0,0 +1,14 @@
+M5 Simulator System
+
+Copyright (c) 2001-2008
+The Regents of The University of Michigan
+All Rights Reserved
+
+
+M5 compiled Jul 21 2008 20:12:56
+M5 started Mon Jul 21 20:19:28 2008
+M5 executing on zizzer
+M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881
+M5 commit date Tue Jul 15 14:38:51 2008 -0400
+command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/long/50.vortex/alpha/tru64/o3-timing tests/run.py long/50.vortex/alpha/tru64/o3-timing
+Global frequency set at 1000000000000 ticks per second

diff --git a/tests/long/50.vortex/ref/alpha/tru64/simple-atomic/config.ini b/tests/long/50.vortex/ref/alpha/tru64/simple-atomic/config.ini
index 4745ee94c4891ebf237ca78c0ded98ecdefef8b7..337e5e36610063fd99e6cbe7a781f704fc546a3e 100644 (file)
--- a/tests/long/50.vortex/ref/alpha/tru64/simple-atomic/config.ini
+++ b/tests/long/50.vortex/ref/alpha/tru64/simple-atomic/config.ini
@@ -25,7 +25,8 @@ max_loads_all_threads=0
 max_loads_any_thread=0
 phase=0
 progress_interval=0
-simulate_stalls=false
+simulate_data_stalls=false
+simulate_inst_stalls=false
 system=system
 tracer=system.cpu.tracer
 width=1
@@ -54,9 +55,11 @@ euid=100
 executable=/dist/m5/cpu2000/binaries/alpha/tru64/vortex
 gid=100
 input=cin
+max_stack_size=67108864
 output=cout
 pid=100
 ppid=99
+simpoint=0
 system=system
 uid=100
 
@@ -65,6 +68,7 @@ type=Bus
 block_size=64
 bus_id=0
 clock=1000
+header_cycles=1
 responder_set=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
@@ -73,6 +77,8 @@ port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 type=PhysicalMemory
 file=
 latency=1
+latency_var=0
+null=false
 range=0:134217727
 zero=false
 port=system.membus.port[0]

diff --git a/tests/long/50.vortex/ref/alpha/tru64/simple-atomic/stdout b/tests/long/50.vortex/ref/alpha/tru64/simple-atomic/stdout
index e69de29bb2d1d6434b8b29ae775ad8c2e48c5391..f99b33e5facb37a9c13dc64584bac94e22ca512b 100644 (file)
--- a/tests/long/50.vortex/ref/alpha/tru64/simple-atomic/stdout
+++ b/tests/long/50.vortex/ref/alpha/tru64/simple-atomic/stdout
@@ -0,0 +1,14 @@
+M5 Simulator System
+
+Copyright (c) 2001-2008
+The Regents of The University of Michigan
+All Rights Reserved
+
+
+M5 compiled Jul 21 2008 20:12:56
+M5 started Mon Jul 21 20:14:04 2008
+M5 executing on zizzer
+M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881
+M5 commit date Tue Jul 15 14:38:51 2008 -0400
+command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/long/50.vortex/alpha/tru64/simple-atomic tests/run.py long/50.vortex/alpha/tru64/simple-atomic
+Global frequency set at 1000000000000 ticks per second

diff --git a/tests/long/50.vortex/ref/alpha/tru64/simple-timing/config.ini b/tests/long/50.vortex/ref/alpha/tru64/simple-timing/config.ini
index 2aab198c9cafe2e6a38b43d7f1e994e0cb5b3a1a..99587aea2d1dffb53cde4640ce9e373824256894 100644 (file)
--- a/tests/long/50.vortex/ref/alpha/tru64/simple-timing/config.ini
+++ b/tests/long/50.vortex/ref/alpha/tru64/simple-timing/config.ini
@@ -174,6 +174,7 @@ max_stack_size=67108864
 output=cout
 pid=100
 ppid=99
+simpoint=0
 system=system
 uid=100
 
@@ -191,6 +192,8 @@ port=system.physmem.port[0] system.cpu.l2cache.mem_side
 type=PhysicalMemory
 file=
 latency=1
+latency_var=0
+null=false
 range=0:134217727
 zero=false
 port=system.membus.port[0]

diff --git a/tests/long/50.vortex/ref/alpha/tru64/simple-timing/stdout b/tests/long/50.vortex/ref/alpha/tru64/simple-timing/stdout
index e69de29bb2d1d6434b8b29ae775ad8c2e48c5391..c568a72c2d859c91c8e1f93f92fbe42443704123 100644 (file)
--- a/tests/long/50.vortex/ref/alpha/tru64/simple-timing/stdout
+++ b/tests/long/50.vortex/ref/alpha/tru64/simple-timing/stdout
@@ -0,0 +1,14 @@
+M5 Simulator System
+
+Copyright (c) 2001-2008
+The Regents of The University of Michigan
+All Rights Reserved
+
+
+M5 compiled Jul 21 2008 20:12:56
+M5 started Mon Jul 21 20:13:07 2008
+M5 executing on zizzer
+M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881
+M5 commit date Tue Jul 15 14:38:51 2008 -0400
+command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/long/50.vortex/alpha/tru64/simple-timing tests/run.py long/50.vortex/alpha/tru64/simple-timing
+Global frequency set at 1000000000000 ticks per second

diff --git a/tests/long/50.vortex/ref/sparc/linux/simple-atomic/config.ini b/tests/long/50.vortex/ref/sparc/linux/simple-atomic/config.ini
index 973d6211ff58169a2446ba8b1e5237bf99f0b39f..b8eed166b2b461238e9f520ba733bb91b3e5dfbb 100644 (file)
--- a/tests/long/50.vortex/ref/sparc/linux/simple-atomic/config.ini
+++ b/tests/long/50.vortex/ref/sparc/linux/simple-atomic/config.ini
@@ -25,7 +25,8 @@ max_loads_all_threads=0
 max_loads_any_thread=0
 phase=0
 progress_interval=0
-simulate_stalls=false
+simulate_data_stalls=false
+simulate_inst_stalls=false
 system=system
 tracer=system.cpu.tracer
 width=1
@@ -58,6 +59,7 @@ max_stack_size=67108864
 output=cout
 pid=100
 ppid=99
+simpoint=0
 system=system
 uid=100
 
@@ -66,6 +68,7 @@ type=Bus
 block_size=64
 bus_id=0
 clock=1000
+header_cycles=1
 responder_set=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
@@ -74,6 +77,8 @@ port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 type=PhysicalMemory
 file=
 latency=1
+latency_var=0
+null=false
 range=0:134217727
 zero=false
 port=system.membus.port[0]

diff --git a/tests/long/50.vortex/ref/sparc/linux/simple-atomic/stdout b/tests/long/50.vortex/ref/sparc/linux/simple-atomic/stdout
index 0a780ccee6e61f5dc34853fb1fa0e1e1449d2e46..b230e2c8322de20d3b89528fca6b5ec310889672 100644 (file)
--- a/tests/long/50.vortex/ref/sparc/linux/simple-atomic/stdout
+++ b/tests/long/50.vortex/ref/sparc/linux/simple-atomic/stdout
@@ -1,13 +1,15 @@
 M5 Simulator System
 
-Copyright (c) 2001-2006
+Copyright (c) 2001-2008
 The Regents of The University of Michigan
 All Rights Reserved
 
 
-M5 compiled Nov 28 2007 18:29:37
-M5 started Wed Nov 28 18:29:38 2007
-M5 executing on nacho
+M5 compiled Jul 21 2008 20:33:06
+M5 started Mon Jul 21 20:38:08 2008
+M5 executing on zizzer
+M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881
+M5 commit date Tue Jul 15 14:38:51 2008 -0400
 command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/long/50.vortex/sparc/linux/simple-atomic tests/run.py long/50.vortex/sparc/linux/simple-atomic
 Global frequency set at 1000000000000 ticks per second
 Exiting @ tick 68148678500 because target called exit()

diff --git a/tests/long/50.vortex/ref/sparc/linux/simple-timing/config.ini b/tests/long/50.vortex/ref/sparc/linux/simple-timing/config.ini
index 01fab79ce935e45bc08a122ab8c7a8bdc1d204d8..77a49bdbd591f24ba24fad1f881b8f21d31b7366 100644 (file)
--- a/tests/long/50.vortex/ref/sparc/linux/simple-timing/config.ini
+++ b/tests/long/50.vortex/ref/sparc/linux/simple-timing/config.ini
@@ -174,6 +174,7 @@ max_stack_size=67108864
 output=cout
 pid=100
 ppid=99
+simpoint=0
 system=system
 uid=100
 
@@ -191,6 +192,8 @@ port=system.physmem.port[0] system.cpu.l2cache.mem_side
 type=PhysicalMemory
 file=
 latency=1
+latency_var=0
+null=false
 range=0:134217727
 zero=false
 port=system.membus.port[0]

diff --git a/tests/long/50.vortex/ref/sparc/linux/simple-timing/stdout b/tests/long/50.vortex/ref/sparc/linux/simple-timing/stdout
index 5b4fb94a9137cafba4a1912b21174099ab1aeb19..592b35b7a9bf5bd6ac9d709ac800e9d9893f3e79 100644 (file)
--- a/tests/long/50.vortex/ref/sparc/linux/simple-timing/stdout
+++ b/tests/long/50.vortex/ref/sparc/linux/simple-timing/stdout
@@ -5,9 +5,11 @@ The Regents of The University of Michigan
 All Rights Reserved
 
 
-M5 compiled Feb 24 2008 13:27:50
-M5 started Mon Feb 25 16:16:46 2008
-M5 executing on tater
+M5 compiled Jul 21 2008 20:33:06
+M5 started Mon Jul 21 20:36:59 2008
+M5 executing on zizzer
+M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881
+M5 commit date Tue Jul 15 14:38:51 2008 -0400
 command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/long/50.vortex/sparc/linux/simple-timing tests/run.py long/50.vortex/sparc/linux/simple-timing
 Global frequency set at 1000000000000 ticks per second
 Exiting @ tick 200790381000 because target called exit()

diff --git a/tests/long/60.bzip2/ref/alpha/tru64/o3-timing/config.ini b/tests/long/60.bzip2/ref/alpha/tru64/o3-timing/config.ini
index abff97de4f49c3d91a901317a1137dd493a07541..be4327e6cba6b108a558ac5c18e75ec35cebbff8 100644 (file)
--- a/tests/long/60.bzip2/ref/alpha/tru64/o3-timing/config.ini
+++ b/tests/long/60.bzip2/ref/alpha/tru64/o3-timing/config.ini
@@ -394,6 +394,8 @@ port=system.physmem.port[0] system.cpu.l2cache.mem_side
 type=PhysicalMemory
 file=
 latency=1
+latency_var=0
+null=false
 range=0:134217727
 zero=false
 port=system.membus.port[0]

diff --git a/tests/long/60.bzip2/ref/alpha/tru64/o3-timing/stdout b/tests/long/60.bzip2/ref/alpha/tru64/o3-timing/stdout
index 0c5c00118f0f95507f24e1b0d418fa1d9ca0cd9d..da44e86434f8f5fa49c59c4ee993a498ae94c45f 100644 (file)
--- a/tests/long/60.bzip2/ref/alpha/tru64/o3-timing/stdout
+++ b/tests/long/60.bzip2/ref/alpha/tru64/o3-timing/stdout
@@ -1,3 +1,17 @@
+M5 Simulator System
+
+Copyright (c) 2001-2008
+The Regents of The University of Michigan
+All Rights Reserved
+
+
+M5 compiled Jul 21 2008 20:12:56
+M5 started Mon Jul 21 20:17:14 2008
+M5 executing on zizzer
+M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881
+M5 commit date Tue Jul 15 14:38:51 2008 -0400
+command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/long/60.bzip2/alpha/tru64/o3-timing tests/run.py long/60.bzip2/alpha/tru64/o3-timing
+Global frequency set at 1000000000000 ticks per second
 spec_init
 Loading Input Data
 Input data 1048576 bytes in length

diff --git a/tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/config.ini b/tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/config.ini
index 378e34da6fa3bc456f623dba19f44034a7ce95c7..0768661a6be118233343357399f258350bbabe57 100644 (file)
--- a/tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/config.ini
+++ b/tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/config.ini
@@ -25,7 +25,8 @@ max_loads_all_threads=0
 max_loads_any_thread=0
 phase=0
 progress_interval=0
-simulate_stalls=false
+simulate_data_stalls=false
+simulate_inst_stalls=false
 system=system
 tracer=system.cpu.tracer
 width=1
@@ -54,9 +55,11 @@ euid=100
 executable=/dist/m5/cpu2000/binaries/alpha/tru64/bzip2
 gid=100
 input=cin
+max_stack_size=67108864
 output=cout
 pid=100
 ppid=99
+simpoint=0
 system=system
 uid=100
 
@@ -65,6 +68,7 @@ type=Bus
 block_size=64
 bus_id=0
 clock=1000
+header_cycles=1
 responder_set=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
@@ -73,6 +77,8 @@ port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 type=PhysicalMemory
 file=
 latency=1
+latency_var=0
+null=false
 range=0:134217727
 zero=false
 port=system.membus.port[0]

diff --git a/tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/stdout b/tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/stdout
index 0c5c00118f0f95507f24e1b0d418fa1d9ca0cd9d..469f3b36a54face4ebe2038ed4b7384863006eb6 100644 (file)
--- a/tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/stdout
+++ b/tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/stdout
@@ -1,3 +1,17 @@
+M5 Simulator System
+
+Copyright (c) 2001-2008
+The Regents of The University of Michigan
+All Rights Reserved
+
+
+M5 compiled Jul 21 2008 20:12:56
+M5 started Mon Jul 21 20:16:25 2008
+M5 executing on zizzer
+M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881
+M5 commit date Tue Jul 15 14:38:51 2008 -0400
+command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/long/60.bzip2/alpha/tru64/simple-atomic tests/run.py long/60.bzip2/alpha/tru64/simple-atomic
+Global frequency set at 1000000000000 ticks per second
 spec_init
 Loading Input Data
 Input data 1048576 bytes in length

diff --git a/tests/long/60.bzip2/ref/alpha/tru64/simple-timing/config.ini b/tests/long/60.bzip2/ref/alpha/tru64/simple-timing/config.ini
index 6adec3b74e20cd3700f13dabdd7f68b5794e184f..48686792e01f5003c3db32f0d1cf91d5eff485b7 100644 (file)
--- a/tests/long/60.bzip2/ref/alpha/tru64/simple-timing/config.ini
+++ b/tests/long/60.bzip2/ref/alpha/tru64/simple-timing/config.ini
@@ -174,6 +174,7 @@ max_stack_size=67108864
 output=cout
 pid=100
 ppid=99
+simpoint=0
 system=system
 uid=100
 
@@ -191,6 +192,8 @@ port=system.physmem.port[0] system.cpu.l2cache.mem_side
 type=PhysicalMemory
 file=
 latency=1
+latency_var=0
+null=false
 range=0:134217727
 zero=false
 port=system.membus.port[0]

diff --git a/tests/long/60.bzip2/ref/alpha/tru64/simple-timing/stdout b/tests/long/60.bzip2/ref/alpha/tru64/simple-timing/stdout
index 0c5c00118f0f95507f24e1b0d418fa1d9ca0cd9d..c0a8b63da017ae621012e6f5a7e00abbe631443c 100644 (file)
--- a/tests/long/60.bzip2/ref/alpha/tru64/simple-timing/stdout
+++ b/tests/long/60.bzip2/ref/alpha/tru64/simple-timing/stdout
@@ -1,3 +1,17 @@
+M5 Simulator System
+
+Copyright (c) 2001-2008
+The Regents of The University of Michigan
+All Rights Reserved
+
+
+M5 compiled Jul 21 2008 20:12:56
+M5 started Mon Jul 21 20:14:59 2008
+M5 executing on zizzer
+M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881
+M5 commit date Tue Jul 15 14:38:51 2008 -0400
+command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/long/60.bzip2/alpha/tru64/simple-timing tests/run.py long/60.bzip2/alpha/tru64/simple-timing
+Global frequency set at 1000000000000 ticks per second
 spec_init
 Loading Input Data
 Input data 1048576 bytes in length

diff --git a/tests/long/60.bzip2/ref/x86/linux/simple-atomic/config.ini b/tests/long/60.bzip2/ref/x86/linux/simple-atomic/config.ini
index d18301e7c5907d0172b97620969ec16102fc0e92..989908e23ecab4c64e215584c38696993fed90bd 100644 (file)
--- a/tests/long/60.bzip2/ref/x86/linux/simple-atomic/config.ini
+++ b/tests/long/60.bzip2/ref/x86/linux/simple-atomic/config.ini
@@ -25,7 +25,8 @@ max_loads_all_threads=0
 max_loads_any_thread=0
 phase=0
 progress_interval=0
-simulate_stalls=false
+simulate_data_stalls=false
+simulate_inst_stalls=false
 system=system
 tracer=system.cpu.tracer
 width=1
@@ -77,6 +78,7 @@ type=PhysicalMemory
 file=
 latency=1
 latency_var=0
+null=false
 range=0:134217727
 zero=false
 port=system.membus.port[0]

diff --git a/tests/long/60.bzip2/ref/x86/linux/simple-atomic/stdout b/tests/long/60.bzip2/ref/x86/linux/simple-atomic/stdout
index 01a87748466fa760bb80d6b244da7df4b5b034a7..17f5ab40f0064a9b528343e29b943d174cbc6fd7 100644 (file)
--- a/tests/long/60.bzip2/ref/x86/linux/simple-atomic/stdout
+++ b/tests/long/60.bzip2/ref/x86/linux/simple-atomic/stdout
@@ -1,3 +1,17 @@
+M5 Simulator System
+
+Copyright (c) 2001-2008
+The Regents of The University of Michigan
+All Rights Reserved
+
+
+M5 compiled Jul 21 2008 20:45:28
+M5 started Mon Jul 21 20:49:02 2008
+M5 executing on zizzer
+M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881
+M5 commit date Tue Jul 15 14:38:51 2008 -0400
+command line: build/X86_SE/m5.fast -d build/X86_SE/tests/fast/long/60.bzip2/x86/linux/simple-atomic tests/run.py long/60.bzip2/x86/linux/simple-atomic
+Global frequency set at 1000000000000 ticks per second
 spec_init
 Loading Input Data
 Input data 1048576 bytes in length
@@ -12,16 +26,4 @@ Uncompressing Data
 Uncompressed data 1048576 bytes in length
 Uncompressed data compared correctly
 Tested 1MB buffer: OK!
-M5 Simulator System
-
-Copyright (c) 2001-2008
-The Regents of The University of Michigan
-All Rights Reserved
-
-
-M5 compiled May 17 2008 13:48:04
-M5 started Sat May 17 13:48:05 2008
-M5 executing on tater
-command line: build/X86_SE/m5.fast -d build/X86_SE/tests/fast/long/60.bzip2/x86/linux/simple-atomic tests/run.py long/60.bzip2/x86/linux/simple-atomic
-Global frequency set at 1000000000000 ticks per second
 Exiting @ tick 2806437159500 because target called exit()

diff --git a/tests/long/70.twolf/ref/alpha/tru64/o3-timing/config.ini b/tests/long/70.twolf/ref/alpha/tru64/o3-timing/config.ini
index 945804e3d557dc650826f54c52f014a1e3b8b357..dbf63ca053a6fdf6266697a03752b8869e98d156 100644 (file)
--- a/tests/long/70.twolf/ref/alpha/tru64/o3-timing/config.ini
+++ b/tests/long/70.twolf/ref/alpha/tru64/o3-timing/config.ini
@@ -394,6 +394,8 @@ port=system.physmem.port[0] system.cpu.l2cache.mem_side
 type=PhysicalMemory
 file=
 latency=1
+latency_var=0
+null=false
 range=0:134217727
 zero=false
 port=system.membus.port[0]

diff --git a/tests/long/70.twolf/ref/alpha/tru64/o3-timing/stdout b/tests/long/70.twolf/ref/alpha/tru64/o3-timing/stdout
index f32f0a972aff5807c5708986d134b903fceacd24..20e9ee5061f8aae8b5b55ddd94a7b6d58291632a 100644 (file)
--- a/tests/long/70.twolf/ref/alpha/tru64/o3-timing/stdout
+++ b/tests/long/70.twolf/ref/alpha/tru64/o3-timing/stdout
@@ -1,3 +1,19 @@
+M5 Simulator System
+
+Copyright (c) 2001-2008
+The Regents of The University of Michigan
+All Rights Reserved
+
+
+M5 compiled Jul 21 2008 20:12:56
+M5 started Mon Jul 21 20:14:27 2008
+M5 executing on zizzer
+M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881
+M5 commit date Tue Jul 15 14:38:51 2008 -0400
+command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/long/70.twolf/alpha/tru64/o3-timing tests/run.py long/70.twolf/alpha/tru64/o3-timing
+Couldn't unlink  build/ALPHA_SE/tests/fast/long/70.twolf/alpha/tru64/o3-timing/smred.sav
+Couldn't unlink  build/ALPHA_SE/tests/fast/long/70.twolf/alpha/tru64/o3-timing/smred.sv2
+Global frequency set at 1000000000000 ticks per second
 
 TimberWolfSC version:v4.3a date:Mon Jan 25 18:50:36 EST 1988
 Standard Cell Placement and Global Routing Program

diff --git a/tests/long/70.twolf/ref/alpha/tru64/simple-atomic/config.ini b/tests/long/70.twolf/ref/alpha/tru64/simple-atomic/config.ini
index 8fbd6f60bfdd221012bc74f7e83693d111695ad4..f0ed922b1f80b03b406aff08cd04543aee1535ff 100644 (file)
--- a/tests/long/70.twolf/ref/alpha/tru64/simple-atomic/config.ini
+++ b/tests/long/70.twolf/ref/alpha/tru64/simple-atomic/config.ini
@@ -25,7 +25,8 @@ max_loads_all_threads=0
 max_loads_any_thread=0
 phase=0
 progress_interval=0
-simulate_stalls=false
+simulate_data_stalls=false
+simulate_inst_stalls=false
 system=system
 tracer=system.cpu.tracer
 width=1
@@ -54,9 +55,11 @@ euid=100
 executable=/dist/m5/cpu2000/binaries/alpha/tru64/twolf
 gid=100
 input=cin
+max_stack_size=67108864
 output=cout
 pid=100
 ppid=99
+simpoint=0
 system=system
 uid=100
 
@@ -65,6 +68,7 @@ type=Bus
 block_size=64
 bus_id=0
 clock=1000
+header_cycles=1
 responder_set=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
@@ -73,6 +77,8 @@ port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 type=PhysicalMemory
 file=
 latency=1
+latency_var=0
+null=false
 range=0:134217727
 zero=false
 port=system.membus.port[0]

diff --git a/tests/long/70.twolf/ref/alpha/tru64/simple-atomic/stdout b/tests/long/70.twolf/ref/alpha/tru64/simple-atomic/stdout
index f32f0a972aff5807c5708986d134b903fceacd24..0fc73d0d956026eff8984b35667d2c2125cfa539 100644 (file)
--- a/tests/long/70.twolf/ref/alpha/tru64/simple-atomic/stdout
+++ b/tests/long/70.twolf/ref/alpha/tru64/simple-atomic/stdout
@@ -1,3 +1,19 @@
+M5 Simulator System
+
+Copyright (c) 2001-2008
+The Regents of The University of Michigan
+All Rights Reserved
+
+
+M5 compiled Jul 21 2008 20:12:56
+M5 started Mon Jul 21 20:12:59 2008
+M5 executing on zizzer
+M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881
+M5 commit date Tue Jul 15 14:38:51 2008 -0400
+command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/long/70.twolf/alpha/tru64/simple-atomic tests/run.py long/70.twolf/alpha/tru64/simple-atomic
+Couldn't unlink  build/ALPHA_SE/tests/fast/long/70.twolf/alpha/tru64/simple-atomic/smred.sav
+Couldn't unlink  build/ALPHA_SE/tests/fast/long/70.twolf/alpha/tru64/simple-atomic/smred.sv2
+Global frequency set at 1000000000000 ticks per second
 
 TimberWolfSC version:v4.3a date:Mon Jan 25 18:50:36 EST 1988
 Standard Cell Placement and Global Routing Program

diff --git a/tests/long/70.twolf/ref/alpha/tru64/simple-timing/config.ini b/tests/long/70.twolf/ref/alpha/tru64/simple-timing/config.ini
index fd50e16e09609756ac8325cd0d408cb26535ba6d..0190cf0fef046a74f8a1143bdb0f87d748b05f8c 100644 (file)
--- a/tests/long/70.twolf/ref/alpha/tru64/simple-timing/config.ini
+++ b/tests/long/70.twolf/ref/alpha/tru64/simple-timing/config.ini
@@ -174,6 +174,7 @@ max_stack_size=67108864
 output=cout
 pid=100
 ppid=99
+simpoint=0
 system=system
 uid=100
 
@@ -191,6 +192,8 @@ port=system.physmem.port[0] system.cpu.l2cache.mem_side
 type=PhysicalMemory
 file=
 latency=1
+latency_var=0
+null=false
 range=0:134217727
 zero=false
 port=system.membus.port[0]

diff --git a/tests/long/70.twolf/ref/alpha/tru64/simple-timing/stdout b/tests/long/70.twolf/ref/alpha/tru64/simple-timing/stdout
index f32f0a972aff5807c5708986d134b903fceacd24..a512928ef4433a616a19063d812c7450a68dae43 100644 (file)
--- a/tests/long/70.twolf/ref/alpha/tru64/simple-timing/stdout
+++ b/tests/long/70.twolf/ref/alpha/tru64/simple-timing/stdout
@@ -1,3 +1,19 @@
+M5 Simulator System
+
+Copyright (c) 2001-2008
+The Regents of The University of Michigan
+All Rights Reserved
+
+
+M5 compiled Jul 21 2008 20:12:56
+M5 started Mon Jul 21 20:15:31 2008
+M5 executing on zizzer
+M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881
+M5 commit date Tue Jul 15 14:38:51 2008 -0400
+command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/long/70.twolf/alpha/tru64/simple-timing tests/run.py long/70.twolf/alpha/tru64/simple-timing
+Couldn't unlink  build/ALPHA_SE/tests/fast/long/70.twolf/alpha/tru64/simple-timing/smred.sav
+Couldn't unlink  build/ALPHA_SE/tests/fast/long/70.twolf/alpha/tru64/simple-timing/smred.sv2
+Global frequency set at 1000000000000 ticks per second
 
 TimberWolfSC version:v4.3a date:Mon Jan 25 18:50:36 EST 1988
 Standard Cell Placement and Global Routing Program

diff --git a/tests/long/70.twolf/ref/sparc/linux/simple-atomic/config.ini b/tests/long/70.twolf/ref/sparc/linux/simple-atomic/config.ini
index 31489ec5821b2b481218bc61af60f162aea42663..a772db39f333bd325750bc42a378373938a2a8f4 100644 (file)
--- a/tests/long/70.twolf/ref/sparc/linux/simple-atomic/config.ini
+++ b/tests/long/70.twolf/ref/sparc/linux/simple-atomic/config.ini
@@ -25,7 +25,8 @@ max_loads_all_threads=0
 max_loads_any_thread=0
 phase=0
 progress_interval=0
-simulate_stalls=false
+simulate_data_stalls=false
+simulate_inst_stalls=false
 system=system
 tracer=system.cpu.tracer
 width=1
@@ -58,6 +59,7 @@ max_stack_size=67108864
 output=cout
 pid=100
 ppid=99
+simpoint=0
 system=system
 uid=100
 
@@ -66,6 +68,7 @@ type=Bus
 block_size=64
 bus_id=0
 clock=1000
+header_cycles=1
 responder_set=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
@@ -74,6 +77,8 @@ port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 type=PhysicalMemory
 file=
 latency=1
+latency_var=0
+null=false
 range=0:134217727
 zero=false
 port=system.membus.port[0]

diff --git a/tests/long/70.twolf/ref/sparc/linux/simple-atomic/stdout b/tests/long/70.twolf/ref/sparc/linux/simple-atomic/stdout
index 8a70482ca69a66fe49069b696c69eca3f9adc995..ab5b187b525a950e7eba59f5182f6c18f6ed9d85 100644 (file)
--- a/tests/long/70.twolf/ref/sparc/linux/simple-atomic/stdout
+++ b/tests/long/70.twolf/ref/sparc/linux/simple-atomic/stdout
@@ -1,3 +1,19 @@
+M5 Simulator System
+
+Copyright (c) 2001-2008
+The Regents of The University of Michigan
+All Rights Reserved
+
+
+M5 compiled Jul 21 2008 20:33:06
+M5 started Mon Jul 21 20:33:08 2008
+M5 executing on zizzer
+M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881
+M5 commit date Tue Jul 15 14:38:51 2008 -0400
+command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/long/70.twolf/sparc/linux/simple-atomic tests/run.py long/70.twolf/sparc/linux/simple-atomic
+Couldn't unlink  build/SPARC_SE/tests/fast/long/70.twolf/sparc/linux/simple-atomic/smred.sav
+Couldn't unlink  build/SPARC_SE/tests/fast/long/70.twolf/sparc/linux/simple-atomic/smred.sv2
+Global frequency set at 1000000000000 ticks per second
 
 TimberWolfSC version:v4.3a date:Mon Jan 25 18:50:36 EST 1988
 Standard Cell Placement and Global Routing Program
@@ -11,16 +27,4 @@ Authors: Carl Sechen, Bill Swartz
  76  77  78  79  80  81  82  83  84  85  86  87  88  89  90 
  91  92  93  94  95  96  97  98  99 100 101 102 103 104 105 
 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 
-122 123 124 M5 Simulator System
-
-Copyright (c) 2001-2006
-The Regents of The University of Michigan
-All Rights Reserved
-
-
-M5 compiled Nov 28 2007 18:29:37
-M5 started Wed Nov 28 18:29:38 2007
-M5 executing on nacho
-command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/long/70.twolf/sparc/linux/simple-atomic tests/run.py long/70.twolf/sparc/linux/simple-atomic
-Global frequency set at 1000000000000 ticks per second
-Exiting @ tick 96718067000 because target called exit()
+122 123 124 Exiting @ tick 96718067000 because target called exit()

diff --git a/tests/long/70.twolf/ref/sparc/linux/simple-timing/config.ini b/tests/long/70.twolf/ref/sparc/linux/simple-timing/config.ini
index fe6c893b2c5dec773d4ce05e13f39153fd6bda73..77060efdc91e5cd4d22881adcea6034d2b29005b 100644 (file)
--- a/tests/long/70.twolf/ref/sparc/linux/simple-timing/config.ini
+++ b/tests/long/70.twolf/ref/sparc/linux/simple-timing/config.ini
@@ -174,6 +174,7 @@ max_stack_size=67108864
 output=cout
 pid=100
 ppid=99
+simpoint=0
 system=system
 uid=100
 
@@ -191,6 +192,8 @@ port=system.physmem.port[0] system.cpu.l2cache.mem_side
 type=PhysicalMemory
 file=
 latency=1
+latency_var=0
+null=false
 range=0:134217727
 zero=false
 port=system.membus.port[0]

diff --git a/tests/long/70.twolf/ref/sparc/linux/simple-timing/stdout b/tests/long/70.twolf/ref/sparc/linux/simple-timing/stdout
index 0d7eb187f5b5995115e7ae7d49fca4c8d4983c24..90bf47617412b72f21e98771613b6a7c8d6b86c8 100644 (file)
--- a/tests/long/70.twolf/ref/sparc/linux/simple-timing/stdout
+++ b/tests/long/70.twolf/ref/sparc/linux/simple-timing/stdout
@@ -1,3 +1,19 @@
+M5 Simulator System
+
+Copyright (c) 2001-2008
+The Regents of The University of Michigan
+All Rights Reserved
+
+
+M5 compiled Jul 21 2008 20:33:06
+M5 started Mon Jul 21 20:34:33 2008
+M5 executing on zizzer
+M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881
+M5 commit date Tue Jul 15 14:38:51 2008 -0400
+command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/long/70.twolf/sparc/linux/simple-timing tests/run.py long/70.twolf/sparc/linux/simple-timing
+Couldn't unlink  build/SPARC_SE/tests/fast/long/70.twolf/sparc/linux/simple-timing/smred.sav
+Couldn't unlink  build/SPARC_SE/tests/fast/long/70.twolf/sparc/linux/simple-timing/smred.sv2
+Global frequency set at 1000000000000 ticks per second
 
 TimberWolfSC version:v4.3a date:Mon Jan 25 18:50:36 EST 1988
 Standard Cell Placement and Global Routing Program
@@ -11,18 +27,4 @@ Authors: Carl Sechen, Bill Swartz
  76  77  78  79  80  81  82  83  84  85  86  87  88  89  90 
  91  92  93  94  95  96  97  98  99 100 101 102 103 104 105 
 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 
-122 123 124 M5 Simulator System
-
-Copyright (c) 2001-2008
-The Regents of The University of Michigan
-All Rights Reserved
-
-
-M5 compiled Feb 24 2008 13:27:50
-M5 started Mon Feb 25 16:18:16 2008
-M5 executing on tater
-command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/long/70.twolf/sparc/linux/simple-timing tests/run.py long/70.twolf/sparc/linux/simple-timing
-Couldn't unlink  build/SPARC_SE/tests/fast/long/70.twolf/sparc/linux/simple-timing/smred.sav
-Couldn't unlink  build/SPARC_SE/tests/fast/long/70.twolf/sparc/linux/simple-timing/smred.sv2
-Global frequency set at 1000000000000 ticks per second
-Exiting @ tick 270416976000 because target called exit()
+122 123 124 Exiting @ tick 270416976000 because target called exit()

diff --git a/tests/long/70.twolf/ref/x86/linux/simple-atomic/config.ini b/tests/long/70.twolf/ref/x86/linux/simple-atomic/config.ini
index f3b9dea12b4c4878a962fa78930bf4cdd07b1745..27c1d66f3d6d9ce765804a4b44ddcd41744d1340 100644 (file)
--- a/tests/long/70.twolf/ref/x86/linux/simple-atomic/config.ini
+++ b/tests/long/70.twolf/ref/x86/linux/simple-atomic/config.ini
@@ -25,7 +25,8 @@ max_loads_all_threads=0
 max_loads_any_thread=0
 phase=0
 progress_interval=0
-simulate_stalls=false
+simulate_data_stalls=false
+simulate_inst_stalls=false
 system=system
 tracer=system.cpu.tracer
 width=1
@@ -77,6 +78,7 @@ type=PhysicalMemory
 file=
 latency=1
 latency_var=0
+null=false
 range=0:134217727
 zero=false
 port=system.membus.port[0]

diff --git a/tests/long/70.twolf/ref/x86/linux/simple-atomic/stdout b/tests/long/70.twolf/ref/x86/linux/simple-atomic/stdout
index ab6e8b338381018db1f6c1431de1ce9405f66af8..a8e5ba7f40923f652b9472e34aa2a7f2155ab6ca 100644 (file)
--- a/tests/long/70.twolf/ref/x86/linux/simple-atomic/stdout
+++ b/tests/long/70.twolf/ref/x86/linux/simple-atomic/stdout
@@ -1,3 +1,19 @@
+M5 Simulator System
+
+Copyright (c) 2001-2008
+The Regents of The University of Michigan
+All Rights Reserved
+
+
+M5 compiled Jul 21 2008 20:45:28
+M5 started Mon Jul 21 20:50:19 2008
+M5 executing on zizzer
+M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881
+M5 commit date Tue Jul 15 14:38:51 2008 -0400
+command line: build/X86_SE/m5.fast -d build/X86_SE/tests/fast/long/70.twolf/x86/linux/simple-atomic tests/run.py long/70.twolf/x86/linux/simple-atomic
+Couldn't unlink  build/X86_SE/tests/fast/long/70.twolf/x86/linux/simple-atomic/smred.sav
+Couldn't unlink  build/X86_SE/tests/fast/long/70.twolf/x86/linux/simple-atomic/smred.sv2
+Global frequency set at 1000000000000 ticks per second
 
 TimberWolfSC version:v4.3a date:Mon Jan 25 18:50:36 EST 1988
 Standard Cell Placement and Global Routing Program
@@ -11,16 +27,4 @@ Authors: Carl Sechen, Bill Swartz
  76  77  78  79  80  81  82  83  84  85  86  87  88  89  90 
  91  92  93  94  95  96  97  98  99 100 101 102 103 104 105 
 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 
-122 123 124 M5 Simulator System
-
-Copyright (c) 2001-2008
-The Regents of The University of Michigan
-All Rights Reserved
-
-
-M5 compiled May 17 2008 13:48:04
-M5 started Sat May 17 13:48:05 2008
-M5 executing on tater
-command line: build/X86_SE/m5.fast -d build/X86_SE/tests/fast/long/70.twolf/x86/linux/simple-atomic tests/run.py long/70.twolf/x86/linux/simple-atomic
-Global frequency set at 1000000000000 ticks per second
-Exiting @ tick 129915167500 because target called exit()
+122 123 124 Exiting @ tick 129915167500 because target called exit()

diff --git a/tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/config.ini b/tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/config.ini
index 7369c8a0c2211f818326c049427dff9e86093d5d..2616832f034e2615c18dce0c3e8b3b3ff76e4653 100644 (file)
--- a/tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/config.ini
+++ b/tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/config.ini
@@ -65,7 +65,8 @@ max_loads_any_thread=0
 phase=0
 profile=0
 progress_interval=0
-simulate_stalls=false
+simulate_data_stalls=false
+simulate_inst_stalls=false
 system=system
 tracer=system.cpu.tracer
 width=1
@@ -109,6 +110,8 @@ read_only=true
 type=PhysicalMemory
 file=
 latency=1
+latency_var=0
+null=false
 range=133446500352:133446508543
 zero=false
 port=system.membus.port[7]
@@ -123,6 +126,7 @@ children=responder
 block_size=64
 bus_id=0
 clock=2
+header_cycles=1
 responder_set=false
 width=64
 default=system.iobus.responder.pio
@@ -150,6 +154,7 @@ children=responder
 block_size=64
 bus_id=1
 clock=2
+header_cycles=1
 responder_set=false
 width=64
 default=system.membus.responder.pio
@@ -175,6 +180,8 @@ pio=system.membus.default
 type=PhysicalMemory
 file=
 latency=1
+latency_var=0
+null=false
 range=133429198848:133429207039
 zero=false
 port=system.membus.port[6]
@@ -183,6 +190,8 @@ port=system.membus.port[6]
 type=PhysicalMemory
 file=
 latency=1
+latency_var=0
+null=false
 range=133445976064:133445984255
 zero=false
 port=system.membus.port[8]
@@ -191,6 +200,8 @@ port=system.membus.port[8]
 type=PhysicalMemory
 file=
 latency=1
+latency_var=0
+null=false
 range=1048576:68157439
 zero=true
 port=system.membus.port[3]
@@ -199,6 +210,8 @@ port=system.membus.port[3]
 type=PhysicalMemory
 file=
 latency=1
+latency_var=0
+null=false
 range=2147483648:2415919103
 zero=true
 port=system.membus.port[4]
@@ -207,13 +220,15 @@ port=system.membus.port[4]
 type=PhysicalMemory
 file=
 latency=1
+latency_var=0
+null=false
 range=1099243192320:1099251580927
 zero=false
 port=system.membus.port[5]
 
 [system.t1000]
 type=T1000
-children=fake_clk fake_jbi fake_l2_1 fake_l2_2 fake_l2_3 fake_l2_4 fake_l2esr_1 fake_l2esr_2 fake_l2esr_3 fake_l2esr_4 fake_membnks fake_ssi hconsole htod hvuart iob pconsole puart0
+children=fake_clk fake_jbi fake_l2_1 fake_l2_2 fake_l2_3 fake_l2_4 fake_l2esr_1 fake_l2esr_2 fake_l2esr_3 fake_l2esr_4 fake_membnks fake_ssi hterm htod hvuart iob pterm puart0
 intrctrl=system.intrctrl
 system=system
 
@@ -409,12 +424,11 @@ update_data=false
 warn_access=
 pio=system.iobus.port[10]
 
-[system.t1000.hconsole]
-type=SimConsole
-append_name=true
+[system.t1000.hterm]
+type=Terminal
 intr_control=system.intrctrl
 number=0
-output=console
+output=true
 port=3456
 
 [system.t1000.htod]
@@ -431,8 +445,8 @@ type=Uart8250
 pio_addr=1099255955456
 pio_latency=2
 platform=system.t1000
-sim_console=system.t1000.hconsole
 system=system
+terminal=system.t1000.hterm
 pio=system.iobus.port[13]
 
 [system.t1000.iob]
@@ -442,12 +456,11 @@ platform=system.t1000
 system=system
 pio=system.membus.port[0]
 
-[system.t1000.pconsole]
-type=SimConsole
-append_name=true
+[system.t1000.pterm]
+type=Terminal
 intr_control=system.intrctrl
 number=0
-output=console
+output=true
 port=3456
 
 [system.t1000.puart0]
@@ -455,7 +468,7 @@ type=Uart8250
 pio_addr=133412421632
 pio_latency=2
 platform=system.t1000
-sim_console=system.t1000.pconsole
 system=system
+terminal=system.t1000.pterm
 pio=system.iobus.port[12]
 

diff --git a/tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/stdout b/tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/stdout
index 4c8cf93928d2a0027f11cb3ee23d02fb8058208d..78a121c17deeb4f6aaa08557cee8b560995a54bf 100644 (file)
--- a/tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/stdout
+++ b/tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/stdout
@@ -1,13 +1,15 @@
 M5 Simulator System
 
-Copyright (c) 2001-2006
+Copyright (c) 2001-2008
 The Regents of The University of Michigan
 All Rights Reserved
 
 
-M5 compiled Aug 21 2007 14:42:25
-M5 started Tue Aug 21 14:44:56 2007
-M5 executing on nacho
+M5 compiled Jul 21 2008 20:41:45
+M5 started Mon Jul 21 20:41:46 2008
+M5 executing on zizzer
+M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881
+M5 commit date Tue Jul 15 14:38:51 2008 -0400
 command line: build/SPARC_FS/m5.fast -d build/SPARC_FS/tests/fast/long/80.solaris-boot/sparc/solaris/t1000-simple-atomic tests/run.py long/80.solaris-boot/sparc/solaris/t1000-simple-atomic
 Global frequency set at 2000000000 ticks per second
 Exiting @ tick 2233777512 because m5_exit instruction encountered

diff --git a/tests/quick/00.hello/ref/alpha/linux/o3-timing/config.ini b/tests/quick/00.hello/ref/alpha/linux/o3-timing/config.ini
index 1d32ced977a566084b9a99ef9785fcba5f244039..3db01031d95ecab4823118ce70fd5b22a3c5c6ae 100644 (file)
--- a/tests/quick/00.hello/ref/alpha/linux/o3-timing/config.ini
+++ b/tests/quick/00.hello/ref/alpha/linux/o3-timing/config.ini
@@ -376,6 +376,7 @@ max_stack_size=67108864
 output=cout
 pid=100
 ppid=99
+simpoint=0
 system=system
 uid=100
 
@@ -393,6 +394,8 @@ port=system.physmem.port[0] system.cpu.l2cache.mem_side
 type=PhysicalMemory
 file=
 latency=1
+latency_var=0
+null=false
 range=0:134217727
 zero=false
 port=system.membus.port[0]

diff --git a/tests/quick/00.hello/ref/alpha/linux/o3-timing/stdout b/tests/quick/00.hello/ref/alpha/linux/o3-timing/stdout
index fc63a59a91842169b488b84c4fb5fc5ad19db2e9..05d3c33eb9717199c5c4cfd49552d9897c3a7ae0 100644 (file)
--- a/tests/quick/00.hello/ref/alpha/linux/o3-timing/stdout
+++ b/tests/quick/00.hello/ref/alpha/linux/o3-timing/stdout
@@ -1,4 +1,3 @@
-Hello world!
 M5 Simulator System
 
 Copyright (c) 2001-2008
@@ -6,9 +5,12 @@ The Regents of The University of Michigan
 All Rights Reserved
 
 
-M5 compiled Feb 27 2008 17:52:16
-M5 started Wed Feb 27 17:56:32 2008
+M5 compiled Jul 21 2008 20:12:56
+M5 started Mon Jul 21 20:18:02 2008
 M5 executing on zizzer
+M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881
+M5 commit date Tue Jul 15 14:38:51 2008 -0400
 command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/quick/00.hello/alpha/linux/o3-timing tests/run.py quick/00.hello/alpha/linux/o3-timing
 Global frequency set at 1000000000000 ticks per second
+Hello world!
 Exiting @ tick 5303000 because target called exit()

diff --git a/tests/quick/00.hello/ref/alpha/linux/simple-atomic/config.ini b/tests/quick/00.hello/ref/alpha/linux/simple-atomic/config.ini
index 264bd19dec660f0784e657a9398e78a0a8200726..e68e8bc1c91f80c58ee32f9522aef956cc80bd57 100644 (file)
--- a/tests/quick/00.hello/ref/alpha/linux/simple-atomic/config.ini
+++ b/tests/quick/00.hello/ref/alpha/linux/simple-atomic/config.ini
@@ -25,7 +25,8 @@ max_loads_all_threads=0
 max_loads_any_thread=0
 phase=0
 progress_interval=0
-simulate_stalls=false
+simulate_data_stalls=false
+simulate_inst_stalls=false
 system=system
 tracer=system.cpu.tracer
 width=1
@@ -54,9 +55,11 @@ euid=100
 executable=/dist/m5/regression/test-progs/hello/bin/alpha/linux/hello
 gid=100
 input=cin
+max_stack_size=67108864
 output=cout
 pid=100
 ppid=99
+simpoint=0
 system=system
 uid=100
 
@@ -65,6 +68,7 @@ type=Bus
 block_size=64
 bus_id=0
 clock=1000
+header_cycles=1
 responder_set=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
@@ -73,6 +77,8 @@ port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 type=PhysicalMemory
 file=
 latency=1
+latency_var=0
+null=false
 range=0:134217727
 zero=false
 port=system.membus.port[0]

diff --git a/tests/quick/00.hello/ref/alpha/linux/simple-atomic/stdout b/tests/quick/00.hello/ref/alpha/linux/simple-atomic/stdout
index 9af7c0a45c34a03ab732e11a4b3a24cf70f9761f..ae7c0fe57935f0e64b6d471ea589dcf2664b21b9 100644 (file)
--- a/tests/quick/00.hello/ref/alpha/linux/simple-atomic/stdout
+++ b/tests/quick/00.hello/ref/alpha/linux/simple-atomic/stdout
@@ -1,14 +1,16 @@
-Hello world!
 M5 Simulator System
 
-Copyright (c) 2001-2006
+Copyright (c) 2001-2008
 The Regents of The University of Michigan
 All Rights Reserved
 
 
-M5 compiled Aug 14 2007 17:36:58
-M5 started Tue Aug 14 17:40:03 2007
-M5 executing on nacho
+M5 compiled Jul 21 2008 20:12:56
+M5 started Mon Jul 21 20:13:07 2008
+M5 executing on zizzer
+M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881
+M5 commit date Tue Jul 15 14:38:51 2008 -0400
 command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/quick/00.hello/alpha/linux/simple-atomic tests/run.py quick/00.hello/alpha/linux/simple-atomic
 Global frequency set at 1000000000000 ticks per second
+Hello world!
 Exiting @ tick 2833500 because target called exit()

diff --git a/tests/quick/00.hello/ref/alpha/linux/simple-timing/config.ini b/tests/quick/00.hello/ref/alpha/linux/simple-timing/config.ini
index 7b95a328d74e2523df9f51c1e0d146d970ff13f9..bbb3281852a79f820c1c62602cc60989af9c01bd 100644 (file)
--- a/tests/quick/00.hello/ref/alpha/linux/simple-timing/config.ini
+++ b/tests/quick/00.hello/ref/alpha/linux/simple-timing/config.ini
@@ -174,6 +174,7 @@ max_stack_size=67108864
 output=cout
 pid=100
 ppid=99
+simpoint=0
 system=system
 uid=100
 
@@ -191,6 +192,8 @@ port=system.physmem.port[0] system.cpu.l2cache.mem_side
 type=PhysicalMemory
 file=
 latency=1
+latency_var=0
+null=false
 range=0:134217727
 zero=false
 port=system.membus.port[0]

diff --git a/tests/quick/00.hello/ref/alpha/linux/simple-timing/stdout b/tests/quick/00.hello/ref/alpha/linux/simple-timing/stdout
index 11d2e9b8e669d512bb6e115aec0dafe22fd40161..c8cf5ab9dff8340575d108687748eb4593e8d700 100644 (file)
--- a/tests/quick/00.hello/ref/alpha/linux/simple-timing/stdout
+++ b/tests/quick/00.hello/ref/alpha/linux/simple-timing/stdout
@@ -1,4 +1,3 @@
-Hello world!
 M5 Simulator System
 
 Copyright (c) 2001-2008
@@ -6,9 +5,12 @@ The Regents of The University of Michigan
 All Rights Reserved
 
 
-M5 compiled Feb 24 2008 12:58:20
-M5 started Sun Feb 24 12:58:22 2008
-M5 executing on tater
+M5 compiled Jul 21 2008 20:12:56
+M5 started Mon Jul 21 20:14:04 2008
+M5 executing on zizzer
+M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881
+M5 commit date Tue Jul 15 14:38:51 2008 -0400
 command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/quick/00.hello/alpha/linux/simple-timing tests/run.py quick/00.hello/alpha/linux/simple-timing
 Global frequency set at 1000000000000 ticks per second
+Hello world!
 Exiting @ tick 19285000 because target called exit()

diff --git a/tests/quick/00.hello/ref/alpha/tru64/o3-timing/config.ini b/tests/quick/00.hello/ref/alpha/tru64/o3-timing/config.ini
index 26f63e7be137317207bee0314608791027c633c4..2971dacfaade1e2c735b6fa3c7c89f72e87d8ba7 100644 (file)
--- a/tests/quick/00.hello/ref/alpha/tru64/o3-timing/config.ini
+++ b/tests/quick/00.hello/ref/alpha/tru64/o3-timing/config.ini
@@ -376,6 +376,7 @@ max_stack_size=67108864
 output=cout
 pid=100
 ppid=99
+simpoint=0
 system=system
 uid=100
 
@@ -393,6 +394,8 @@ port=system.physmem.port[0] system.cpu.l2cache.mem_side
 type=PhysicalMemory
 file=
 latency=1
+latency_var=0
+null=false
 range=0:134217727
 zero=false
 port=system.membus.port[0]

diff --git a/tests/quick/00.hello/ref/alpha/tru64/o3-timing/stdout b/tests/quick/00.hello/ref/alpha/tru64/o3-timing/stdout
index 95bc632c87d1e95bea24a475f4ca593b5b188aaf..abedce50c638b5abc87ccc3f8ed96c56994a7d9a 100644 (file)
--- a/tests/quick/00.hello/ref/alpha/tru64/o3-timing/stdout
+++ b/tests/quick/00.hello/ref/alpha/tru64/o3-timing/stdout
@@ -1,4 +1,3 @@
-Hello world!
 M5 Simulator System
 
 Copyright (c) 2001-2008
@@ -6,9 +5,12 @@ The Regents of The University of Michigan
 All Rights Reserved
 
 
-M5 compiled Feb 27 2008 17:52:16
-M5 started Wed Feb 27 17:56:33 2008
+M5 compiled Jul 21 2008 20:12:56
+M5 started Mon Jul 21 20:12:59 2008
 M5 executing on zizzer
+M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881
+M5 commit date Tue Jul 15 14:38:51 2008 -0400
 command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/quick/00.hello/alpha/tru64/o3-timing tests/run.py quick/00.hello/alpha/tru64/o3-timing
 Global frequency set at 1000000000000 ticks per second
+Hello world!
 Exiting @ tick 2700000 because target called exit()

diff --git a/tests/quick/00.hello/ref/alpha/tru64/simple-atomic/config.ini b/tests/quick/00.hello/ref/alpha/tru64/simple-atomic/config.ini
index ac0ec32b8bd409e4be9e7aea1ab5dca3eecd518b..74656d464a5e8c083e75d4ce16b8fde299ead0bc 100644 (file)
--- a/tests/quick/00.hello/ref/alpha/tru64/simple-atomic/config.ini
+++ b/tests/quick/00.hello/ref/alpha/tru64/simple-atomic/config.ini
@@ -25,7 +25,8 @@ max_loads_all_threads=0
 max_loads_any_thread=0
 phase=0
 progress_interval=0
-simulate_stalls=false
+simulate_data_stalls=false
+simulate_inst_stalls=false
 system=system
 tracer=system.cpu.tracer
 width=1
@@ -54,9 +55,11 @@ euid=100
 executable=/dist/m5/regression/test-progs/hello/bin/alpha/tru64/hello
 gid=100
 input=cin
+max_stack_size=67108864
 output=cout
 pid=100
 ppid=99
+simpoint=0
 system=system
 uid=100
 
@@ -65,6 +68,7 @@ type=Bus
 block_size=64
 bus_id=0
 clock=1000
+header_cycles=1
 responder_set=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
@@ -73,6 +77,8 @@ port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 type=PhysicalMemory
 file=
 latency=1
+latency_var=0
+null=false
 range=0:134217727
 zero=false
 port=system.membus.port[0]

diff --git a/tests/quick/00.hello/ref/alpha/tru64/simple-atomic/stdout b/tests/quick/00.hello/ref/alpha/tru64/simple-atomic/stdout
index d906bb79e13f7f80b7dadba9b453fcf97b214df6..0f1a816dd3e173c766e290a7619c866ab0190db1 100644 (file)
--- a/tests/quick/00.hello/ref/alpha/tru64/simple-atomic/stdout
+++ b/tests/quick/00.hello/ref/alpha/tru64/simple-atomic/stdout
@@ -1,14 +1,16 @@
-Hello world!
 M5 Simulator System
 
-Copyright (c) 2001-2006
+Copyright (c) 2001-2008
 The Regents of The University of Michigan
 All Rights Reserved
 
 
-M5 compiled Sep 27 2007 13:46:37
-M5 started Thu Sep 27 20:06:36 2007
-M5 executing on zeep
+M5 compiled Jul 21 2008 20:12:56
+M5 started Mon Jul 21 20:13:07 2008
+M5 executing on zizzer
+M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881
+M5 commit date Tue Jul 15 14:38:51 2008 -0400
 command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/quick/00.hello/alpha/tru64/simple-atomic tests/run.py quick/00.hello/alpha/tru64/simple-atomic
 Global frequency set at 1000000000000 ticks per second
+Hello world!
 Exiting @ tick 1297500 because target called exit()

diff --git a/tests/quick/00.hello/ref/alpha/tru64/simple-timing/config.ini b/tests/quick/00.hello/ref/alpha/tru64/simple-timing/config.ini
index 4f7ec60f2cb7c8ac56b52c7227ac7584abe4aa42..7d543f47c1e9ea4eb09fbb2d55fdaaeebd6417d3 100644 (file)
--- a/tests/quick/00.hello/ref/alpha/tru64/simple-timing/config.ini
+++ b/tests/quick/00.hello/ref/alpha/tru64/simple-timing/config.ini
@@ -174,6 +174,7 @@ max_stack_size=67108864
 output=cout
 pid=100
 ppid=99
+simpoint=0
 system=system
 uid=100
 
@@ -191,6 +192,8 @@ port=system.physmem.port[0] system.cpu.l2cache.mem_side
 type=PhysicalMemory
 file=
 latency=1
+latency_var=0
+null=false
 range=0:134217727
 zero=false
 port=system.membus.port[0]

diff --git a/tests/quick/00.hello/ref/alpha/tru64/simple-timing/stdout b/tests/quick/00.hello/ref/alpha/tru64/simple-timing/stdout
index c25792a5f57fbafc1d8eea914f97a391d7416307..d1bbc80b80c80a6387747a907b154496a5f9b777 100644 (file)
--- a/tests/quick/00.hello/ref/alpha/tru64/simple-timing/stdout
+++ b/tests/quick/00.hello/ref/alpha/tru64/simple-timing/stdout
@@ -1,4 +1,3 @@
-Hello world!
 M5 Simulator System
 
 Copyright (c) 2001-2008
@@ -6,9 +5,12 @@ The Regents of The University of Michigan
 All Rights Reserved
 
 
-M5 compiled Feb 24 2008 12:58:20
-M5 started Sun Feb 24 12:58:25 2008
-M5 executing on tater
+M5 compiled Jul 21 2008 20:12:56
+M5 started Mon Jul 21 20:24:22 2008
+M5 executing on zizzer
+M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881
+M5 commit date Tue Jul 15 14:38:51 2008 -0400
 command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/quick/00.hello/alpha/tru64/simple-timing tests/run.py quick/00.hello/alpha/tru64/simple-timing
 Global frequency set at 1000000000000 ticks per second
+Hello world!
 Exiting @ tick 9950000 because target called exit()

diff --git a/tests/quick/00.hello/ref/mips/linux/simple-atomic/config.ini b/tests/quick/00.hello/ref/mips/linux/simple-atomic/config.ini
index 653ab35523ca76bce8d292731a88f84fd728b44a..11bedc8c7148990f505bfefc0031335141e23531 100644 (file)
--- a/tests/quick/00.hello/ref/mips/linux/simple-atomic/config.ini
+++ b/tests/quick/00.hello/ref/mips/linux/simple-atomic/config.ini
@@ -11,7 +11,62 @@ physmem=system.physmem
 
 [system.cpu]
 type=AtomicSimpleCPU
-children=dtb itb tracer workload
+children=dtb itb tlb tracer workload
+CP0_Config=0
+CP0_Config1=0
+CP0_Config1_C2=false
+CP0_Config1_CA=false
+CP0_Config1_DA=0
+CP0_Config1_DL=0
+CP0_Config1_DS=0
+CP0_Config1_EP=false
+CP0_Config1_FP=false
+CP0_Config1_IA=0
+CP0_Config1_IL=0
+CP0_Config1_IS=0
+CP0_Config1_M=0
+CP0_Config1_MD=false
+CP0_Config1_MMU=0
+CP0_Config1_PC=false
+CP0_Config1_WR=false
+CP0_Config2=0
+CP0_Config2_M=false
+CP0_Config2_SA=0
+CP0_Config2_SL=0
+CP0_Config2_SS=0
+CP0_Config2_SU=0
+CP0_Config2_TA=0
+CP0_Config2_TL=0
+CP0_Config2_TS=0
+CP0_Config2_TU=0
+CP0_Config3=0
+CP0_Config3_DSPP=false
+CP0_Config3_LPA=false
+CP0_Config3_M=false
+CP0_Config3_MT=false
+CP0_Config3_SM=false
+CP0_Config3_SP=false
+CP0_Config3_TL=false
+CP0_Config3_VEIC=false
+CP0_Config3_VInt=false
+CP0_Config_AR=0
+CP0_Config_AT=0
+CP0_Config_BE=0
+CP0_Config_MT=0
+CP0_Config_VI=0
+CP0_EBase_CPUNum=0
+CP0_IntCtl_IPPCI=0
+CP0_IntCtl_IPTI=0
+CP0_PRId=0
+CP0_PRId_CompanyID=0
+CP0_PRId_CompanyOptions=0
+CP0_PRId_ProcessorID=1
+CP0_PRId_Revision=0
+CP0_PerfCtr_M=false
+CP0_PerfCtr_W=false
+CP0_SrsCtl_HSS=0
+CP0_WatchHi_M=false
+UnifiedTLB=true
 clock=500
 cpu_id=0
 defer_registration=false
@@ -25,8 +80,10 @@ max_loads_all_threads=0
 max_loads_any_thread=0
 phase=0
 progress_interval=0
-simulate_stalls=false
+simulate_data_stalls=false
+simulate_inst_stalls=false
 system=system
+tlb=system.cpu.tlb
 tracer=system.cpu.tracer
 width=1
 workload=system.cpu.workload
@@ -35,9 +92,15 @@ icache_port=system.membus.port[1]
 
 [system.cpu.dtb]
 type=MipsDTB
+size=64
 
 [system.cpu.itb]
 type=MipsITB
+size=64
+
+[system.cpu.tlb]
+type=MipsUTB
+size=64
 
 [system.cpu.tracer]
 type=ExeTracer
@@ -52,9 +115,11 @@ euid=100
 executable=/dist/m5/regression/test-progs/hello/bin/mips/linux/hello
 gid=100
 input=cin
+max_stack_size=67108864
 output=cout
 pid=100
 ppid=99
+simpoint=0
 system=system
 uid=100
 
@@ -63,6 +128,7 @@ type=Bus
 block_size=64
 bus_id=0
 clock=1000
+header_cycles=1
 responder_set=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
@@ -71,6 +137,8 @@ port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 type=PhysicalMemory
 file=
 latency=1
+latency_var=0
+null=false
 range=0:134217727
 zero=false
 port=system.membus.port[0]

diff --git a/tests/quick/00.hello/ref/mips/linux/simple-atomic/stdout b/tests/quick/00.hello/ref/mips/linux/simple-atomic/stdout
index 1cc3f66628385b51d5ddc39cfef53e82a3f60b6e..43b61af396effe723b7115c025f1b4700c2e63a1 100644 (file)
--- a/tests/quick/00.hello/ref/mips/linux/simple-atomic/stdout
+++ b/tests/quick/00.hello/ref/mips/linux/simple-atomic/stdout
@@ -1,14 +1,16 @@
-Hello World!
 M5 Simulator System
 
-Copyright (c) 2001-2006
+Copyright (c) 2001-2008
 The Regents of The University of Michigan
 All Rights Reserved
 
 
-M5 compiled Aug 14 2007 22:02:23
-M5 started Tue Aug 14 22:02:24 2007
-M5 executing on nacho
+M5 compiled Jul 21 2008 20:31:07
+M5 started Mon Jul 21 20:31:10 2008
+M5 executing on zizzer
+M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881
+M5 commit date Tue Jul 15 14:38:51 2008 -0400
 command line: build/MIPS_SE/m5.fast -d build/MIPS_SE/tests/fast/quick/00.hello/mips/linux/simple-atomic tests/run.py quick/00.hello/mips/linux/simple-atomic
 Global frequency set at 1000000000000 ticks per second
+Hello World!
 Exiting @ tick 2828000 because target called exit()

diff --git a/tests/quick/00.hello/ref/mips/linux/simple-timing/config.ini b/tests/quick/00.hello/ref/mips/linux/simple-timing/config.ini
index 1b246149f5440b85e30499bb55b82941aff6ae41..e5f76a0a847e50674c9ff3d5506f1711fdde0fce 100644 (file)
--- a/tests/quick/00.hello/ref/mips/linux/simple-timing/config.ini
+++ b/tests/quick/00.hello/ref/mips/linux/simple-timing/config.ini
@@ -234,6 +234,7 @@ max_stack_size=67108864
 output=cout
 pid=100
 ppid=99
+simpoint=0
 system=system
 uid=100
 
@@ -251,6 +252,8 @@ port=system.physmem.port[0] system.cpu.l2cache.mem_side
 type=PhysicalMemory
 file=
 latency=1
+latency_var=0
+null=false
 range=0:134217727
 zero=false
 port=system.membus.port[0]

diff --git a/tests/quick/00.hello/ref/mips/linux/simple-timing/stdout b/tests/quick/00.hello/ref/mips/linux/simple-timing/stdout
index 4dcddd5aeae01c186efbd4a28ddb9cfbe6a8718e..37be8fb0cf9b4d0801ccbdeb901f51526214078b 100644 (file)
--- a/tests/quick/00.hello/ref/mips/linux/simple-timing/stdout
+++ b/tests/quick/00.hello/ref/mips/linux/simple-timing/stdout
@@ -1,4 +1,3 @@
-Hello World!
 M5 Simulator System
 
 Copyright (c) 2001-2008
@@ -6,9 +5,12 @@ The Regents of The University of Michigan
 All Rights Reserved
 
 
-M5 compiled Feb 24 2008 13:24:29
-M5 started Sun Feb 24 13:24:31 2008
-M5 executing on tater
+M5 compiled Jul 21 2008 20:31:07
+M5 started Mon Jul 21 20:31:09 2008
+M5 executing on zizzer
+M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881
+M5 commit date Tue Jul 15 14:38:51 2008 -0400
 command line: build/MIPS_SE/m5.fast -d build/MIPS_SE/tests/fast/quick/00.hello/mips/linux/simple-timing tests/run.py quick/00.hello/mips/linux/simple-timing
 Global frequency set at 1000000000000 ticks per second
+Hello World!
 Exiting @ tick 19359000 because target called exit()

diff --git a/tests/quick/00.hello/ref/sparc/linux/simple-atomic/config.ini b/tests/quick/00.hello/ref/sparc/linux/simple-atomic/config.ini
index 73da00d730e583f335c15b0efdf6b75ce26f7a74..d13eeb4e2ec3b2de7084c29794df927db986514c 100644 (file)
--- a/tests/quick/00.hello/ref/sparc/linux/simple-atomic/config.ini
+++ b/tests/quick/00.hello/ref/sparc/linux/simple-atomic/config.ini
@@ -25,7 +25,8 @@ max_loads_all_threads=0
 max_loads_any_thread=0
 phase=0
 progress_interval=0
-simulate_stalls=false
+simulate_data_stalls=false
+simulate_inst_stalls=false
 system=system
 tracer=system.cpu.tracer
 width=1
@@ -58,6 +59,7 @@ max_stack_size=67108864
 output=cout
 pid=100
 ppid=99
+simpoint=0
 system=system
 uid=100
 
@@ -66,6 +68,7 @@ type=Bus
 block_size=64
 bus_id=0
 clock=1000
+header_cycles=1
 responder_set=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
@@ -74,6 +77,8 @@ port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 type=PhysicalMemory
 file=
 latency=1
+latency_var=0
+null=false
 range=0:134217727
 zero=false
 port=system.membus.port[0]

diff --git a/tests/quick/00.hello/ref/sparc/linux/simple-atomic/stdout b/tests/quick/00.hello/ref/sparc/linux/simple-atomic/stdout
index cf86d09648f62dcab99bcdce3e9db312bfecfac1..b07b710c8073c27444c78f847afe8a0a93740818 100644 (file)
--- a/tests/quick/00.hello/ref/sparc/linux/simple-atomic/stdout
+++ b/tests/quick/00.hello/ref/sparc/linux/simple-atomic/stdout
@@ -1,13 +1,15 @@
-Hello World!M5 Simulator System
+M5 Simulator System
 
-Copyright (c) 2001-2006
+Copyright (c) 2001-2008
 The Regents of The University of Michigan
 All Rights Reserved
 
 
-M5 compiled Nov 28 2007 18:29:37
-M5 started Wed Nov 28 18:29:38 2007
-M5 executing on nacho
+M5 compiled Jul 21 2008 20:33:06
+M5 started Mon Jul 21 20:33:18 2008
+M5 executing on zizzer
+M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881
+M5 commit date Tue Jul 15 14:38:51 2008 -0400
 command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/quick/00.hello/sparc/linux/simple-atomic tests/run.py quick/00.hello/sparc/linux/simple-atomic
 Global frequency set at 1000000000000 ticks per second
-Exiting @ tick 2447500 because target called exit()
+Hello World!Exiting @ tick 2447500 because target called exit()

diff --git a/tests/quick/00.hello/ref/sparc/linux/simple-timing/config.ini b/tests/quick/00.hello/ref/sparc/linux/simple-timing/config.ini
index ef40ce3fdf2bde04b777f5f53401839485f068a6..092061e7f9f9f74be654604c7538c37d6453d8c8 100644 (file)
--- a/tests/quick/00.hello/ref/sparc/linux/simple-timing/config.ini
+++ b/tests/quick/00.hello/ref/sparc/linux/simple-timing/config.ini
@@ -174,6 +174,7 @@ max_stack_size=67108864
 output=cout
 pid=100
 ppid=99
+simpoint=0
 system=system
 uid=100
 
@@ -191,6 +192,8 @@ port=system.physmem.port[0] system.cpu.l2cache.mem_side
 type=PhysicalMemory
 file=
 latency=1
+latency_var=0
+null=false
 range=0:134217727
 zero=false
 port=system.membus.port[0]

diff --git a/tests/quick/00.hello/ref/sparc/linux/simple-timing/stdout b/tests/quick/00.hello/ref/sparc/linux/simple-timing/stdout
index 12e9a5d09aa87a1e6aa6ac691c8a83764d411eba..4d51e2838132aee7282c594477958ab17c5262df 100644 (file)
--- a/tests/quick/00.hello/ref/sparc/linux/simple-timing/stdout
+++ b/tests/quick/00.hello/ref/sparc/linux/simple-timing/stdout
@@ -1,13 +1,15 @@
-Hello World!M5 Simulator System
+M5 Simulator System
 
 Copyright (c) 2001-2008
 The Regents of The University of Michigan
 All Rights Reserved
 
 
-M5 compiled Feb 24 2008 13:27:50
-M5 started Sun Feb 24 13:28:47 2008
-M5 executing on tater
+M5 compiled Jul 21 2008 20:33:06
+M5 started Mon Jul 21 20:33:08 2008
+M5 executing on zizzer
+M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881
+M5 commit date Tue Jul 15 14:38:51 2008 -0400
 command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/quick/00.hello/sparc/linux/simple-timing tests/run.py quick/00.hello/sparc/linux/simple-timing
 Global frequency set at 1000000000000 ticks per second
-Exiting @ tick 16662000 because target called exit()
+Hello World!Exiting @ tick 16662000 because target called exit()

diff --git a/tests/quick/00.hello/ref/x86/linux/simple-atomic/config.ini b/tests/quick/00.hello/ref/x86/linux/simple-atomic/config.ini
index 6d8421e24001860880d48704cc4a090b1b4e56ab..569d4b220e74b6c905921bc99a4be22be5d064c0 100644 (file)
--- a/tests/quick/00.hello/ref/x86/linux/simple-atomic/config.ini
+++ b/tests/quick/00.hello/ref/x86/linux/simple-atomic/config.ini
@@ -25,7 +25,8 @@ max_loads_all_threads=0
 max_loads_any_thread=0
 phase=0
 progress_interval=0
-simulate_stalls=false
+simulate_data_stalls=false
+simulate_inst_stalls=false
 system=system
 tracer=system.cpu.tracer
 width=1
@@ -77,6 +78,7 @@ type=PhysicalMemory
 file=
 latency=1
 latency_var=0
+null=false
 range=0:134217727
 zero=false
 port=system.membus.port[0]

diff --git a/tests/quick/00.hello/ref/x86/linux/simple-atomic/stdout b/tests/quick/00.hello/ref/x86/linux/simple-atomic/stdout
index 80b2e5852c9102b40cd13175f4b5e07ed1077c2a..99e18769022a611c7cddea02d9615683a1a55fe6 100644 (file)
--- a/tests/quick/00.hello/ref/x86/linux/simple-atomic/stdout
+++ b/tests/quick/00.hello/ref/x86/linux/simple-atomic/stdout
@@ -1,4 +1,3 @@
-Hello world!
 M5 Simulator System
 
 Copyright (c) 2001-2008
@@ -6,9 +5,12 @@ The Regents of The University of Michigan
 All Rights Reserved
 
 
-M5 compiled May 17 2008 13:48:04
-M5 started Sat May 17 13:48:05 2008
-M5 executing on tater
+M5 compiled Jul 21 2008 20:45:28
+M5 started Mon Jul 21 20:50:18 2008
+M5 executing on zizzer
+M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881
+M5 commit date Tue Jul 15 14:38:51 2008 -0400
 command line: build/X86_SE/m5.fast -d build/X86_SE/tests/fast/quick/00.hello/x86/linux/simple-atomic tests/run.py quick/00.hello/x86/linux/simple-atomic
 Global frequency set at 1000000000000 ticks per second
+Hello world!
 Exiting @ tick 4932000 because target called exit()

diff --git a/tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/config.ini b/tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/config.ini
index d966db2bf5679f415c7a7262289c6ea284c644bd..ca040dc253696e6a3e98c95ef2129fec78dcc196 100644 (file)
--- a/tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/config.ini
+++ b/tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/config.ini
@@ -376,6 +376,7 @@ max_stack_size=67108864
 output=cout
 pid=100
 ppid=99
+simpoint=0
 system=system
 uid=100
 
@@ -393,6 +394,7 @@ max_stack_size=67108864
 output=cout
 pid=100
 ppid=99
+simpoint=0
 system=system
 uid=100
 
@@ -410,6 +412,8 @@ port=system.physmem.port[0] system.cpu.l2cache.mem_side
 type=PhysicalMemory
 file=
 latency=1
+latency_var=0
+null=false
 range=0:134217727
 zero=false
 port=system.membus.port[0]

diff --git a/tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/stdout b/tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/stdout
index 9d1a14d46d4007fd5974d917adb55364708ae8aa..1b77a8f81f484d8d3d5dff104c2fcd55e310ad18 100644 (file)
--- a/tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/stdout
+++ b/tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/stdout
@@ -1,5 +1,3 @@
-Hello world!
-Hello world!
 M5 Simulator System
 
 Copyright (c) 2001-2008
@@ -7,9 +5,13 @@ The Regents of The University of Michigan
 All Rights Reserved
 
 
-M5 compiled Feb 27 2008 17:52:16
-M5 started Wed Feb 27 17:56:35 2008
+M5 compiled Jul 21 2008 20:12:56
+M5 started Mon Jul 21 20:12:59 2008
 M5 executing on zizzer
+M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881
+M5 commit date Tue Jul 15 14:38:51 2008 -0400
 command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/quick/01.hello-2T-smt/alpha/linux/o3-timing tests/run.py quick/01.hello-2T-smt/alpha/linux/o3-timing
 Global frequency set at 1000000000000 ticks per second
+Hello world!
+Hello world!
 Exiting @ tick 6363000 because target called exit()

diff --git a/tests/quick/02.insttest/ref/sparc/linux/o3-timing/config.ini b/tests/quick/02.insttest/ref/sparc/linux/o3-timing/config.ini
index c6ceaa121b9c5c6afa251e2d6873b7074f00b7cb..e981744fd0022beeb06ddd1492b70f456f72752b 100644 (file)
--- a/tests/quick/02.insttest/ref/sparc/linux/o3-timing/config.ini
+++ b/tests/quick/02.insttest/ref/sparc/linux/o3-timing/config.ini
@@ -376,6 +376,7 @@ max_stack_size=67108864
 output=cout
 pid=100
 ppid=99
+simpoint=0
 system=system
 uid=100
 
@@ -393,6 +394,8 @@ port=system.physmem.port[0] system.cpu.l2cache.mem_side
 type=PhysicalMemory
 file=
 latency=1
+latency_var=0
+null=false
 range=0:134217727
 zero=false
 port=system.membus.port[0]

diff --git a/tests/quick/02.insttest/ref/sparc/linux/o3-timing/stdout b/tests/quick/02.insttest/ref/sparc/linux/o3-timing/stdout
index ee061a6c6fccfa55128757f790928f2c3f7a4cae..e6fab5604635ad4f6432b1c2d407b689ade7474a 100644 (file)
--- a/tests/quick/02.insttest/ref/sparc/linux/o3-timing/stdout
+++ b/tests/quick/02.insttest/ref/sparc/linux/o3-timing/stdout
@@ -1,3 +1,17 @@
+M5 Simulator System
+
+Copyright (c) 2001-2008
+The Regents of The University of Michigan
+All Rights Reserved
+
+
+M5 compiled Jul 21 2008 20:33:06
+M5 started Mon Jul 21 20:33:19 2008
+M5 executing on zizzer
+M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881
+M5 commit date Tue Jul 15 14:38:51 2008 -0400
+command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/quick/02.insttest/sparc/linux/o3-timing tests/run.py quick/02.insttest/sparc/linux/o3-timing
+Global frequency set at 1000000000000 ticks per second
 Begining test of difficult SPARC instructions...
 LDSTUB:                Passed
 SWAP:          Passed
@@ -9,16 +23,4 @@ LDTX:         Passed
 LDTW:          Passed
 STTW:          Passed
 Done
-M5 Simulator System
-
-Copyright (c) 2001-2008
-The Regents of The University of Michigan
-All Rights Reserved
-
-
-M5 compiled Feb 27 2008 17:54:12
-M5 started Wed Feb 27 18:07:27 2008
-M5 executing on zizzer
-command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/quick/02.insttest/sparc/linux/o3-timing tests/run.py quick/02.insttest/sparc/linux/o3-timing
-Global frequency set at 1000000000000 ticks per second
 Exiting @ tick 15392500 because target called exit()

diff --git a/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/config.ini b/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/config.ini
index a1a3cadc4ea39f427ed3fcbc9a64b08613ab76b3..ba8f324abbe88a19ca82e7d9f6cf47cd5b352169 100644 (file)
--- a/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/config.ini
+++ b/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/config.ini
@@ -25,7 +25,8 @@ max_loads_all_threads=0
 max_loads_any_thread=0
 phase=0
 progress_interval=0
-simulate_stalls=false
+simulate_data_stalls=false
+simulate_inst_stalls=false
 system=system
 tracer=system.cpu.tracer
 width=1
@@ -58,6 +59,7 @@ max_stack_size=67108864
 output=cout
 pid=100
 ppid=99
+simpoint=0
 system=system
 uid=100
 
@@ -66,6 +68,7 @@ type=Bus
 block_size=64
 bus_id=0
 clock=1000
+header_cycles=1
 responder_set=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
@@ -74,6 +77,8 @@ port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 type=PhysicalMemory
 file=
 latency=1
+latency_var=0
+null=false
 range=0:134217727
 zero=false
 port=system.membus.port[0]

diff --git a/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/stdout b/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/stdout
index c0bb8f23f023acca6a12fc5a0f6b557d3e698b76..6632a0f07b566f583d6655ad62a47ffe053b771a 100644 (file)
--- a/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/stdout
+++ b/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/stdout
@@ -1,3 +1,17 @@
+M5 Simulator System
+
+Copyright (c) 2001-2008
+The Regents of The University of Michigan
+All Rights Reserved
+
+
+M5 compiled Jul 21 2008 20:33:06
+M5 started Mon Jul 21 20:33:18 2008
+M5 executing on zizzer
+M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881
+M5 commit date Tue Jul 15 14:38:51 2008 -0400
+command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/quick/02.insttest/sparc/linux/simple-atomic tests/run.py quick/02.insttest/sparc/linux/simple-atomic
+Global frequency set at 1000000000000 ticks per second
 Begining test of difficult SPARC instructions...
 LDSTUB:                Passed
 SWAP:          Passed
@@ -9,16 +23,4 @@ LDTX:         Passed
 LDTW:          Passed
 STTW:          Passed
 Done
-M5 Simulator System
-
-Copyright (c) 2001-2006
-The Regents of The University of Michigan
-All Rights Reserved
-
-
-M5 compiled Nov 28 2007 18:29:37
-M5 started Wed Nov 28 18:29:38 2007
-M5 executing on nacho
-command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/quick/02.insttest/sparc/linux/simple-atomic tests/run.py quick/02.insttest/sparc/linux/simple-atomic
-Global frequency set at 1000000000000 ticks per second
 Exiting @ tick 5514000 because target called exit()

diff --git a/tests/quick/02.insttest/ref/sparc/linux/simple-timing/config.ini b/tests/quick/02.insttest/ref/sparc/linux/simple-timing/config.ini
index f4a82a8e3cffdc40645b3787424ef6a63c684afa..fa313ad0d9be2e434f9e1f44135041181972beb1 100644 (file)
--- a/tests/quick/02.insttest/ref/sparc/linux/simple-timing/config.ini
+++ b/tests/quick/02.insttest/ref/sparc/linux/simple-timing/config.ini
@@ -174,6 +174,7 @@ max_stack_size=67108864
 output=cout
 pid=100
 ppid=99
+simpoint=0
 system=system
 uid=100
 
@@ -191,6 +192,8 @@ port=system.physmem.port[0] system.cpu.l2cache.mem_side
 type=PhysicalMemory
 file=
 latency=1
+latency_var=0
+null=false
 range=0:134217727
 zero=false
 port=system.membus.port[0]

diff --git a/tests/quick/02.insttest/ref/sparc/linux/simple-timing/stdout b/tests/quick/02.insttest/ref/sparc/linux/simple-timing/stdout
index a0c51dd80885a043ab3b9c9bc41a9464004a14ce..e7f5d2afa34851a14b1f992d0cecdcdde18099a3 100644 (file)
--- a/tests/quick/02.insttest/ref/sparc/linux/simple-timing/stdout
+++ b/tests/quick/02.insttest/ref/sparc/linux/simple-timing/stdout
@@ -1,3 +1,17 @@
+M5 Simulator System
+
+Copyright (c) 2001-2008
+The Regents of The University of Michigan
+All Rights Reserved
+
+
+M5 compiled Jul 21 2008 20:33:06
+M5 started Mon Jul 21 20:33:19 2008
+M5 executing on zizzer
+M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881
+M5 commit date Tue Jul 15 14:38:51 2008 -0400
+command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/quick/02.insttest/sparc/linux/simple-timing tests/run.py quick/02.insttest/sparc/linux/simple-timing
+Global frequency set at 1000000000000 ticks per second
 Begining test of difficult SPARC instructions...
 LDSTUB:                Passed
 SWAP:          Passed
@@ -9,16 +23,4 @@ LDTX:         Passed
 LDTW:          Passed
 STTW:          Passed
 Done
-M5 Simulator System
-
-Copyright (c) 2001-2008
-The Regents of The University of Michigan
-All Rights Reserved
-
-
-M5 compiled Feb 24 2008 13:27:50
-M5 started Mon Feb 25 12:26:21 2008
-M5 executing on tater
-command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/quick/02.insttest/sparc/linux/simple-timing tests/run.py quick/02.insttest/sparc/linux/simple-timing
-Global frequency set at 1000000000000 ticks per second
 Exiting @ tick 25237000 because target called exit()

diff --git a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.ini b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.ini
index aaa49012b5cdb941fa18a7152dc52cb59a51b61a..ecab1a9a6d401396cfea7560985fe5ca7cbd419c 100644 (file)
--- a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.ini
+++ b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.ini
@@ -5,7 +5,7 @@ dummy=0
 
 [system]
 type=LinuxAlphaSystem
-children=bridge cpu0 cpu1 disk0 disk2 intrctrl iobus iocache l2c membus physmem sim_console simple_disk toL2Bus tsunami
+children=bridge cpu0 cpu1 disk0 disk2 intrctrl iobus iocache l2c membus physmem simple_disk terminal toL2Bus tsunami
 boot_cpu_frequency=500
 boot_osflags=root=/dev/hda1 console=ttyS0
 console=/dist/m5/system/binaries/console
@@ -53,7 +53,8 @@ max_loads_any_thread=0
 phase=0
 profile=0
 progress_interval=0
-simulate_stalls=false
+simulate_data_stalls=false
+simulate_inst_stalls=false
 system=system
 tracer=system.cpu0.tracer
 width=1
@@ -163,7 +164,8 @@ max_loads_any_thread=0
 phase=0
 profile=0
 progress_interval=0
-simulate_stalls=false
+simulate_data_stalls=false
+simulate_inst_stalls=false
 system=system
 tracer=system.cpu1.tracer
 width=1
@@ -300,10 +302,11 @@ type=Bus
 block_size=64
 bus_id=0
 clock=1000
+header_cycles=1
 responder_set=true
 width=64
 default=system.tsunami.pciconfig.pio
-port=system.bridge.side_a system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.console.pio system.tsunami.ide.pio system.tsunami.ethernet.pio system.iocache.cpu_side system.tsunami.ethernet.config system.tsunami.ethernet.dma system.tsunami.ide.config system.tsunami.ide.dma
+port=system.bridge.side_a system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ethernet.pio system.iocache.cpu_side system.tsunami.ethernet.config system.tsunami.ethernet.dma system.tsunami.ide.config system.tsunami.ide.dma
 
 [system.iocache]
 type=BaseCache
@@ -383,6 +386,7 @@ children=responder
 block_size=64
 bus_id=1
 clock=1000
+header_cycles=1
 responder_set=false
 width=64
 default=system.membus.responder.pio
@@ -408,18 +412,12 @@ pio=system.membus.default
 type=PhysicalMemory
 file=
 latency=1
+latency_var=0
+null=false
 range=0:134217727
 zero=false
 port=system.membus.port[1]
 
-[system.sim_console]
-type=SimConsole
-append_name=true
-intr_control=system.intrctrl
-number=0
-output=console
-port=3456
-
 [system.simple_disk]
 type=SimpleDisk
 children=disk
@@ -431,12 +429,20 @@ type=RawDiskImage
 image_file=/dist/m5/system/disks/linux-latest.img
 read_only=true
 
+[system.terminal]
+type=Terminal
+intr_control=system.intrctrl
+number=0
+output=true
+port=3456
+
 [system.toL2Bus]
 type=Bus
 children=responder
 block_size=64
 bus_id=0
 clock=1000
+header_cycles=1
 responder_set=false
 width=64
 default=system.toL2Bus.responder.pio
@@ -460,10 +466,21 @@ pio=system.toL2Bus.default
 
 [system.tsunami]
 type=Tsunami
-children=cchip console ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip pciconfig uart
+children=backdoor cchip ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip pciconfig uart
 intrctrl=system.intrctrl
 system=system
 
+[system.tsunami.backdoor]
+type=AlphaBackdoor
+cpu=system.cpu0
+disk=system.simple_disk
+pio_addr=8804682956800
+pio_latency=1000
+platform=system.tsunami
+system=system
+terminal=system.terminal
+pio=system.iobus.port[25]
+
 [system.tsunami.cchip]
 type=TsunamiCChip
 pio_addr=8803072344064
@@ -473,17 +490,6 @@ system=system
 tsunami=system.tsunami
 pio=system.iobus.port[1]
 
-[system.tsunami.console]
-type=AlphaConsole
-cpu=system.cpu0
-disk=system.simple_disk
-pio_addr=8804682956800
-pio_latency=1000
-platform=system.tsunami
-sim_console=system.sim_console
-system=system
-pio=system.iobus.port[25]
-
 [system.tsunami.ethernet]
 type=NSGigE
 BAR0=1
@@ -945,7 +951,7 @@ type=Uart8250
 pio_addr=8804615848952
 pio_latency=1000
 platform=system.tsunami
-sim_console=system.sim_console
 system=system
+terminal=system.terminal
 pio=system.iobus.port[24]
 

diff --git a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/stdout b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/stdout
index 5f45dab42bf9bd1460a78163322c88d7860ae43d..a5a0972a14a770e7eeff45cbd27c65ad869d0c73 100644 (file)
--- a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/stdout
+++ b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/stdout
@@ -1,13 +1,15 @@
 M5 Simulator System
 
-Copyright (c) 2001-2006
+Copyright (c) 2001-2008
 The Regents of The University of Michigan
 All Rights Reserved
 
 
-M5 compiled Feb 13 2008 00:33:19
-M5 started Wed Feb 13 00:38:27 2008
+M5 compiled Jul 21 2008 20:27:21
+M5 started Mon Jul 21 20:28:09 2008
 M5 executing on zizzer
+M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881
+M5 commit date Tue Jul 15 14:38:51 2008 -0400
 command line: build/ALPHA_FS/m5.fast -d build/ALPHA_FS/tests/fast/quick/10.linux-boot/alpha/linux/tsunami-simple-atomic-dual tests/run.py quick/10.linux-boot/alpha/linux/tsunami-simple-atomic-dual
 Global frequency set at 1000000000000 ticks per second
 Exiting @ tick 1870335151500 because m5_exit instruction encountered

diff --git a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.ini b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.ini
index f47a4495c857e220c7488ce6c84361135d3c220f..4ce652819570c06c90922313a95e7d077aa53018 100644 (file)
--- a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.ini
+++ b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.ini
@@ -5,7 +5,7 @@ dummy=0
 
 [system]
 type=LinuxAlphaSystem
-children=bridge cpu disk0 disk2 intrctrl iobus iocache l2c membus physmem sim_console simple_disk toL2Bus tsunami
+children=bridge cpu disk0 disk2 intrctrl iobus iocache l2c membus physmem simple_disk terminal toL2Bus tsunami
 boot_cpu_frequency=500
 boot_osflags=root=/dev/hda1 console=ttyS0
 console=/dist/m5/system/binaries/console
@@ -53,7 +53,8 @@ max_loads_any_thread=0
 phase=0
 profile=0
 progress_interval=0
-simulate_stalls=false
+simulate_data_stalls=false
+simulate_inst_stalls=false
 system=system
 tracer=system.cpu.tracer
 width=1
@@ -190,10 +191,11 @@ type=Bus
 block_size=64
 bus_id=0
 clock=1000
+header_cycles=1
 responder_set=true
 width=64
 default=system.tsunami.pciconfig.pio
-port=system.bridge.side_a system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.console.pio system.tsunami.ide.pio system.tsunami.ethernet.pio system.iocache.cpu_side system.tsunami.ethernet.config system.tsunami.ethernet.dma system.tsunami.ide.config system.tsunami.ide.dma
+port=system.bridge.side_a system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ethernet.pio system.iocache.cpu_side system.tsunami.ethernet.config system.tsunami.ethernet.dma system.tsunami.ide.config system.tsunami.ide.dma
 
 [system.iocache]
 type=BaseCache
@@ -273,6 +275,7 @@ children=responder
 block_size=64
 bus_id=1
 clock=1000
+header_cycles=1
 responder_set=false
 width=64
 default=system.membus.responder.pio
@@ -298,18 +301,12 @@ pio=system.membus.default
 type=PhysicalMemory
 file=
 latency=1
+latency_var=0
+null=false
 range=0:134217727
 zero=false
 port=system.membus.port[1]
 
-[system.sim_console]
-type=SimConsole
-append_name=true
-intr_control=system.intrctrl
-number=0
-output=console
-port=3456
-
 [system.simple_disk]
 type=SimpleDisk
 children=disk
@@ -321,12 +318,20 @@ type=RawDiskImage
 image_file=/dist/m5/system/disks/linux-latest.img
 read_only=true
 
+[system.terminal]
+type=Terminal
+intr_control=system.intrctrl
+number=0
+output=true
+port=3456
+
 [system.toL2Bus]
 type=Bus
 children=responder
 block_size=64
 bus_id=0
 clock=1000
+header_cycles=1
 responder_set=false
 width=64
 default=system.toL2Bus.responder.pio
@@ -350,10 +355,21 @@ pio=system.toL2Bus.default
 
 [system.tsunami]
 type=Tsunami
-children=cchip console ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip pciconfig uart
+children=backdoor cchip ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip pciconfig uart
 intrctrl=system.intrctrl
 system=system
 
+[system.tsunami.backdoor]
+type=AlphaBackdoor
+cpu=system.cpu
+disk=system.simple_disk
+pio_addr=8804682956800
+pio_latency=1000
+platform=system.tsunami
+system=system
+terminal=system.terminal
+pio=system.iobus.port[25]
+
 [system.tsunami.cchip]
 type=TsunamiCChip
 pio_addr=8803072344064
@@ -363,17 +379,6 @@ system=system
 tsunami=system.tsunami
 pio=system.iobus.port[1]
 
-[system.tsunami.console]
-type=AlphaConsole
-cpu=system.cpu
-disk=system.simple_disk
-pio_addr=8804682956800
-pio_latency=1000
-platform=system.tsunami
-sim_console=system.sim_console
-system=system
-pio=system.iobus.port[25]
-
 [system.tsunami.ethernet]
 type=NSGigE
 BAR0=1
@@ -835,7 +840,7 @@ type=Uart8250
 pio_addr=8804615848952
 pio_latency=1000
 platform=system.tsunami
-sim_console=system.sim_console
 system=system
+terminal=system.terminal
 pio=system.iobus.port[24]
 

diff --git a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stdout b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stdout
index 830f4d0574c5390e2947ed58f7e2dcd1effb360e..ac87850881068750aafab0839869900718ffe3ce 100644 (file)
--- a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stdout
+++ b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stdout
@@ -1,13 +1,15 @@
 M5 Simulator System
 
-Copyright (c) 2001-2006
+Copyright (c) 2001-2008
 The Regents of The University of Michigan
 All Rights Reserved
 
 
-M5 compiled Feb 13 2008 00:33:19
-M5 started Wed Feb 13 00:37:45 2008
+M5 compiled Jul 21 2008 20:27:21
+M5 started Mon Jul 21 20:27:46 2008
 M5 executing on zizzer
+M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881
+M5 commit date Tue Jul 15 14:38:51 2008 -0400
 command line: build/ALPHA_FS/m5.fast -d build/ALPHA_FS/tests/fast/quick/10.linux-boot/alpha/linux/tsunami-simple-atomic tests/run.py quick/10.linux-boot/alpha/linux/tsunami-simple-atomic
 Global frequency set at 1000000000000 ticks per second
 Exiting @ tick 1828355496000 because m5_exit instruction encountered

diff --git a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini
index 1181dac9628e0e177a41bb5e6325dd17e07fc107..459187376e18696c3732139b373d24d1604d5661 100644 (file)
--- a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini
+++ b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini
@@ -5,7 +5,7 @@ dummy=0
 
 [system]
 type=LinuxAlphaSystem
-children=bridge cpu0 cpu1 disk0 disk2 intrctrl iobus iocache l2c membus physmem sim_console simple_disk toL2Bus tsunami
+children=bridge cpu0 cpu1 disk0 disk2 intrctrl iobus iocache l2c membus physmem simple_disk terminal toL2Bus tsunami
 boot_cpu_frequency=500
 boot_osflags=root=/dev/hda1 console=ttyS0
 console=/dist/m5/system/binaries/console
@@ -300,7 +300,7 @@ header_cycles=1
 responder_set=true
 width=64
 default=system.tsunami.pciconfig.pio
-port=system.bridge.side_a system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.console.pio system.tsunami.ide.pio system.tsunami.ethernet.pio system.iocache.cpu_side system.tsunami.ethernet.config system.tsunami.ethernet.dma system.tsunami.ide.config system.tsunami.ide.dma
+port=system.bridge.side_a system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ethernet.pio system.iocache.cpu_side system.tsunami.ethernet.config system.tsunami.ethernet.dma system.tsunami.ide.config system.tsunami.ide.dma
 
 [system.iocache]
 type=BaseCache
@@ -406,18 +406,12 @@ pio=system.membus.default
 type=PhysicalMemory
 file=
 latency=1
+latency_var=0
+null=false
 range=0:134217727
 zero=false
 port=system.membus.port[1]
 
-[system.sim_console]
-type=SimConsole
-append_name=true
-intr_control=system.intrctrl
-number=0
-output=console
-port=3456
-
 [system.simple_disk]
 type=SimpleDisk
 children=disk
@@ -429,6 +423,13 @@ type=RawDiskImage
 image_file=/dist/m5/system/disks/linux-latest.img
 read_only=true
 
+[system.terminal]
+type=Terminal
+intr_control=system.intrctrl
+number=0
+output=true
+port=3456
+
 [system.toL2Bus]
 type=Bus
 children=responder
@@ -459,10 +460,21 @@ pio=system.toL2Bus.default
 
 [system.tsunami]
 type=Tsunami
-children=cchip console ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip pciconfig uart
+children=backdoor cchip ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip pciconfig uart
 intrctrl=system.intrctrl
 system=system
 
+[system.tsunami.backdoor]
+type=AlphaBackdoor
+cpu=system.cpu0
+disk=system.simple_disk
+pio_addr=8804682956800
+pio_latency=1000
+platform=system.tsunami
+system=system
+terminal=system.terminal
+pio=system.iobus.port[25]
+
 [system.tsunami.cchip]
 type=TsunamiCChip
 pio_addr=8803072344064
@@ -472,17 +484,6 @@ system=system
 tsunami=system.tsunami
 pio=system.iobus.port[1]
 
-[system.tsunami.console]
-type=AlphaConsole
-cpu=system.cpu0
-disk=system.simple_disk
-pio_addr=8804682956800
-pio_latency=1000
-platform=system.tsunami
-sim_console=system.sim_console
-system=system
-pio=system.iobus.port[25]
-
 [system.tsunami.ethernet]
 type=NSGigE
 BAR0=1
@@ -944,7 +945,7 @@ type=Uart8250
 pio_addr=8804615848952
 pio_latency=1000
 platform=system.tsunami
-sim_console=system.sim_console
 system=system
+terminal=system.terminal
 pio=system.iobus.port[24]
 

diff --git a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stdout b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stdout
index 84f4de7780b2cf534adf64d256320da70c7afdca..18467c41bf7b0a697699a5d9299e875d6f51bee4 100644 (file)
--- a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stdout
+++ b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stdout
@@ -5,9 +5,11 @@ The Regents of The University of Michigan
 All Rights Reserved
 
 
-M5 compiled Feb 27 2008 17:52:52
-M5 started Wed Feb 27 18:02:58 2008
+M5 compiled Jul 21 2008 20:27:21
+M5 started Mon Jul 21 20:27:23 2008
 M5 executing on zizzer
+M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881
+M5 commit date Tue Jul 15 14:38:51 2008 -0400
 command line: build/ALPHA_FS/m5.fast -d build/ALPHA_FS/tests/fast/quick/10.linux-boot/alpha/linux/tsunami-simple-timing-dual tests/run.py quick/10.linux-boot/alpha/linux/tsunami-simple-timing-dual
 Global frequency set at 1000000000000 ticks per second
 Exiting @ tick 1972679592000 because m5_exit instruction encountered

diff --git a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini
index 1b52231ede8c537e979f12e37adeed2a10eac671..66d96d325f26b9fa355f4edf06aa888b150eb4b7 100644 (file)
--- a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini
+++ b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini
@@ -5,7 +5,7 @@ dummy=0
 
 [system]
 type=LinuxAlphaSystem
-children=bridge cpu disk0 disk2 intrctrl iobus iocache l2c membus physmem sim_console simple_disk toL2Bus tsunami
+children=bridge cpu disk0 disk2 intrctrl iobus iocache l2c membus physmem simple_disk terminal toL2Bus tsunami
 boot_cpu_frequency=500
 boot_osflags=root=/dev/hda1 console=ttyS0
 console=/dist/m5/system/binaries/console
@@ -192,7 +192,7 @@ header_cycles=1
 responder_set=true
 width=64
 default=system.tsunami.pciconfig.pio
-port=system.bridge.side_a system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.console.pio system.tsunami.ide.pio system.tsunami.ethernet.pio system.iocache.cpu_side system.tsunami.ethernet.config system.tsunami.ethernet.dma system.tsunami.ide.config system.tsunami.ide.dma
+port=system.bridge.side_a system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ethernet.pio system.iocache.cpu_side system.tsunami.ethernet.config system.tsunami.ethernet.dma system.tsunami.ide.config system.tsunami.ide.dma
 
 [system.iocache]
 type=BaseCache
@@ -298,18 +298,12 @@ pio=system.membus.default
 type=PhysicalMemory
 file=
 latency=1
+latency_var=0
+null=false
 range=0:134217727
 zero=false
 port=system.membus.port[1]
 
-[system.sim_console]
-type=SimConsole
-append_name=true
-intr_control=system.intrctrl
-number=0
-output=console
-port=3456
-
 [system.simple_disk]
 type=SimpleDisk
 children=disk
@@ -321,6 +315,13 @@ type=RawDiskImage
 image_file=/dist/m5/system/disks/linux-latest.img
 read_only=true
 
+[system.terminal]
+type=Terminal
+intr_control=system.intrctrl
+number=0
+output=true
+port=3456
+
 [system.toL2Bus]
 type=Bus
 children=responder
@@ -351,10 +352,21 @@ pio=system.toL2Bus.default
 
 [system.tsunami]
 type=Tsunami
-children=cchip console ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip pciconfig uart
+children=backdoor cchip ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip pciconfig uart
 intrctrl=system.intrctrl
 system=system
 
+[system.tsunami.backdoor]
+type=AlphaBackdoor
+cpu=system.cpu
+disk=system.simple_disk
+pio_addr=8804682956800
+pio_latency=1000
+platform=system.tsunami
+system=system
+terminal=system.terminal
+pio=system.iobus.port[25]
+
 [system.tsunami.cchip]
 type=TsunamiCChip
 pio_addr=8803072344064
@@ -364,17 +376,6 @@ system=system
 tsunami=system.tsunami
 pio=system.iobus.port[1]
 
-[system.tsunami.console]
-type=AlphaConsole
-cpu=system.cpu
-disk=system.simple_disk
-pio_addr=8804682956800
-pio_latency=1000
-platform=system.tsunami
-sim_console=system.sim_console
-system=system
-pio=system.iobus.port[25]
-
 [system.tsunami.ethernet]
 type=NSGigE
 BAR0=1
@@ -836,7 +837,7 @@ type=Uart8250
 pio_addr=8804615848952
 pio_latency=1000
 platform=system.tsunami
-sim_console=system.sim_console
 system=system
+terminal=system.terminal
 pio=system.iobus.port[24]
 

diff --git a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stdout b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stdout
index fee547a1fb74b350eaa4240aeb05bd2b212cefb7..a429ac712e1276aeaa1268a9955f0c8baf47aa9c 100644 (file)
--- a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stdout
+++ b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stdout
@@ -5,9 +5,11 @@ The Regents of The University of Michigan
 All Rights Reserved
 
 
-M5 compiled Feb 24 2008 13:18:14
-M5 started Sun Feb 24 13:19:10 2008
-M5 executing on tater
+M5 compiled Jul 21 2008 20:27:21
+M5 started Mon Jul 21 20:28:11 2008
+M5 executing on zizzer
+M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881
+M5 commit date Tue Jul 15 14:38:51 2008 -0400
 command line: build/ALPHA_FS/m5.fast -d build/ALPHA_FS/tests/fast/quick/10.linux-boot/alpha/linux/tsunami-simple-timing tests/run.py quick/10.linux-boot/alpha/linux/tsunami-simple-timing
 Global frequency set at 1000000000000 ticks per second
 Exiting @ tick 1931639667000 because m5_exit instruction encountered

diff --git a/tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/config.ini b/tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/config.ini
index 9db92d8dc34e1737b128b0b33d721cca318f3740..a0555b3f35d0e634e8c53ba65a7e308348e5e4cb 100644 (file)
--- a/tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/config.ini
+++ b/tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/config.ini
@@ -25,7 +25,8 @@ max_loads_all_threads=0
 max_loads_any_thread=0
 phase=0
 progress_interval=0
-simulate_stalls=false
+simulate_data_stalls=false
+simulate_inst_stalls=false
 system=system
 tracer=system.cpu.tracer
 width=1
@@ -48,6 +49,8 @@ type=ExeTracer
 type=EioProcess
 chkpt=
 file=/dist/m5/regression/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz
+input=None
+max_stack_size=67108864
 output=cout
 system=system
 
@@ -56,6 +59,7 @@ type=Bus
 block_size=64
 bus_id=0
 clock=1000
+header_cycles=1
 responder_set=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
@@ -64,6 +68,8 @@ port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 type=PhysicalMemory
 file=
 latency=1
+latency_var=0
+null=false
 range=0:134217727
 zero=false
 port=system.membus.port[0]

diff --git a/tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/stdout b/tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/stdout
index fee99ba9910ef625c0f7620d7f9f7ebafc7a9252..54f73c06e54f79ee7bd648002795628eea250f4a 100644 (file)
--- a/tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/stdout
+++ b/tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/stdout
@@ -1,15 +1,17 @@
-main dictionary has 1245 entries
-49508 bytes wasted
->M5 Simulator System
+M5 Simulator System
 
-Copyright (c) 2001-2006
+Copyright (c) 2001-2008
 The Regents of The University of Michigan
 All Rights Reserved
 
 
-M5 compiled Aug 14 2007 17:58:14
-M5 started Tue Aug 14 17:58:32 2007
-M5 executing on nacho
+M5 compiled Jul 21 2008 20:12:56
+M5 started Mon Jul 21 20:16:25 2008
+M5 executing on zizzer
+M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881
+M5 commit date Tue Jul 15 14:38:51 2008 -0400
 command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/quick/20.eio-short/alpha/eio/simple-atomic tests/run.py quick/20.eio-short/alpha/eio/simple-atomic
 Global frequency set at 1000000000000 ticks per second
-Exiting @ tick 250015500 because a thread reached the max instruction count
+main dictionary has 1245 entries
+49508 bytes wasted
+>Exiting @ tick 250015500 because a thread reached the max instruction count

diff --git a/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.ini b/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.ini
index 766b954c144368a131fdebfc2f58ea5edb9fc2d8..ddf7f50b29ea846a9a6ebb5a14127e3b694b039e 100644 (file)
--- a/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.ini
+++ b/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.ini
@@ -183,6 +183,8 @@ port=system.physmem.port[0] system.cpu.l2cache.mem_side
 type=PhysicalMemory
 file=
 latency=1
+latency_var=0
+null=false
 range=0:134217727
 zero=false
 port=system.membus.port[0]

diff --git a/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/stdout b/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/stdout
index 870de60ce5ff315f762e6ae5fc854a0d75abd36b..3f3a9bccfa9761ff25d4b869de507710cfba7fc8 100644 (file)
--- a/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/stdout
+++ b/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/stdout
@@ -1,15 +1,17 @@
-main dictionary has 1245 entries
-49508 bytes wasted
->M5 Simulator System
+M5 Simulator System
 
 Copyright (c) 2001-2008
 The Regents of The University of Michigan
 All Rights Reserved
 
 
-M5 compiled Feb 24 2008 12:58:20
-M5 started Sun Feb 24 12:58:24 2008
-M5 executing on tater
+M5 compiled Jul 21 2008 20:12:56
+M5 started Mon Jul 21 20:18:02 2008
+M5 executing on zizzer
+M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881
+M5 commit date Tue Jul 15 14:38:51 2008 -0400
 command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/quick/20.eio-short/alpha/eio/simple-timing tests/run.py quick/20.eio-short/alpha/eio/simple-timing
 Global frequency set at 1000000000000 ticks per second
-Exiting @ tick 707548000 because a thread reached the max instruction count
+main dictionary has 1245 entries
+49508 bytes wasted
+>Exiting @ tick 707548000 because a thread reached the max instruction count

diff --git a/tests/quick/50.memtest/ref/alpha/linux/memtest/config.ini b/tests/quick/50.memtest/ref/alpha/linux/memtest/config.ini
index e04a78cce08a7e9b80ac9267f47eeff093907bac..1a7e3807d419b3f480d78fb77198902742a9ccf9 100644 (file)
--- a/tests/quick/50.memtest/ref/alpha/linux/memtest/config.ini
+++ b/tests/quick/50.memtest/ref/alpha/linux/memtest/config.ini
@@ -429,6 +429,8 @@ mem_side=system.toL2Bus.port[8]
 type=PhysicalMemory
 file=
 latency=1
+latency_var=0
+null=false
 range=0:134217727
 zero=false
 port=system.cpu0.functional system.cpu1.functional system.cpu2.functional system.cpu3.functional system.cpu4.functional system.cpu5.functional system.cpu6.functional system.cpu7.functional
@@ -483,6 +485,8 @@ port=system.l2c.mem_side system.physmem.port[0]
 type=PhysicalMemory
 file=
 latency=1
+latency_var=0
+null=false
 range=0:134217727
 zero=false
 port=system.membus.port[1]

diff --git a/tests/quick/50.memtest/ref/alpha/linux/memtest/stdout b/tests/quick/50.memtest/ref/alpha/linux/memtest/stdout
index 3088b7501b1c29a90e9dbb3f0b6fdd79307add33..d0d9bd67dde74c1914392c8b5e6e67a9d39ed46f 100644 (file)
--- a/tests/quick/50.memtest/ref/alpha/linux/memtest/stdout
+++ b/tests/quick/50.memtest/ref/alpha/linux/memtest/stdout
@@ -5,9 +5,11 @@ The Regents of The University of Michigan
 All Rights Reserved
 
 
-M5 compiled Feb 27 2008 17:52:16
-M5 started Wed Feb 27 17:56:37 2008
+M5 compiled Jul 21 2008 20:12:56
+M5 started Mon Jul 21 20:18:03 2008
 M5 executing on zizzer
+M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881
+M5 commit date Tue Jul 15 14:38:51 2008 -0400
 command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/quick/50.memtest/alpha/linux/memtest tests/run.py quick/50.memtest/alpha/linux/memtest
 Global frequency set at 1000000000000 ticks per second
 Exiting @ tick 113467820 because maximum number of loads reached

diff --git a/tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.ini b/tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.ini
index 8acd4fb85b64218149607dd06616182236ba5727..5ae2e325dc2b7c7b4a881eee1370f32626470575 100644 (file)
--- a/tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.ini
+++ b/tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.ini
@@ -14,7 +14,7 @@ kernel=/dist/m5/system/binaries/vmlinux
 mem_mode=atomic
 pal=/dist/m5/system/binaries/ts_osfpal
 physmem=drivesys.physmem
-readfile=/.automount/zeep/y/binkertn/work/m5/work/configs/boot/netperf-server.rcS
+readfile=/z/binkertn/regress/m5/configs/boot/netperf-server.rcS
 symbolfile=
 system_rev=1024
 system_type=34
@@ -53,7 +53,8 @@ max_loads_any_thread=0
 phase=0
 profile=0
 progress_interval=0
-simulate_stalls=false
+simulate_data_stalls=false
+simulate_inst_stalls=false
 system=drivesys
 tracer=drivesys.cpu.tracer
 width=1
@@ -697,7 +698,7 @@ kernel=/dist/m5/system/binaries/vmlinux
 mem_mode=atomic
 pal=/dist/m5/system/binaries/ts_osfpal
 physmem=testsys.physmem
-readfile=/.automount/zeep/y/binkertn/work/m5/work/configs/boot/netperf-stream-client.rcS
+readfile=/z/binkertn/regress/m5/configs/boot/netperf-stream-client.rcS
 symbolfile=
 system_rev=1024
 system_type=34
@@ -736,7 +737,8 @@ max_loads_any_thread=0
 phase=0
 profile=0
 progress_interval=0
-simulate_stalls=false
+simulate_data_stalls=false
+simulate_inst_stalls=false
 system=testsys
 tracer=testsys.cpu.tracer
 width=1

diff --git a/tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/stdout b/tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/stdout
index bc3aa034b64bc26e88deb80d4df750290019d738..c137b03cf4c38dd699907cf5bd0b2ffdf16a14c8 100644 (file)
--- a/tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/stdout
+++ b/tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/stdout
@@ -5,13 +5,11 @@ The Regents of The University of Michigan
 All Rights Reserved
 
 
-M5 compiled Jun 18 2008 01:24:58
-M5 started Wed Jun 18 09:39:49 2008
+M5 compiled Jul 21 2008 20:27:21
+M5 started Mon Jul 21 20:27:45 2008
 M5 executing on zizzer
-M5 revision 5485:840f91d062a9bd9c980e5959005329c3ed1bc82e
-M5 commit date Tue Jun 17 22:22:44 2008 -0700
-command line: /n/zeep/y/binkertn/build/work/build/ALPHA_FS/m5.opt -d /n/zeep/y/binkertn/build/work/build/ALPHA_FS/tests/opt/quick/80.netperf-stream/alpha/linux/twosys-tsunami-simple-atomic tests/run.py quick/80.netperf-stream/alpha/linux/twosys-tsunami-simple-atomic
+M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881
+M5 commit date Tue Jul 15 14:38:51 2008 -0400
+command line: build/ALPHA_FS/m5.fast -d build/ALPHA_FS/tests/fast/quick/80.netperf-stream/alpha/linux/twosys-tsunami-simple-atomic tests/run.py quick/80.netperf-stream/alpha/linux/twosys-tsunami-simple-atomic
 Global frequency set at 1000000000000 ticks per second
-      0: testsys.tsunami.io.rtc: Real-time clock set to Thu Jan  1 00:00:00 2009
-      0: drivesys.tsunami.io.rtc: Real-time clock set to Thu Jan  1 00:00:00 2009
 Exiting @ tick 4300235844056 because checkpoint