Remember global declarations and defines accross read_verilog calls

diff --git a/frontends/ast/ast.cc b/frontends/ast/ast.cc
index 92513a2443ee247c491df5c7ceaaa4e92c57efd5..5b4a4af4762f1d800a2706cc845bc844ff2c57b5 100644 (file)
--- a/frontends/ast/ast.cc
+++ b/frontends/ast/ast.cc
@@ -1016,14 +1016,12 @@ void AST::process(RTLIL::Design *design, AstNode *ast, bool dump_ast1, bool dump
        flag_icells = icells;
        flag_autowire = autowire;
 
-       std::vector<AstNode*> global_decls;
-
        log_assert(current_ast->type == AST_DESIGN);
        for (auto it = current_ast->children.begin(); it != current_ast->children.end(); it++)
        {
                if ((*it)->type == AST_MODULE)
                {
-                       for (auto n : global_decls)
+                       for (auto n : design->verilog_globals)
                                (*it)->children.push_back(n->clone());
 
                        for (auto n : design->verilog_packages){
@@ -1054,7 +1052,7 @@ void AST::process(RTLIL::Design *design, AstNode *ast, bool dump_ast1, bool dump
                else if ((*it)->type == AST_PACKAGE)
                        design->verilog_packages.push_back((*it)->clone());
                else
-                       global_decls.push_back(*it);
+                       design->verilog_globals.push_back((*it)->clone());
        }
 }
 

diff --git a/frontends/verilog/preproc.cc b/frontends/verilog/preproc.cc
index 997920b896fe25625d5316e770e71827c6d2e126..0c6cfc6ac893ac7af2c35c562f340e932c4d1333 100644 (file)
--- a/frontends/verilog/preproc.cc
+++ b/frontends/verilog/preproc.cc
@@ -210,7 +210,8 @@ static void input_file(std::istream &f, std::string filename)
        input_buffer.insert(it, "\n`file_pop\n");
 }
 
-std::string frontend_verilog_preproc(std::istream &f, std::string filename, const std::map<std::string, std::string> pre_defines_map, const std::list<std::string> include_dirs)
+std::string frontend_verilog_preproc(std::istream &f, std::string filename, const std::map<std::string, std::string> &pre_defines_map,
+               dict<std::string, std::pair<std::string, bool>> &global_defines_cache, const std::list<std::string> &include_dirs)
 {
        std::set<std::string> defines_with_args;
        std::map<std::string, std::string> defines_map(pre_defines_map);
@@ -222,9 +223,19 @@ std::string frontend_verilog_preproc(std::istream &f, std::string filename, cons
        input_buffer_charp = 0;
 
        input_file(f, filename);
+
        defines_map["YOSYS"] = "1";
        defines_map[formal_mode ? "FORMAL" : "SYNTHESIS"] = "1";
 
+       for (auto &it : pre_defines_map)
+               defines_map[it.first] = it.second;
+
+       for (auto &it : global_defines_cache) {
+               if (it.second.second)
+                       defines_with_args.insert(it.first);
+               defines_map[it.first] = it.second.first;
+       }
+
        while (!input_buffer.empty())
        {
                std::string tok = next_token();
@@ -379,6 +390,7 @@ std::string frontend_verilog_preproc(std::istream &f, std::string filename, cons
                                defines_with_args.insert(name);
                        else
                                defines_with_args.erase(name);
+                       global_defines_cache[name] = std::pair<std::string, bool>(value, state == 2);
                        continue;
                }
 
@@ -389,6 +401,7 @@ std::string frontend_verilog_preproc(std::istream &f, std::string filename, cons
                        // printf("undef: >>%s<<\n", name.c_str());
                        defines_map.erase(name);
                        defines_with_args.erase(name);
+                       global_defines_cache.erase(name);
                        continue;
                }
 

diff --git a/frontends/verilog/verilog_frontend.cc b/frontends/verilog/verilog_frontend.cc
index 894723c85e2547541d160ba439ac30073908a0b6..3c9ed7ee3e97d3e80f619535fae1ff2b9decaebd 100644 (file)
--- a/frontends/verilog/verilog_frontend.cc
+++ b/frontends/verilog/verilog_frontend.cc
@@ -345,7 +345,7 @@ struct VerilogFrontend : public Frontend {
                std::string code_after_preproc;
 
                if (!flag_nopp) {
-                       code_after_preproc = frontend_verilog_preproc(*f, filename, defines_map, include_dirs);
+                       code_after_preproc = frontend_verilog_preproc(*f, filename, defines_map, design->verilog_defines, include_dirs);
                        if (flag_ppdump)
                                log("-- Verilog code after preprocessor --\n%s-- END OF DUMP --\n", code_after_preproc.c_str());
                        lexin = new std::istringstream(code_after_preproc);

diff --git a/frontends/verilog/verilog_frontend.h b/frontends/verilog/verilog_frontend.h
index 606ec20a2529d22d2b3d9b9246479e4391db9c5b..16edc79855b34ea73c8a7f4c79d650c7b3b21783 100644 (file)
--- a/frontends/verilog/verilog_frontend.h
+++ b/frontends/verilog/verilog_frontend.h
@@ -68,7 +68,8 @@ namespace VERILOG_FRONTEND
 }
 
 // the pre-processor
-std::string frontend_verilog_preproc(std::istream &f, std::string filename, const std::map<std::string, std::string> pre_defines_map, const std::list<std::string> include_dirs);
+std::string frontend_verilog_preproc(std::istream &f, std::string filename, const std::map<std::string, std::string> &pre_defines_map,
+               dict<std::string, std::pair<std::string, bool>> &global_defines_cache, const std::list<std::string> &include_dirs);
 
 YOSYS_NAMESPACE_END
 

diff --git a/kernel/rtlil.cc b/kernel/rtlil.cc
index 66bbf0427bb01e4c3db41541d53d767e5147f3e6..7693e3052105525f51c5522257214532729a351e 100644 (file)
--- a/kernel/rtlil.cc
+++ b/kernel/rtlil.cc
@@ -306,6 +306,8 @@ RTLIL::Design::~Design()
                delete it->second;
        for (auto n : verilog_packages)
                delete n;
+       for (auto n : verilog_globals)
+               delete n;
 }
 
 RTLIL::ObjRange<RTLIL::Module*> RTLIL::Design::modules()

diff --git a/kernel/rtlil.h b/kernel/rtlil.h
index 9430dcb3668db1b76d3ea6a16abd3f53efcfc582..8dd8fcca3aae341113ac0715bfe87f8e51e2f2d4 100644 (file)
--- a/kernel/rtlil.h
+++ b/kernel/rtlil.h
@@ -793,7 +793,8 @@ struct RTLIL::Design
 
        int refcount_modules_;
        dict<RTLIL::IdString, RTLIL::Module*> modules_;
-       std::vector<AST::AstNode*> verilog_packages;
+       std::vector<AST::AstNode*> verilog_packages, verilog_globals;
+       dict<std::string, std::pair<std::string, bool>> verilog_defines;
 
        std::vector<RTLIL::Selection> selection_stack;
        dict<RTLIL::IdString, RTLIL::Selection> selection_vars;