+2008-07-14 Jie Zhang <jie.zhang@analog.com>
+
+ * gas/bfin/{bit2.s, cache2.s, control_code2.s, event2.s,
+ logical2.s, move2.s, parallel.s, parallel2.s, parallel3.s,
+ parallel4.s, shift2.s, stack2.s, video2.s}: Remove DOS line
+ endings.
+
2008-07-10 Richard Sandiford <rdsandiford@googlemail.com>
* gas/mips/mips16-vis-1.d, gas/mips/mips16-vis-1.s: New tests.
-\r
-.EXTERN MY_LABEL2;\r
-.section .text;\r
-\r
-//\r
-//8 BIT OPERATIONS\r
-//\r
-\r
-//BITCLR ( Dreg , uimm5 ) ; /* (a) */\r
-BITCLR ( R7 , 0 ) ;\r
-BITCLR ( R7 , 31 ) ;\r
-BITCLR ( R7 , 15 ) ;\r
-BITCLR ( R1 , 0 ) ;\r
-BITCLR ( R2 , 1 ) ;\r
-BITCLR ( R3 , 19 ) ;\r
-\r
-//BITSET ( Dreg , uimm5 ) ; /* (a) */\r
-BITSET ( R7 , 0 ) ;\r
-BITSET ( R7 , 31 ) ;\r
-BITSET ( R7 , 15 ) ;\r
-BITSET ( R1 , 0 ) ;\r
-BITSET ( R2 , 1 ) ;\r
-BITSET ( R3 , 19 ) ;\r
-\r
-//BITTGL ( Dreg , uimm5 ) ; /* (a) */\r
-BITTGL ( R7 , 0 ) ;\r
-BITTGL ( R7 , 31 ) ;\r
-BITTGL ( R7 , 15 ) ;\r
-BITTGL ( R1 , 0 ) ;\r
-BITTGL ( R2 , 1 ) ;\r
-BITTGL ( R3 , 19 ) ;\r
-\r
-//CC = BITTST ( Dreg , uimm5 ) ; /* set CC if bit = 1 (a)*/\r
-CC = BITTST ( R7 , 0 ) ;\r
-CC = BITTST ( R7 , 31 ) ;\r
-CC = BITTST ( R7 , 15 ) ;\r
-CC = BITTST ( R1 , 0 ) ;\r
-CC = BITTST ( R2 , 1 ) ;\r
-CC = BITTST ( R3 , 19 ) ;\r
-\r
-//CC = ! BITTST ( Dreg , uimm5 ) ; /* set CC if bit = 0 (a)*/\r
-CC = !BITTST ( R7 , 0 ) ;\r
-CC = !BITTST ( R7 , 31 ) ;\r
-CC = !BITTST ( R7 , 15 ) ;\r
-CC = !BITTST ( R1 , 0 ) ;\r
-CC = !BITTST ( R2 , 1 ) ;\r
-CC = !BITTST ( R3 , 19 ) ;\r
-\r
-//Dreg = DEPOSIT ( Dreg, Dreg ) ; /* no extension (b) */\r
-R7 = DEPOSIT(R0, R1);\r
-R7 = DEPOSIT(R7, R1);\r
-R7 = DEPOSIT(R7, R7);\r
-R1 = DEPOSIT(R0, R1);\r
-R2 = DEPOSIT(R7, R1);\r
-R3 = DEPOSIT(R7, R7);\r
-\r
-//Dreg = DEPOSIT ( Dreg, Dreg ) (X) ; /* sign-extended (b) */\r
-R7 = DEPOSIT(R0, R1)(X);\r
-R7 = DEPOSIT(R7, R1)(X);\r
-R7 = DEPOSIT(R7, R7)(X);\r
-R1 = DEPOSIT(R0, R1)(X);\r
-R2 = DEPOSIT(R7, R1)(X);\r
-R3 = DEPOSIT(R7, R7)(X);\r
-\r
-//Dreg = EXTRACT ( Dreg, Dreg_lo ) (Z) ; /* zero-extended (b)*/\r
-R7 = EXTRACT(R0, R1.L)(Z);\r
-R7 = EXTRACT(R7, R1.L)(Z);\r
-R7 = EXTRACT(R7, R7.L)(Z);\r
-R1 = EXTRACT(R0, R1.L)(Z);\r
-R2 = EXTRACT(R7, R1.L)(Z);\r
-R3 = EXTRACT(R7, R7.L)(Z);\r
-\r
-//Dreg = EXTRACT ( Dreg, Dreg_lo ) (X) ; /* sign-extended (b)*/\r
-R7 = EXTRACT(R0, R1.L)(X);\r
-R7 = EXTRACT(R7, R1.L)(X);\r
-R7 = EXTRACT(R7, R7.L)(X);\r
-R1 = EXTRACT(R0, R1.L)(X);\r
-R2 = EXTRACT(R7, R1.L)(X);\r
-R3 = EXTRACT(R7, R7.L)(X);\r
-\r
-//BITMUX ( Dreg , Dreg , A0 ) (ASR) ; /* shift right, LSB is shifted out (b) */\r
-BITMUX(R0, R1, A0)(ASR);\r
-BITMUX(R0, R2, A0)(ASR);\r
-BITMUX(R1, R3, A0)(ASR);\r
-//BITMUX(R0, R0, A0)(ASR);\r
-\r
-//BITMUX ( Dreg , Dreg , A0 ) (ASL) ; /* shift left, MSB is shifted out (b) */\r
-//BITMUX(R0, R0, A0)(ASL);\r
-BITMUX(R0, R1, A0)(ASL);\r
-BITMUX(R1, R2, A0)(ASL);\r
-\r
-//Dreg_lo = ONES Dreg ; /* (b) */\r
-R0.L = ONES R0;\r
-R0.L = ONES R1;\r
-R1.L = ONES R6;\r
-R2.L = ONES R7;\r
-\r
-\r
+
+.EXTERN MY_LABEL2;
+.section .text;
+
+//
+//8 BIT OPERATIONS
+//
+
+//BITCLR ( Dreg , uimm5 ) ; /* (a) */
+BITCLR ( R7 , 0 ) ;
+BITCLR ( R7 , 31 ) ;
+BITCLR ( R7 , 15 ) ;
+BITCLR ( R1 , 0 ) ;
+BITCLR ( R2 , 1 ) ;
+BITCLR ( R3 , 19 ) ;
+
+//BITSET ( Dreg , uimm5 ) ; /* (a) */
+BITSET ( R7 , 0 ) ;
+BITSET ( R7 , 31 ) ;
+BITSET ( R7 , 15 ) ;
+BITSET ( R1 , 0 ) ;
+BITSET ( R2 , 1 ) ;
+BITSET ( R3 , 19 ) ;
+
+//BITTGL ( Dreg , uimm5 ) ; /* (a) */
+BITTGL ( R7 , 0 ) ;
+BITTGL ( R7 , 31 ) ;
+BITTGL ( R7 , 15 ) ;
+BITTGL ( R1 , 0 ) ;
+BITTGL ( R2 , 1 ) ;
+BITTGL ( R3 , 19 ) ;
+
+//CC = BITTST ( Dreg , uimm5 ) ; /* set CC if bit = 1 (a)*/
+CC = BITTST ( R7 , 0 ) ;
+CC = BITTST ( R7 , 31 ) ;
+CC = BITTST ( R7 , 15 ) ;
+CC = BITTST ( R1 , 0 ) ;
+CC = BITTST ( R2 , 1 ) ;
+CC = BITTST ( R3 , 19 ) ;
+
+//CC = ! BITTST ( Dreg , uimm5 ) ; /* set CC if bit = 0 (a)*/
+CC = !BITTST ( R7 , 0 ) ;
+CC = !BITTST ( R7 , 31 ) ;
+CC = !BITTST ( R7 , 15 ) ;
+CC = !BITTST ( R1 , 0 ) ;
+CC = !BITTST ( R2 , 1 ) ;
+CC = !BITTST ( R3 , 19 ) ;
+
+//Dreg = DEPOSIT ( Dreg, Dreg ) ; /* no extension (b) */
+R7 = DEPOSIT(R0, R1);
+R7 = DEPOSIT(R7, R1);
+R7 = DEPOSIT(R7, R7);
+R1 = DEPOSIT(R0, R1);
+R2 = DEPOSIT(R7, R1);
+R3 = DEPOSIT(R7, R7);
+
+//Dreg = DEPOSIT ( Dreg, Dreg ) (X) ; /* sign-extended (b) */
+R7 = DEPOSIT(R0, R1)(X);
+R7 = DEPOSIT(R7, R1)(X);
+R7 = DEPOSIT(R7, R7)(X);
+R1 = DEPOSIT(R0, R1)(X);
+R2 = DEPOSIT(R7, R1)(X);
+R3 = DEPOSIT(R7, R7)(X);
+
+//Dreg = EXTRACT ( Dreg, Dreg_lo ) (Z) ; /* zero-extended (b)*/
+R7 = EXTRACT(R0, R1.L)(Z);
+R7 = EXTRACT(R7, R1.L)(Z);
+R7 = EXTRACT(R7, R7.L)(Z);
+R1 = EXTRACT(R0, R1.L)(Z);
+R2 = EXTRACT(R7, R1.L)(Z);
+R3 = EXTRACT(R7, R7.L)(Z);
+
+//Dreg = EXTRACT ( Dreg, Dreg_lo ) (X) ; /* sign-extended (b)*/
+R7 = EXTRACT(R0, R1.L)(X);
+R7 = EXTRACT(R7, R1.L)(X);
+R7 = EXTRACT(R7, R7.L)(X);
+R1 = EXTRACT(R0, R1.L)(X);
+R2 = EXTRACT(R7, R1.L)(X);
+R3 = EXTRACT(R7, R7.L)(X);
+
+//BITMUX ( Dreg , Dreg , A0 ) (ASR) ; /* shift right, LSB is shifted out (b) */
+BITMUX(R0, R1, A0)(ASR);
+BITMUX(R0, R2, A0)(ASR);
+BITMUX(R1, R3, A0)(ASR);
+//BITMUX(R0, R0, A0)(ASR);
+
+//BITMUX ( Dreg , Dreg , A0 ) (ASL) ; /* shift left, MSB is shifted out (b) */
+//BITMUX(R0, R0, A0)(ASL);
+BITMUX(R0, R1, A0)(ASL);
+BITMUX(R1, R2, A0)(ASL);
+
+//Dreg_lo = ONES Dreg ; /* (b) */
+R0.L = ONES R0;
+R0.L = ONES R1;
+R1.L = ONES R6;
+R2.L = ONES R7;
+
+
-\r
-.EXTERN MY_LABEL2;\r
-.section .text;\r
-\r
-//\r
-//12 CACHE CONTROL\r
-//\r
-\r
-//PREFETCH [ Preg ] ; /* indexed (a) */\r
-PREFETCH [ P0 ] ;\r
-PREFETCH [ P1 ] ;\r
-PREFETCH [ P2 ] ;\r
-PREFETCH [ P3 ] ;\r
-PREFETCH [ P4 ] ;\r
-PREFETCH [ P5 ] ;\r
-PREFETCH [ SP ] ;\r
-PREFETCH [ FP ] ;\r
-\r
-//PREFETCH [ Preg ++ ] ; /* indexed, post increment (a) */\r
-PREFETCH [ P0++ ] ;\r
-PREFETCH [ P1++ ] ;\r
-PREFETCH [ P2++ ] ;\r
-PREFETCH [ P3++ ] ;\r
-PREFETCH [ P4++ ] ;\r
-PREFETCH [ P5++ ] ;\r
-PREFETCH [ SP++ ] ;\r
-PREFETCH [ FP++ ] ;\r
-\r
-//FLUSH [ Preg ] ; /* indexed (a) */\r
-FLUSH [ P0 ] ;\r
-FLUSH [ P1 ] ;\r
-FLUSH [ P2 ] ;\r
-FLUSH [ P3 ] ;\r
-FLUSH [ P4 ] ;\r
-FLUSH [ P5 ] ;\r
-FLUSH [ SP ] ;\r
-FLUSH [ FP ] ;\r
-//FLUSH [ Preg ++ ] ; /* indexed, post increment (a) */\r
-FLUSH [ P0++ ] ;\r
-FLUSH [ P1++ ] ;\r
-FLUSH [ P2++ ] ;\r
-FLUSH [ P3++ ] ;\r
-FLUSH [ P4++ ] ;\r
-FLUSH [ P5++ ] ;\r
-FLUSH [ SP++ ] ;\r
-FLUSH [ FP++ ] ;\r
-\r
-//FLUSHINV [ Preg ] ; /* indexed (a) */\r
-FLUSHINV [ P0 ] ;\r
-FLUSHINV [ P1 ] ;\r
-FLUSHINV [ P2 ] ;\r
-FLUSHINV [ P3 ] ;\r
-FLUSHINV [ P4 ] ;\r
-FLUSHINV [ P5 ] ;\r
-FLUSHINV [ SP ] ;\r
-FLUSHINV [ FP ] ;\r
-\r
-//FLUSHINV [ Preg ++ ] ; /* indexed, post increment (a) */\r
-FLUSHINV [ P0++ ] ;\r
-FLUSHINV [ P1++ ] ;\r
-FLUSHINV [ P2++ ] ;\r
-FLUSHINV [ P3++ ] ;\r
-FLUSHINV [ P4++ ] ;\r
-FLUSHINV [ P5++ ] ;\r
-FLUSHINV [ SP++ ] ;\r
-FLUSHINV [ FP++ ] ;\r
-\r
-//IFLUSH [ Preg ] ; /* indexed (a) */\r
-IFLUSH [ P0 ] ;\r
-IFLUSH [ P1 ] ;\r
-IFLUSH [ P2 ] ;\r
-IFLUSH [ P3 ] ;\r
-IFLUSH [ P4 ] ;\r
-IFLUSH [ P5 ] ;\r
-IFLUSH [ SP ] ;\r
-IFLUSH [ FP ] ;\r
-\r
-//IFLUSH [ Preg ++ ] ; /* indexed, post increment (a) */\r
-IFLUSH [ P0++ ] ;\r
-IFLUSH [ P1++ ] ;\r
-IFLUSH [ P2++ ] ;\r
-IFLUSH [ P3++ ] ;\r
-IFLUSH [ P4++ ] ;\r
-IFLUSH [ P5++ ] ;\r
-IFLUSH [ SP++ ] ;\r
-IFLUSH [ FP++ ] ;\r
+
+.EXTERN MY_LABEL2;
+.section .text;
+
+//
+//12 CACHE CONTROL
+//
+
+//PREFETCH [ Preg ] ; /* indexed (a) */
+PREFETCH [ P0 ] ;
+PREFETCH [ P1 ] ;
+PREFETCH [ P2 ] ;
+PREFETCH [ P3 ] ;
+PREFETCH [ P4 ] ;
+PREFETCH [ P5 ] ;
+PREFETCH [ SP ] ;
+PREFETCH [ FP ] ;
+
+//PREFETCH [ Preg ++ ] ; /* indexed, post increment (a) */
+PREFETCH [ P0++ ] ;
+PREFETCH [ P1++ ] ;
+PREFETCH [ P2++ ] ;
+PREFETCH [ P3++ ] ;
+PREFETCH [ P4++ ] ;
+PREFETCH [ P5++ ] ;
+PREFETCH [ SP++ ] ;
+PREFETCH [ FP++ ] ;
+
+//FLUSH [ Preg ] ; /* indexed (a) */
+FLUSH [ P0 ] ;
+FLUSH [ P1 ] ;
+FLUSH [ P2 ] ;
+FLUSH [ P3 ] ;
+FLUSH [ P4 ] ;
+FLUSH [ P5 ] ;
+FLUSH [ SP ] ;
+FLUSH [ FP ] ;
+//FLUSH [ Preg ++ ] ; /* indexed, post increment (a) */
+FLUSH [ P0++ ] ;
+FLUSH [ P1++ ] ;
+FLUSH [ P2++ ] ;
+FLUSH [ P3++ ] ;
+FLUSH [ P4++ ] ;
+FLUSH [ P5++ ] ;
+FLUSH [ SP++ ] ;
+FLUSH [ FP++ ] ;
+
+//FLUSHINV [ Preg ] ; /* indexed (a) */
+FLUSHINV [ P0 ] ;
+FLUSHINV [ P1 ] ;
+FLUSHINV [ P2 ] ;
+FLUSHINV [ P3 ] ;
+FLUSHINV [ P4 ] ;
+FLUSHINV [ P5 ] ;
+FLUSHINV [ SP ] ;
+FLUSHINV [ FP ] ;
+
+//FLUSHINV [ Preg ++ ] ; /* indexed, post increment (a) */
+FLUSHINV [ P0++ ] ;
+FLUSHINV [ P1++ ] ;
+FLUSHINV [ P2++ ] ;
+FLUSHINV [ P3++ ] ;
+FLUSHINV [ P4++ ] ;
+FLUSHINV [ P5++ ] ;
+FLUSHINV [ SP++ ] ;
+FLUSHINV [ FP++ ] ;
+
+//IFLUSH [ Preg ] ; /* indexed (a) */
+IFLUSH [ P0 ] ;
+IFLUSH [ P1 ] ;
+IFLUSH [ P2 ] ;
+IFLUSH [ P3 ] ;
+IFLUSH [ P4 ] ;
+IFLUSH [ P5 ] ;
+IFLUSH [ SP ] ;
+IFLUSH [ FP ] ;
+
+//IFLUSH [ Preg ++ ] ; /* indexed, post increment (a) */
+IFLUSH [ P0++ ] ;
+IFLUSH [ P1++ ] ;
+IFLUSH [ P2++ ] ;
+IFLUSH [ P3++ ] ;
+IFLUSH [ P4++ ] ;
+IFLUSH [ P5++ ] ;
+IFLUSH [ SP++ ] ;
+IFLUSH [ FP++ ] ;
-\r
-.EXTERN MY_LABEL2;\r
-.section .text;\r
-\r
-//\r
-//6 CONTROL CODE BIT MANAGEMENT\r
-//\r
-\r
-//CC = Dreg == Dreg ; /* equal, register, signed (a) */\r
-CC = R7 == R0;\r
-CC = R6 == R1;\r
-CC = R0 == R7;\r
-\r
-//CC = Dreg == imm3 ; /* equal, immediate, signed (a) */\r
-CC = R7 == -4;\r
-CC = R7 == 3;\r
-CC = R0 == -4;\r
-CC = R0 == 3;\r
-\r
-//CC = Dreg < Dreg ; /* less than, register, signed (a) */\r
-CC = R7 < R0;\r
-CC = R6 < R0;\r
-CC = R7 < R1;\r
-CC = R1 < R7;\r
-CC = R0 < R6;\r
-\r
-//CC = Dreg < imm3 ; /* less than, immediate, signed (a) */\r
-CC = R7 < -4;\r
-CC = R6 < -4;\r
-CC = R7 < 3;\r
-CC = R1 < 3;\r
-\r
-//CC = Dreg <= Dreg ; /* less than or equal, register, signed (a) */\r
-CC = R7 <= R0;\r
-CC = R6 <= R0;\r
-CC = R7 <= R1;\r
-CC = R1 <= R7;\r
-CC = R0 <= R6;\r
-\r
-//CC = Dreg <= imm3 ; /* less than or equal, immediate, signed (a) */\r
-CC = R7 <= -4;\r
-CC = R6 <= -4;\r
-CC = R7 <= 3;\r
-CC = R1 <= 3;\r
-\r
-//CC = Dreg < Dreg (IU) ; /* less than, register, unsigned (a) */\r
-CC = R7 < R0(IU);\r
-CC = R6 < R0(IU);\r
-CC = R7 < R1(IU);\r
-CC = R1 < R7(IU);\r
-CC = R0 < R6(IU);\r
-\r
-//CC = Dreg < uimm3 (IU) ; /* less than, immediate, unsigned (a) */\r
-CC = R7 < 0(IU);\r
-CC = R6 < 0(IU);\r
-CC = R7 < 7(IU);\r
-CC = R1 < 7(IU);\r
-//CC = Dreg <= Dreg (IU) ; /* less than or equal, register, unsigned (a) */\r
-CC = R7 <= R0(IU);\r
-CC = R6 <= R0(IU);\r
-CC = R7 <= R1(IU);\r
-CC = R1 <= R7(IU);\r
-CC = R0 <= R6(IU);\r
-\r
-\r
-//CC = Dreg <= uimm3 (IU) ; /* less than or equal, immediate unsigned (a) */\r
-CC = R7 <= 0(IU);\r
-CC = R6 <= 0(IU);\r
-CC = R7 <= 7(IU);\r
-CC = R1 <= 7(IU);\r
-\r
-//CC = Preg == Preg ; /* equal, register, signed (a) */\r
-CC = P5 == P0;\r
-CC = P5 == P1;\r
-CC = P0 == P2;\r
-CC = P3 == P5;\r
-\r
-//CC = Preg == imm3 ; /* equal, immediate, signed (a) */\r
-CC = P5 == -4;\r
-CC = P5 == 0;\r
-CC = P5 == 3;\r
-CC = P2 == -4;\r
-CC = P2 == 0;\r
-CC = P2 == 3;\r
-\r
-//CC = Preg < Preg ; /* less than, register, signed (a) */\r
-CC = P5 < P0;\r
-CC = P5 < P1;\r
-CC = P0 < P2;\r
-CC = P3 < P5;\r
-\r
-//CC = Preg < imm3 ; /* less than, immediate, signed (a) */\r
-CC = P5 < -4;\r
-CC = P5 < 0;\r
-CC = P5 < 3;\r
-CC = P2 < -4;\r
-CC = P2 < 0;\r
-CC = P2 < 3;\r
-\r
-\r
-//CC = Preg <= Preg ; /* less than or equal, register, signed (a) */\r
-CC = P5 <= P0;\r
-CC = P5 <= P1;\r
-CC = P0 <= P2;\r
-CC = P3 <= P5;\r
-\r
-//CC = Preg <= imm3 ; /* less than or equal, immediate, signed (a) */\r
-CC = P5 <= -4;\r
-CC = P5 <= 0;\r
-CC = P5 <= 3;\r
-CC = P2 <= -4;\r
-CC = P2 <= 0;\r
-CC = P2 <= 3;\r
-\r
-//CC = Preg < Preg (IU) ; /* less than, register, unsigned (a) */\r
-CC = P5 < P0(IU);\r
-CC = P5 < P1(IU);\r
-CC = P0 < P2(IU);\r
-CC = P3 < P5(IU);\r
-\r
-//CC = Preg < uimm3 (IU) ; /* less than, immediate, unsigned (a) */\r
-CC = P5 < 0(IU);\r
-CC = P5 < 7(IU);\r
-CC = P2 < 0(IU);\r
-CC = P2 < 7(IU);\r
-\r
-//CC = Preg <= Preg (IU) ; /* less than or equal, register, unsigned (a) */\r
-CC = P5 <= P0(IU);\r
-CC = P5 <= P1(IU);\r
-CC = P0 <= P2(IU);\r
-CC = P3 <= P5(IU);\r
-\r
-//CC = Preg <= uimm3 (IU) ; /* less than or equal, immediate unsigned (a) */\r
-CC = P5 <= 0(IU);\r
-CC = P5 <= 7(IU);\r
-CC = P2 <= 0(IU);\r
-CC = P2 <= 7(IU);\r
-\r
-CC = A0 == A1 ; /* equal, signed (a) */\r
-CC = A0 < A1 ; /* less than, Accumulator, signed (a) */\r
-CC = A0 <= A1 ; /* less than or equal, Accumulator, signed (a) */\r
-\r
-//Dreg = CC ; /* CC into 32-bit data register, zero-extended (a) */\r
-R7 = CC;\r
-R0 = CC;\r
-\r
-//statbit = CC ; /* status bit equals CC (a) */\r
-AZ = CC;\r
-AN = CC;\r
-AC0= CC;\r
-AC1= CC;\r
-//V = CC;\r
-VS = CC; \r
-AV0= CC;\r
-AV0S= CC; \r
-AV1 = CC; \r
-AV1S= CC; \r
-AQ = CC;\r
-//statbit |= CC ; /* status bit equals status bit OR CC (a) */\r
-AZ |= CC;\r
-AN |= CC;\r
-AC0|= CC;\r
-AC1|= CC;\r
-//V |= CC;\r
-VS |= CC; \r
-AV0|= CC;\r
-AV0S|= CC; \r
-AV1 |= CC; \r
-AV1S|= CC; \r
-AQ |= CC;\r
-\r
-//statbit &= CC ; /* status bit equals status bit AND CC (a) */\r
-AZ &= CC;\r
-AN &= CC;\r
-AC0&= CC;\r
-AC1&= CC;\r
-//V &= CC;\r
-VS &= CC; \r
-AV0&= CC;\r
-AV0S&= CC; \r
-AV1 &= CC; \r
-AV1S&= CC; \r
-AQ &= CC;\r
-\r
-//statbit ^= CC ; /* status bit equals status bit XOR CC (a) */\r
-\r
-AZ ^= CC;\r
-AN ^= CC;\r
-AC0^= CC;\r
-AC1^= CC;\r
-//V ^= CC;\r
-VS ^= CC; \r
-AV0^= CC;\r
-AV0S^= CC; \r
-AV1 ^= CC; \r
-AV1S^= CC; \r
-AQ ^= CC;\r
-//CC = Dreg ; /* CC set if the register is non-zero (a) */\r
-CC = R7;\r
-CC = R6;\r
-CC = R1;\r
-CC = R0;\r
-\r
-\r
-//CC = statbit ; /* CC equals status bit (a) */\r
-CC = AZ;\r
-CC = AN;\r
-CC = AC0;\r
-CC = AC1;\r
-//CC = V;\r
-CC = VS; \r
-CC = AV0;\r
-CC = AV0S; \r
-CC = AV1; \r
-CC = AV1S; \r
-CC = AQ;\r
-\r
-//CC |= statbit ; /* CC equals CC OR status bit (a) */\r
-CC |= AZ;\r
-CC |= AN;\r
-CC |= AC0;\r
-CC |= AC1;\r
-//CC |= V;\r
-CC |= VS; \r
-CC |= AV0;\r
-CC |= AV0S; \r
-CC |= AV1; \r
-CC |= AV1S; \r
-CC |= AQ;\r
-\r
-//CC &= statbit ; /* CC equals CC AND status bit (a) */\r
-CC &= AZ;\r
-CC &= AN;\r
-CC &= AC0;\r
-CC &= AC1;\r
-//CC &= V;\r
-CC &= VS; \r
-CC &= AV0;\r
-CC &= AV0S; \r
-CC &= AV1; \r
-CC &= AV1S; \r
-CC &= AQ;\r
-\r
-//CC ^= statbit ; /* CC equals CC XOR status bit (a) */\r
-CC ^= AZ;\r
-CC ^= AN;\r
-CC ^= AC0;\r
-CC ^= AC1;\r
-//CC ^= V;\r
-CC ^= VS; \r
-CC ^= AV0;\r
-CC ^= AV0S; \r
-CC ^= AV1; \r
-CC ^= AV1S; \r
-CC ^= AQ;\r
-\r
-CC = ! CC ; /* (a) */\r
+
+.EXTERN MY_LABEL2;
+.section .text;
+
+//
+//6 CONTROL CODE BIT MANAGEMENT
+//
+
+//CC = Dreg == Dreg ; /* equal, register, signed (a) */
+CC = R7 == R0;
+CC = R6 == R1;
+CC = R0 == R7;
+
+//CC = Dreg == imm3 ; /* equal, immediate, signed (a) */
+CC = R7 == -4;
+CC = R7 == 3;
+CC = R0 == -4;
+CC = R0 == 3;
+
+//CC = Dreg < Dreg ; /* less than, register, signed (a) */
+CC = R7 < R0;
+CC = R6 < R0;
+CC = R7 < R1;
+CC = R1 < R7;
+CC = R0 < R6;
+
+//CC = Dreg < imm3 ; /* less than, immediate, signed (a) */
+CC = R7 < -4;
+CC = R6 < -4;
+CC = R7 < 3;
+CC = R1 < 3;
+
+//CC = Dreg <= Dreg ; /* less than or equal, register, signed (a) */
+CC = R7 <= R0;
+CC = R6 <= R0;
+CC = R7 <= R1;
+CC = R1 <= R7;
+CC = R0 <= R6;
+
+//CC = Dreg <= imm3 ; /* less than or equal, immediate, signed (a) */
+CC = R7 <= -4;
+CC = R6 <= -4;
+CC = R7 <= 3;
+CC = R1 <= 3;
+
+//CC = Dreg < Dreg (IU) ; /* less than, register, unsigned (a) */
+CC = R7 < R0(IU);
+CC = R6 < R0(IU);
+CC = R7 < R1(IU);
+CC = R1 < R7(IU);
+CC = R0 < R6(IU);
+
+//CC = Dreg < uimm3 (IU) ; /* less than, immediate, unsigned (a) */
+CC = R7 < 0(IU);
+CC = R6 < 0(IU);
+CC = R7 < 7(IU);
+CC = R1 < 7(IU);
+//CC = Dreg <= Dreg (IU) ; /* less than or equal, register, unsigned (a) */
+CC = R7 <= R0(IU);
+CC = R6 <= R0(IU);
+CC = R7 <= R1(IU);
+CC = R1 <= R7(IU);
+CC = R0 <= R6(IU);
+
+
+//CC = Dreg <= uimm3 (IU) ; /* less than or equal, immediate unsigned (a) */
+CC = R7 <= 0(IU);
+CC = R6 <= 0(IU);
+CC = R7 <= 7(IU);
+CC = R1 <= 7(IU);
+
+//CC = Preg == Preg ; /* equal, register, signed (a) */
+CC = P5 == P0;
+CC = P5 == P1;
+CC = P0 == P2;
+CC = P3 == P5;
+
+//CC = Preg == imm3 ; /* equal, immediate, signed (a) */
+CC = P5 == -4;
+CC = P5 == 0;
+CC = P5 == 3;
+CC = P2 == -4;
+CC = P2 == 0;
+CC = P2 == 3;
+
+//CC = Preg < Preg ; /* less than, register, signed (a) */
+CC = P5 < P0;
+CC = P5 < P1;
+CC = P0 < P2;
+CC = P3 < P5;
+
+//CC = Preg < imm3 ; /* less than, immediate, signed (a) */
+CC = P5 < -4;
+CC = P5 < 0;
+CC = P5 < 3;
+CC = P2 < -4;
+CC = P2 < 0;
+CC = P2 < 3;
+
+
+//CC = Preg <= Preg ; /* less than or equal, register, signed (a) */
+CC = P5 <= P0;
+CC = P5 <= P1;
+CC = P0 <= P2;
+CC = P3 <= P5;
+
+//CC = Preg <= imm3 ; /* less than or equal, immediate, signed (a) */
+CC = P5 <= -4;
+CC = P5 <= 0;
+CC = P5 <= 3;
+CC = P2 <= -4;
+CC = P2 <= 0;
+CC = P2 <= 3;
+
+//CC = Preg < Preg (IU) ; /* less than, register, unsigned (a) */
+CC = P5 < P0(IU);
+CC = P5 < P1(IU);
+CC = P0 < P2(IU);
+CC = P3 < P5(IU);
+
+//CC = Preg < uimm3 (IU) ; /* less than, immediate, unsigned (a) */
+CC = P5 < 0(IU);
+CC = P5 < 7(IU);
+CC = P2 < 0(IU);
+CC = P2 < 7(IU);
+
+//CC = Preg <= Preg (IU) ; /* less than or equal, register, unsigned (a) */
+CC = P5 <= P0(IU);
+CC = P5 <= P1(IU);
+CC = P0 <= P2(IU);
+CC = P3 <= P5(IU);
+
+//CC = Preg <= uimm3 (IU) ; /* less than or equal, immediate unsigned (a) */
+CC = P5 <= 0(IU);
+CC = P5 <= 7(IU);
+CC = P2 <= 0(IU);
+CC = P2 <= 7(IU);
+
+CC = A0 == A1 ; /* equal, signed (a) */
+CC = A0 < A1 ; /* less than, Accumulator, signed (a) */
+CC = A0 <= A1 ; /* less than or equal, Accumulator, signed (a) */
+
+//Dreg = CC ; /* CC into 32-bit data register, zero-extended (a) */
+R7 = CC;
+R0 = CC;
+
+//statbit = CC ; /* status bit equals CC (a) */
+AZ = CC;
+AN = CC;
+AC0= CC;
+AC1= CC;
+//V = CC;
+VS = CC;
+AV0= CC;
+AV0S= CC;
+AV1 = CC;
+AV1S= CC;
+AQ = CC;
+//statbit |= CC ; /* status bit equals status bit OR CC (a) */
+AZ |= CC;
+AN |= CC;
+AC0|= CC;
+AC1|= CC;
+//V |= CC;
+VS |= CC;
+AV0|= CC;
+AV0S|= CC;
+AV1 |= CC;
+AV1S|= CC;
+AQ |= CC;
+
+//statbit &= CC ; /* status bit equals status bit AND CC (a) */
+AZ &= CC;
+AN &= CC;
+AC0&= CC;
+AC1&= CC;
+//V &= CC;
+VS &= CC;
+AV0&= CC;
+AV0S&= CC;
+AV1 &= CC;
+AV1S&= CC;
+AQ &= CC;
+
+//statbit ^= CC ; /* status bit equals status bit XOR CC (a) */
+
+AZ ^= CC;
+AN ^= CC;
+AC0^= CC;
+AC1^= CC;
+//V ^= CC;
+VS ^= CC;
+AV0^= CC;
+AV0S^= CC;
+AV1 ^= CC;
+AV1S^= CC;
+AQ ^= CC;
+//CC = Dreg ; /* CC set if the register is non-zero (a) */
+CC = R7;
+CC = R6;
+CC = R1;
+CC = R0;
+
+
+//CC = statbit ; /* CC equals status bit (a) */
+CC = AZ;
+CC = AN;
+CC = AC0;
+CC = AC1;
+//CC = V;
+CC = VS;
+CC = AV0;
+CC = AV0S;
+CC = AV1;
+CC = AV1S;
+CC = AQ;
+
+//CC |= statbit ; /* CC equals CC OR status bit (a) */
+CC |= AZ;
+CC |= AN;
+CC |= AC0;
+CC |= AC1;
+//CC |= V;
+CC |= VS;
+CC |= AV0;
+CC |= AV0S;
+CC |= AV1;
+CC |= AV1S;
+CC |= AQ;
+
+//CC &= statbit ; /* CC equals CC AND status bit (a) */
+CC &= AZ;
+CC &= AN;
+CC &= AC0;
+CC &= AC1;
+//CC &= V;
+CC &= VS;
+CC &= AV0;
+CC &= AV0S;
+CC &= AV1;
+CC &= AV1S;
+CC &= AQ;
+
+//CC ^= statbit ; /* CC equals CC XOR status bit (a) */
+CC ^= AZ;
+CC ^= AN;
+CC ^= AC0;
+CC ^= AC1;
+//CC ^= V;
+CC ^= VS;
+CC ^= AV0;
+CC ^= AV0S;
+CC ^= AV1;
+CC ^= AV1S;
+CC ^= AQ;
+
+CC = ! CC ; /* (a) */
-\r
-.EXTERN MY_LABEL2;\r
-.section .text;\r
-\r
-//\r
-//11 EXTERNAL EVENT MANAGEMENT\r
-//\r
-IDLE ; /* (a) */\r
-CSYNC ; /* (a) */\r
-SSYNC ; /* (a) */\r
-EMUEXCPT ; /* (a) */\r
-\r
-//CLI Dreg ; /* previous state of IMASK moved to Dreg (a) */\r
-CLI R0;\r
-CLI R1;\r
-CLI R2;\r
-\r
-//STI Dreg ; /* previous state of IMASK restored from Dreg (a) */\r
-STI R0;\r
-STI R1;\r
-STI R2;\r
-\r
-//RAISE uimm4 ; /* (a) */\r
-RAISE 0;\r
-RAISE 4;\r
-RAISE 15;\r
-\r
-//EXCPT uimm4 ; /* (a) */\r
-EXCPT 0;\r
-EXCPT 1;\r
-EXCPT 15;\r
-\r
-//TESTSET ( Preg ) ; /* (a) */\r
-TESTSET (P0);\r
-TESTSET (P1);\r
-TESTSET (P2);\r
-//TESTSET (SP);\r
-//TESTSET (FP);\r
-\r
-NOP ; /* (a) */\r
-MNOP ; /* (b) */\r
+
+.EXTERN MY_LABEL2;
+.section .text;
+
+//
+//11 EXTERNAL EVENT MANAGEMENT
+//
+IDLE ; /* (a) */
+CSYNC ; /* (a) */
+SSYNC ; /* (a) */
+EMUEXCPT ; /* (a) */
+
+//CLI Dreg ; /* previous state of IMASK moved to Dreg (a) */
+CLI R0;
+CLI R1;
+CLI R2;
+
+//STI Dreg ; /* previous state of IMASK restored from Dreg (a) */
+STI R0;
+STI R1;
+STI R2;
+
+//RAISE uimm4 ; /* (a) */
+RAISE 0;
+RAISE 4;
+RAISE 15;
+
+//EXCPT uimm4 ; /* (a) */
+EXCPT 0;
+EXCPT 1;
+EXCPT 15;
+
+//TESTSET ( Preg ) ; /* (a) */
+TESTSET (P0);
+TESTSET (P1);
+TESTSET (P2);
+//TESTSET (SP);
+//TESTSET (FP);
+
+NOP ; /* (a) */
+MNOP ; /* (b) */
-\r
-.EXTERN MY_LABEL2;\r
-.section .text;\r
-\r
-//\r
-//7 LOGICAL OPERATIONS\r
-//\r
-\r
-//Dreg = Dreg & Dreg ; /* (a) */\r
-\r
-R7 = R7 & R7;\r
-R7 = R7 & R0;\r
-r7 = R7 & R1;\r
-\r
-R1 = R7 & R7;\r
-R2 = R7 & R0;\r
-r3 = R7 & R1;\r
-\r
-//Dreg = ~ Dreg ; /* (a)*/\r
-\r
-R7 = ~R7;\r
-R7 = ~R0;\r
-R0 = ~R7;\r
-R0 = ~R2;\r
-\r
-//Dreg = Dreg | Dreg ; /* (a) */\r
-\r
-R7 = R7 | R7;\r
-R7 = R7 | R1;\r
-R7 = R7 | R0;\r
-\r
-R1 = R7 | R7;\r
-R2 = R7 | R1;\r
-R3 = R7 | R0;\r
-\r
-//Dreg = Dreg ^ Dreg ; /* (a) */\r
-\r
-R7 = R7 ^ R7;\r
-R7 = R7 ^ R1;\r
-R7 = R7 ^ R0;\r
-\r
-R1 = R7 ^ R7;\r
-R2 = R7 ^ R1;\r
-R3 = R7 ^ R0;\r
-\r
-//Dreg_lo = CC = BXORSHIFT ( A0, Dreg ) ; /* (b) */\r
-R0.L = CC = BXORSHIFT(A0, R0);\r
-R0.L = CC = BXORSHIFT(A0, R1);\r
-\r
-R3.L = CC = BXORSHIFT(A0, R0);\r
-R3.L = CC = BXORSHIFT(A0, R1);\r
-\r
-//Dreg_lo = CC = BXOR ( A0, Dreg ) ; /* (b) */\r
-R0.L = CC = BXOR(A0, R0);\r
-R0.L = CC = BXOR(A0, R1);\r
-\r
-R3.L = CC = BXOR(A0, R0);\r
-R3.L = CC = BXOR(A0, R1);\r
-\r
-//Dreg_lo = CC = BXOR ( A0, A1, CC ) ; /* (b) */\r
-R0.L = CC = BXOR(A0, A1, CC);\r
-R0.L = CC = BXOR(A0, A1, CC);\r
-\r
-R3.L = CC = BXOR(A0, A1, CC);\r
-R3.L = CC = BXOR(A0, A1, CC);\r
-\r
-A0 = BXORSHIFT ( A0, A1, CC ) ; /* (b) */\r
-\r
-\r
+
+.EXTERN MY_LABEL2;
+.section .text;
+
+//
+//7 LOGICAL OPERATIONS
+//
+
+//Dreg = Dreg & Dreg ; /* (a) */
+
+R7 = R7 & R7;
+R7 = R7 & R0;
+r7 = R7 & R1;
+
+R1 = R7 & R7;
+R2 = R7 & R0;
+r3 = R7 & R1;
+
+//Dreg = ~ Dreg ; /* (a)*/
+
+R7 = ~R7;
+R7 = ~R0;
+R0 = ~R7;
+R0 = ~R2;
+
+//Dreg = Dreg | Dreg ; /* (a) */
+
+R7 = R7 | R7;
+R7 = R7 | R1;
+R7 = R7 | R0;
+
+R1 = R7 | R7;
+R2 = R7 | R1;
+R3 = R7 | R0;
+
+//Dreg = Dreg ^ Dreg ; /* (a) */
+
+R7 = R7 ^ R7;
+R7 = R7 ^ R1;
+R7 = R7 ^ R0;
+
+R1 = R7 ^ R7;
+R2 = R7 ^ R1;
+R3 = R7 ^ R0;
+
+//Dreg_lo = CC = BXORSHIFT ( A0, Dreg ) ; /* (b) */
+R0.L = CC = BXORSHIFT(A0, R0);
+R0.L = CC = BXORSHIFT(A0, R1);
+
+R3.L = CC = BXORSHIFT(A0, R0);
+R3.L = CC = BXORSHIFT(A0, R1);
+
+//Dreg_lo = CC = BXOR ( A0, Dreg ) ; /* (b) */
+R0.L = CC = BXOR(A0, R0);
+R0.L = CC = BXOR(A0, R1);
+
+R3.L = CC = BXOR(A0, R0);
+R3.L = CC = BXOR(A0, R1);
+
+//Dreg_lo = CC = BXOR ( A0, A1, CC ) ; /* (b) */
+R0.L = CC = BXOR(A0, A1, CC);
+R0.L = CC = BXOR(A0, A1, CC);
+
+R3.L = CC = BXOR(A0, A1, CC);
+R3.L = CC = BXOR(A0, A1, CC);
+
+A0 = BXORSHIFT ( A0, A1, CC ) ; /* (b) */
+
+
-\r
-.EXTERN MY_LABEL2;\r
-.section .text;\r
-\r
-//\r
-//4 MOVE\r
-//\r
-\r
-//genreg = genreg ; /* (a) */\r
-R0 = R0;\r
-R1 = R1;\r
-R2 = R2;\r
-R3 = R3;\r
-R4 = R4;\r
-R5 = R5;\r
-R6 = R6;\r
-R7 = R7;\r
- \r
-P0 = P0;\r
-P1 = P1;\r
-P2 = P2;\r
-P3 = P3;\r
-P4 = P4;\r
-P5 = P5;\r
-SP = SP;\r
-FP = FP;\r
-\r
-A0.X = A0.X;\r
-A0.W = A0.W;\r
-A1.X = A1.X;\r
-A1.W = A1.W;\r
-\r
-\r
-R0 = A1.W;\r
-R1 = A1.X;\r
-R2 = A0.W;\r
-R3 = A0.X;\r
-R4 = FP;\r
-R5 = SP;\r
-R6 = P5;\r
-R7 = P4;\r
- \r
-P0 = P3;\r
-P1 = P2;\r
-P2 = P1;\r
-P3 = P0;\r
-P4 = R7;\r
-P5 = R6;\r
-SP = R5;\r
-FP = R4;\r
-\r
-A0.X = R3;\r
-A0.W = R2;\r
-A1.X = R1;\r
-A1.W = R0;\r
-\r
-A0.X = A0.W;\r
-A0.X = A1.W;\r
-A0.X = A1.X;\r
-\r
-A1.X = A1.W;\r
-A1.X = A0.W;\r
-A1.X = A0.X;\r
-\r
-A0.W = A0.W;\r
-A0.W = A1.W;\r
-A0.W = A1.X;\r
-\r
-A1.W = A1.W;\r
-A1.W = A0.W;\r
-A1.W = A0.X;\r
-\r
-//genreg = dagreg ; /* (a) */\r
-R0 = I0;\r
-R1 = I1;\r
-R2 = I2;\r
-R3 = I3;\r
-R4 = M0;\r
-R5 = M1;\r
-R6 = M2;\r
-R7 = M3;\r
- \r
-R0 = B0;\r
-R1 = B1;\r
-R2 = B2;\r
-R3 = B3;\r
-R4 = L0;\r
-R5 = L1;\r
-R6 = L2;\r
-R7 = L3;\r
-\r
-P0 = I0;\r
-P1 = I1;\r
-P2 = I2;\r
-P3 = I3;\r
-P4 = M0;\r
-P5 = M1;\r
-SP = M2;\r
-FP = M3;\r
- \r
-P0 = B0;\r
-P1 = B1;\r
-P2 = B2;\r
-P3 = B3;\r
-P4 = L0;\r
-P5 = L1;\r
-SP = L2;\r
-FP = L3;\r
-\r
-\r
-A0.X = I0;\r
-A0.W = I1;\r
-A1.X = I2;\r
-A1.W = I3;\r
-\r
-A0.X = M0;\r
-A0.W = M1;\r
-A1.X = M2;\r
-A1.W = M3;\r
-\r
-A0.X = B0;\r
-A0.W = B1;\r
-A1.X = B2;\r
-A1.W = B3;\r
-\r
-A0.X = L0;\r
-A0.W = L1;\r
-A1.X = L2;\r
-A1.W = L3;\r
-\r
-//dagreg = genreg ; /* (a) */\r
-I0 = R0;\r
-I1 = P0;\r
-I2 = SP;\r
-I3 = FP;\r
-I0 = A0.X;\r
-I1 = A0.W;\r
-I2 = A1.X;\r
-I3 = A1.W;\r
-\r
-M0 = R0;\r
-M1 = P0;\r
-M2 = SP;\r
-M3 = FP;\r
-M0 = A0.X;\r
-M1 = A0.W;\r
-M2 = A1.X;\r
-M3 = A1.W;\r
-\r
-B0 = R0;\r
-B1 = P0;\r
-B2 = SP;\r
-B3 = FP;\r
-B0 = A0.X;\r
-B1 = A0.W;\r
-B2 = A1.X;\r
-B3 = A1.W;\r
-\r
-L0 = R0;\r
-L1 = P0;\r
-L2 = SP;\r
-L3 = FP;\r
-L0 = A0.X;\r
-L1 = A0.W;\r
-L2 = A1.X;\r
-L3 = A1.W;\r
-\r
-\r
-//dagreg = dagreg ; /* (a) */\r
-\r
-I0 = I1;\r
-I1 = M0;\r
-I2 = B1;\r
-I3 = L0;\r
-\r
-M0 = I1;\r
-M1 = M0;\r
-M2 = B1;\r
-M3 = L0;\r
-\r
-B0 = I1;\r
-B1 = M0;\r
-B2 = B1;\r
-B3 = L0;\r
-\r
-L0 = I1;\r
-L1 = M0;\r
-L2 = B1;\r
-L3 = L0;\r
-\r
-//genreg = USP ; /* (a)*/\r
-R1 = USP;\r
-P2 = USP;\r
-SP = USP;\r
-FP = USP;\r
-A0.X = USP;\r
-A1.W = USP;\r
-\r
-//USP = genreg ; /* (a)*/\r
-USP = R2;\r
-USP = P4;\r
-USP = SP;\r
-USP = FP;\r
-USP = A0.X;\r
-USP = A1.W;\r
-\r
-//Dreg = sysreg ; /* sysreg to 32-bit D-register (a) */\r
-R0 = ASTAT;\r
-R1 = SEQSTAT;\r
-R2 = SYSCFG;\r
-R3 = RETI;\r
-R4 = RETX;\r
-R5 = RETN;\r
-R6 = RETE;\r
-R7 = RETS;\r
-R0 = LC0;\r
-R1 = LC1;\r
-R2 = LT0;\r
-R3 = LT1;\r
-R4 = LB0;\r
-R5 = LB1;\r
-R6 = CYCLES;\r
-R7 = CYCLES2;\r
-//R0 = EMUDAT; \r
-//sysreg = Dreg ; /* 32-bit D-register to sysreg (a) */\r
-ASTAT = R0;\r
-SEQSTAT = R1;\r
-SYSCFG = R3;\r
-RETI = R4;\r
-RETX =R5;\r
-RETN = R6;\r
-RETE = R7;\r
-RETS = R0;\r
-LC0 = R1;\r
-LC1 = R2;\r
-LT0 = R3;\r
-LT1 = R4;\r
-LB0 = R5;\r
-LB1 = R6;\r
-CYCLES = R7;\r
-CYCLES2 = R0;\r
-//EMUDAT = R1; \r
-//sysreg = Preg ; /* 32-bit P-register to sysreg (a) */\r
-ASTAT = P0;\r
-SEQSTAT = P1;\r
-SYSCFG = P3;\r
-RETI = P4;\r
-RETX =P5;\r
-RETN = SP;\r
-RETE = FP;\r
-RETS = P0;\r
-LC0 = P1;\r
-LC1 = P2;\r
-LT0 = P3;\r
-LT1 = P4;\r
-LB0 = P5;\r
-LB1 = SP;\r
-CYCLES = SP;\r
-CYCLES2 = P0;\r
-//EMUDAT = P1; \r
-\r
-\r
-//sysreg = USP ; /* (a) */\r
-//ASTAT = USP;\r
-//SEQSTAT = USP;\r
-//SYSCFG = USP;\r
-//RETI = USP;\r
-//RETX =USP;\r
-//RETN = USP;\r
-//RETE = USP;\r
-//RETS = USP;\r
-//LC0 = USP;\r
-//LC1 = USP;\r
-//LT0 = USP;\r
-//LT1 = USP;\r
-//LB0 = USP;\r
-//LB1 = USP;\r
-//CYCLES = USP;\r
-//CYCLES2 = USP;\r
-//EMUDAT = USP; \r
-\r
-A0 = A1 ; /* move 40-bit Accumulator value (b) */\r
-\r
-A1 = A0 ; /* move 40-bit Accumulator value (b) */\r
-\r
-//A0 = Dreg ; /* 32-bit D-register to 40-bit A0, sign extended (b)*/\r
-A0 = R0;\r
-A0 = R1;\r
-A0 = R2;\r
-\r
-//A1 = Dreg ; /* 32-bit D-register to 40-bit A1, sign extended (b)*/\r
-\r
-A1 = R0;\r
-A1 = R1;\r
-A1 = R2;\r
-//Dreg_even = A0 (opt_mode) ; /* move 32-bit A0.W to even Dreg (b) */\r
-R0 = A0;\r
-R2 = A0(FU);\r
-R4 = A0(ISS2);\r
-\r
-//Dreg_odd = A1 (opt_mode) ; /* move 32-bit A1.W to odd Dreg (b) */\r
-R1 = A1;\r
-R3 = A1(FU);\r
-R5 = A1(ISS2);\r
-\r
-//Dreg_even = A0, Dreg_odd = A1 (opt_mode) ; /* move both Accumulators to a register pair (b) */\r
-R0 = A0, R1 = A1;\r
-R0 = A0, R1 = A1(FU);\r
-R6 = A0, R7 = A1(ISS2);\r
-\r
-\r
-//Dreg_odd = A1, Dreg_even = A0 (opt_mode) ; /* move both Accumulators to a register pair (b) */\r
-R1 = A1, R0 = A0;\r
-R3 = A1, R2 = A0(FU);\r
-R5 = A1, R4 = A0(ISS2);\r
-\r
-//IF CC DPreg = DPreg ; /* move if CC = 1 (a) */\r
-\r
-IF CC R3 = R0;\r
-IF CC R2 = R0;\r
-IF CC R7 = R0;\r
-\r
-IF CC R2 = P2;\r
-IF CC R4 = P1;\r
-IF CC R0 = P0;\r
-IF CC R7 = P4;\r
-\r
-IF CC P0 = P2;\r
-IF CC P4 = P5;\r
-IF CC P1 = P3;\r
-IF CC P5 = P4;\r
-\r
-IF CC P0 = R2;\r
-IF CC P4 = R3;\r
-IF CC P5 = R7;\r
-IF CC P2 = R6;\r
-\r
-//IF ! CC DPreg = DPreg ; /* move if CC = 0 (a) */\r
-IF !CC R3 = R0;\r
-IF !CC R2 = R0;\r
-IF !CC R7 = R0;\r
-\r
-IF !CC R2 = P2;\r
-IF !CC R4 = P1;\r
-IF !CC R0 = P0;\r
-IF !CC R7 = P4;\r
-\r
-IF !CC P0 = P2;\r
-IF !CC P4 = P5;\r
-IF !CC P1 = P3;\r
-IF !CC P5 = P4;\r
-\r
-IF !CC P0 = R2;\r
-IF !CC P4 = R3;\r
-IF !CC P5 = R7;\r
-IF !CC P2 = R6;\r
-\r
-//Dreg = Dreg_lo (Z) ; /* (a) */\r
-\r
-R0 = R0.L(Z);\r
-R2 = R1.L(Z);\r
-R1 = R2.L(Z);\r
-R7 = R6.L(Z);\r
-\r
-//Dreg = Dreg_lo (X) ; /* (a)*/\r
-R0 = R0.L(X);\r
-R2 = R1.L(X);\r
-R1 = R2.L(X);\r
-R7 = R6.L(X);\r
-\r
-R0 = R0.L;\r
-R2 = R1.L;\r
-R1 = R2.L;\r
-R7 = R6.L;\r
-\r
-//A0.X = Dreg_lo ; /* least significant 8 bits of Dreg into A0.X (b) */\r
-A0.X = R0.L;\r
-A0.X = R1.L;\r
-\r
-//A1.X = Dreg_lo ; /* least significant 8 bits of Dreg into A1.X (b) */\r
-A1.X = R0.L;\r
-A1.X = R1.L;\r
-\r
-//Dreg_lo = A0.X ; /* 8-bit A0.X, sign-extended, into least significant 16 bits of Dreg (b) */\r
-R0.L = A0.X;\r
-R1.L = A0.X;\r
-R7.L = A0.X;\r
-\r
-//Dreg_lo = A1.X ; /* 8-bit A1.X, sign-extended, into least significant 16 bits of Dreg (b) */\r
-R0.L = A1.X;\r
-R1.L = A1.X;\r
-R7.L = A1.X;\r
-\r
-//A0.L = Dreg_lo ; /* least significant 16 bits of Dreg into least significant 16 bits of A0.W (b) */\r
-A0.L = R0.L;\r
-A0.L = R1.L;\r
-A0.L = R6.L;\r
-\r
-//A1.L = Dreg_lo ; /* least significant 16 bits of Dreg into least significant 16 bits of A1.W (b) */\r
-A1.L = R0.L;\r
-A1.L = R1.L;\r
-A1.L = R6.L;\r
-\r
-//A0.H = Dreg_hi ; /* most significant 16 bits of Dreg into most significant 16 bits of A0.W (b) */\r
-A0.H = R0.H;\r
-A0.H = R1.H;\r
-A0.H = R6.H;\r
-//A1.H = Dreg_hi ; /* most significant 16 bits of Dreg into most significant 16 bits of A1.W (b) */\r
-A1.H = R0.H;\r
-A1.H = R1.H;\r
-A1.H = R6.H;\r
-\r
-//Dreg_lo = A0 (opt_mode) ; /* move A0 to lower half of Dreg (b) */\r
-R0.L = A0;\r
-R1.L = A0;\r
-\r
-R0.L = A0(FU);\r
-R1.L = A0(FU);\r
-\r
-R0.L = A0(IS);\r
-R1.L = A0(IS);\r
-\r
-R0.L = A0(IU);\r
-R1.L = A0(IU);\r
-\r
-R0.L = A0(T);\r
-R1.L = A0(T);\r
-\r
-R0.L = A0(S2RND);\r
-R1.L = A0(S2RND);\r
-\r
-R0.L = A0(ISS2);\r
-R1.L = A0(ISS2);\r
-\r
-R0.L = A0(IH);\r
-R1.L = A0(IH);\r
-\r
-//Dreg_hi = A1 (opt_mode) ; /* move A1 to upper half of Dreg (b) */\r
-R0.H = A1;\r
-R1.H = A1;\r
-\r
-R0.H = A1(FU);\r
-R1.H = A1(FU);\r
-\r
-R0.H = A1(IS);\r
-R1.H = A1(IS);\r
-\r
-R0.H = A1(IU);\r
-R1.H = A1(IU);\r
-\r
-R0.H = A1(T);\r
-R1.H = A1(T);\r
-\r
-R0.H = A1(S2RND);\r
-R1.H = A1(S2RND);\r
-\r
-R0.H = A1(ISS2);\r
-R1.H = A1(ISS2);\r
-\r
-R0.H = A1(IH);\r
-R1.H = A1(IH);\r
-\r
-\r
-//Dreg_lo = A0, Dreg_hi = A1 (opt_mode) ; /* move both values at once; must go to the lower and upper halves of the same Dreg (b)*/\r
-\r
-R0.L = A0, R0.H = A1; \r
-R1.L = A0, R1.H = A1; \r
-\r
-R0.L = A0, R0.H = A1(FU); \r
-R1.L = A0, R1.H = A1(FU);\r
- \r
-R0.L = A0, R0.H = A1(IS); \r
-R1.L = A0, R1.H = A1(IS);\r
- \r
-R0.L = A0, R0.H = A1(IU); \r
-R1.L = A0, R1.H = A1(IU);\r
- \r
-R0.L = A0, R0.H = A1(T); \r
-R1.L = A0, R1.H = A1(T);\r
- \r
-R0.L = A0, R0.H = A1(S2RND); \r
-R1.L = A0, R1.H = A1(S2RND);\r
- \r
-R0.L = A0, R0.H = A1(ISS2); \r
-R1.L = A0, R1.H = A1(ISS2);\r
-\r
-R0.L = A0, R0.H = A1(IH); \r
-R1.L = A0, R1.H = A1(IH);\r
- \r
-//Dreg_hi = A1, Dreg_lo = AO (opt_mode) ; /* move both values at once; must go to the upper and lower halves of the same Dreg (b) */\r
-\r
-R0.H = A1,R0.L = A0; \r
-R1.H = A1,R1.L = A0; \r
- \r
-R0.H = A1,R0.L = A0 (FU); \r
-R1.H = A1,R1.L = A0 (FU);\r
- \r
-R0.H = A1,R0.L = A0 (IS); \r
-R1.H = A1,R1.L = A0 (IS);\r
- \r
-R0.H = A1,R0.L = A0 (IU); \r
-R1.H = A1,R1.L = A0 (IU);\r
- \r
-R0.H = A1,R0.L = A0 (T); \r
-R1.H = A1,R1.L = A0 (T);\r
- \r
-R0.H = A1,R0.L = A0 (S2RND); \r
-R1.H = A1,R1.L = A0 (S2RND);\r
- \r
-R0.H = A1,R0.L = A0 (ISS2); \r
-R1.H = A1,R1.L = A0 (ISS2);\r
- \r
-R0.H = A1,R0.L = A0 (IH); \r
-R1.H = A1,R1.L = A0 (IH);\r
- \r
-//Dreg = Dreg_byte (Z) ; /* (a)*/\r
-\r
-R0 = R1.B(Z);\r
-R0 = R2.B(Z);\r
-\r
-R7 = R1.B(Z);\r
-R7 = R2.B(Z);\r
-\r
-//Dreg = Dreg_byte (X) ; /* (a) */\r
-R0 = R1.B(X);\r
-R0 = R2.B(X);\r
-\r
-R7 = R1.B(X);\r
-R7 = R2.B(X);\r
-\r
+
+.EXTERN MY_LABEL2;
+.section .text;
+
+//
+//4 MOVE
+//
+
+//genreg = genreg ; /* (a) */
+R0 = R0;
+R1 = R1;
+R2 = R2;
+R3 = R3;
+R4 = R4;
+R5 = R5;
+R6 = R6;
+R7 = R7;
+
+P0 = P0;
+P1 = P1;
+P2 = P2;
+P3 = P3;
+P4 = P4;
+P5 = P5;
+SP = SP;
+FP = FP;
+
+A0.X = A0.X;
+A0.W = A0.W;
+A1.X = A1.X;
+A1.W = A1.W;
+
+
+R0 = A1.W;
+R1 = A1.X;
+R2 = A0.W;
+R3 = A0.X;
+R4 = FP;
+R5 = SP;
+R6 = P5;
+R7 = P4;
+
+P0 = P3;
+P1 = P2;
+P2 = P1;
+P3 = P0;
+P4 = R7;
+P5 = R6;
+SP = R5;
+FP = R4;
+
+A0.X = R3;
+A0.W = R2;
+A1.X = R1;
+A1.W = R0;
+
+A0.X = A0.W;
+A0.X = A1.W;
+A0.X = A1.X;
+
+A1.X = A1.W;
+A1.X = A0.W;
+A1.X = A0.X;
+
+A0.W = A0.W;
+A0.W = A1.W;
+A0.W = A1.X;
+
+A1.W = A1.W;
+A1.W = A0.W;
+A1.W = A0.X;
+
+//genreg = dagreg ; /* (a) */
+R0 = I0;
+R1 = I1;
+R2 = I2;
+R3 = I3;
+R4 = M0;
+R5 = M1;
+R6 = M2;
+R7 = M3;
+
+R0 = B0;
+R1 = B1;
+R2 = B2;
+R3 = B3;
+R4 = L0;
+R5 = L1;
+R6 = L2;
+R7 = L3;
+
+P0 = I0;
+P1 = I1;
+P2 = I2;
+P3 = I3;
+P4 = M0;
+P5 = M1;
+SP = M2;
+FP = M3;
+
+P0 = B0;
+P1 = B1;
+P2 = B2;
+P3 = B3;
+P4 = L0;
+P5 = L1;
+SP = L2;
+FP = L3;
+
+
+A0.X = I0;
+A0.W = I1;
+A1.X = I2;
+A1.W = I3;
+
+A0.X = M0;
+A0.W = M1;
+A1.X = M2;
+A1.W = M3;
+
+A0.X = B0;
+A0.W = B1;
+A1.X = B2;
+A1.W = B3;
+
+A0.X = L0;
+A0.W = L1;
+A1.X = L2;
+A1.W = L3;
+
+//dagreg = genreg ; /* (a) */
+I0 = R0;
+I1 = P0;
+I2 = SP;
+I3 = FP;
+I0 = A0.X;
+I1 = A0.W;
+I2 = A1.X;
+I3 = A1.W;
+
+M0 = R0;
+M1 = P0;
+M2 = SP;
+M3 = FP;
+M0 = A0.X;
+M1 = A0.W;
+M2 = A1.X;
+M3 = A1.W;
+
+B0 = R0;
+B1 = P0;
+B2 = SP;
+B3 = FP;
+B0 = A0.X;
+B1 = A0.W;
+B2 = A1.X;
+B3 = A1.W;
+
+L0 = R0;
+L1 = P0;
+L2 = SP;
+L3 = FP;
+L0 = A0.X;
+L1 = A0.W;
+L2 = A1.X;
+L3 = A1.W;
+
+
+//dagreg = dagreg ; /* (a) */
+
+I0 = I1;
+I1 = M0;
+I2 = B1;
+I3 = L0;
+
+M0 = I1;
+M1 = M0;
+M2 = B1;
+M3 = L0;
+
+B0 = I1;
+B1 = M0;
+B2 = B1;
+B3 = L0;
+
+L0 = I1;
+L1 = M0;
+L2 = B1;
+L3 = L0;
+
+//genreg = USP ; /* (a)*/
+R1 = USP;
+P2 = USP;
+SP = USP;
+FP = USP;
+A0.X = USP;
+A1.W = USP;
+
+//USP = genreg ; /* (a)*/
+USP = R2;
+USP = P4;
+USP = SP;
+USP = FP;
+USP = A0.X;
+USP = A1.W;
+
+//Dreg = sysreg ; /* sysreg to 32-bit D-register (a) */
+R0 = ASTAT;
+R1 = SEQSTAT;
+R2 = SYSCFG;
+R3 = RETI;
+R4 = RETX;
+R5 = RETN;
+R6 = RETE;
+R7 = RETS;
+R0 = LC0;
+R1 = LC1;
+R2 = LT0;
+R3 = LT1;
+R4 = LB0;
+R5 = LB1;
+R6 = CYCLES;
+R7 = CYCLES2;
+//R0 = EMUDAT;
+//sysreg = Dreg ; /* 32-bit D-register to sysreg (a) */
+ASTAT = R0;
+SEQSTAT = R1;
+SYSCFG = R3;
+RETI = R4;
+RETX =R5;
+RETN = R6;
+RETE = R7;
+RETS = R0;
+LC0 = R1;
+LC1 = R2;
+LT0 = R3;
+LT1 = R4;
+LB0 = R5;
+LB1 = R6;
+CYCLES = R7;
+CYCLES2 = R0;
+//EMUDAT = R1;
+//sysreg = Preg ; /* 32-bit P-register to sysreg (a) */
+ASTAT = P0;
+SEQSTAT = P1;
+SYSCFG = P3;
+RETI = P4;
+RETX =P5;
+RETN = SP;
+RETE = FP;
+RETS = P0;
+LC0 = P1;
+LC1 = P2;
+LT0 = P3;
+LT1 = P4;
+LB0 = P5;
+LB1 = SP;
+CYCLES = SP;
+CYCLES2 = P0;
+//EMUDAT = P1;
+
+
+//sysreg = USP ; /* (a) */
+//ASTAT = USP;
+//SEQSTAT = USP;
+//SYSCFG = USP;
+//RETI = USP;
+//RETX =USP;
+//RETN = USP;
+//RETE = USP;
+//RETS = USP;
+//LC0 = USP;
+//LC1 = USP;
+//LT0 = USP;
+//LT1 = USP;
+//LB0 = USP;
+//LB1 = USP;
+//CYCLES = USP;
+//CYCLES2 = USP;
+//EMUDAT = USP;
+
+A0 = A1 ; /* move 40-bit Accumulator value (b) */
+
+A1 = A0 ; /* move 40-bit Accumulator value (b) */
+
+//A0 = Dreg ; /* 32-bit D-register to 40-bit A0, sign extended (b)*/
+A0 = R0;
+A0 = R1;
+A0 = R2;
+
+//A1 = Dreg ; /* 32-bit D-register to 40-bit A1, sign extended (b)*/
+
+A1 = R0;
+A1 = R1;
+A1 = R2;
+//Dreg_even = A0 (opt_mode) ; /* move 32-bit A0.W to even Dreg (b) */
+R0 = A0;
+R2 = A0(FU);
+R4 = A0(ISS2);
+
+//Dreg_odd = A1 (opt_mode) ; /* move 32-bit A1.W to odd Dreg (b) */
+R1 = A1;
+R3 = A1(FU);
+R5 = A1(ISS2);
+
+//Dreg_even = A0, Dreg_odd = A1 (opt_mode) ; /* move both Accumulators to a register pair (b) */
+R0 = A0, R1 = A1;
+R0 = A0, R1 = A1(FU);
+R6 = A0, R7 = A1(ISS2);
+
+
+//Dreg_odd = A1, Dreg_even = A0 (opt_mode) ; /* move both Accumulators to a register pair (b) */
+R1 = A1, R0 = A0;
+R3 = A1, R2 = A0(FU);
+R5 = A1, R4 = A0(ISS2);
+
+//IF CC DPreg = DPreg ; /* move if CC = 1 (a) */
+
+IF CC R3 = R0;
+IF CC R2 = R0;
+IF CC R7 = R0;
+
+IF CC R2 = P2;
+IF CC R4 = P1;
+IF CC R0 = P0;
+IF CC R7 = P4;
+
+IF CC P0 = P2;
+IF CC P4 = P5;
+IF CC P1 = P3;
+IF CC P5 = P4;
+
+IF CC P0 = R2;
+IF CC P4 = R3;
+IF CC P5 = R7;
+IF CC P2 = R6;
+
+//IF ! CC DPreg = DPreg ; /* move if CC = 0 (a) */
+IF !CC R3 = R0;
+IF !CC R2 = R0;
+IF !CC R7 = R0;
+
+IF !CC R2 = P2;
+IF !CC R4 = P1;
+IF !CC R0 = P0;
+IF !CC R7 = P4;
+
+IF !CC P0 = P2;
+IF !CC P4 = P5;
+IF !CC P1 = P3;
+IF !CC P5 = P4;
+
+IF !CC P0 = R2;
+IF !CC P4 = R3;
+IF !CC P5 = R7;
+IF !CC P2 = R6;
+
+//Dreg = Dreg_lo (Z) ; /* (a) */
+
+R0 = R0.L(Z);
+R2 = R1.L(Z);
+R1 = R2.L(Z);
+R7 = R6.L(Z);
+
+//Dreg = Dreg_lo (X) ; /* (a)*/
+R0 = R0.L(X);
+R2 = R1.L(X);
+R1 = R2.L(X);
+R7 = R6.L(X);
+
+R0 = R0.L;
+R2 = R1.L;
+R1 = R2.L;
+R7 = R6.L;
+
+//A0.X = Dreg_lo ; /* least significant 8 bits of Dreg into A0.X (b) */
+A0.X = R0.L;
+A0.X = R1.L;
+
+//A1.X = Dreg_lo ; /* least significant 8 bits of Dreg into A1.X (b) */
+A1.X = R0.L;
+A1.X = R1.L;
+
+//Dreg_lo = A0.X ; /* 8-bit A0.X, sign-extended, into least significant 16 bits of Dreg (b) */
+R0.L = A0.X;
+R1.L = A0.X;
+R7.L = A0.X;
+
+//Dreg_lo = A1.X ; /* 8-bit A1.X, sign-extended, into least significant 16 bits of Dreg (b) */
+R0.L = A1.X;
+R1.L = A1.X;
+R7.L = A1.X;
+
+//A0.L = Dreg_lo ; /* least significant 16 bits of Dreg into least significant 16 bits of A0.W (b) */
+A0.L = R0.L;
+A0.L = R1.L;
+A0.L = R6.L;
+
+//A1.L = Dreg_lo ; /* least significant 16 bits of Dreg into least significant 16 bits of A1.W (b) */
+A1.L = R0.L;
+A1.L = R1.L;
+A1.L = R6.L;
+
+//A0.H = Dreg_hi ; /* most significant 16 bits of Dreg into most significant 16 bits of A0.W (b) */
+A0.H = R0.H;
+A0.H = R1.H;
+A0.H = R6.H;
+//A1.H = Dreg_hi ; /* most significant 16 bits of Dreg into most significant 16 bits of A1.W (b) */
+A1.H = R0.H;
+A1.H = R1.H;
+A1.H = R6.H;
+
+//Dreg_lo = A0 (opt_mode) ; /* move A0 to lower half of Dreg (b) */
+R0.L = A0;
+R1.L = A0;
+
+R0.L = A0(FU);
+R1.L = A0(FU);
+
+R0.L = A0(IS);
+R1.L = A0(IS);
+
+R0.L = A0(IU);
+R1.L = A0(IU);
+
+R0.L = A0(T);
+R1.L = A0(T);
+
+R0.L = A0(S2RND);
+R1.L = A0(S2RND);
+
+R0.L = A0(ISS2);
+R1.L = A0(ISS2);
+
+R0.L = A0(IH);
+R1.L = A0(IH);
+
+//Dreg_hi = A1 (opt_mode) ; /* move A1 to upper half of Dreg (b) */
+R0.H = A1;
+R1.H = A1;
+
+R0.H = A1(FU);
+R1.H = A1(FU);
+
+R0.H = A1(IS);
+R1.H = A1(IS);
+
+R0.H = A1(IU);
+R1.H = A1(IU);
+
+R0.H = A1(T);
+R1.H = A1(T);
+
+R0.H = A1(S2RND);
+R1.H = A1(S2RND);
+
+R0.H = A1(ISS2);
+R1.H = A1(ISS2);
+
+R0.H = A1(IH);
+R1.H = A1(IH);
+
+
+//Dreg_lo = A0, Dreg_hi = A1 (opt_mode) ; /* move both values at once; must go to the lower and upper halves of the same Dreg (b)*/
+
+R0.L = A0, R0.H = A1;
+R1.L = A0, R1.H = A1;
+
+R0.L = A0, R0.H = A1(FU);
+R1.L = A0, R1.H = A1(FU);
+
+R0.L = A0, R0.H = A1(IS);
+R1.L = A0, R1.H = A1(IS);
+
+R0.L = A0, R0.H = A1(IU);
+R1.L = A0, R1.H = A1(IU);
+
+R0.L = A0, R0.H = A1(T);
+R1.L = A0, R1.H = A1(T);
+
+R0.L = A0, R0.H = A1(S2RND);
+R1.L = A0, R1.H = A1(S2RND);
+
+R0.L = A0, R0.H = A1(ISS2);
+R1.L = A0, R1.H = A1(ISS2);
+
+R0.L = A0, R0.H = A1(IH);
+R1.L = A0, R1.H = A1(IH);
+
+//Dreg_hi = A1, Dreg_lo = AO (opt_mode) ; /* move both values at once; must go to the upper and lower halves of the same Dreg (b) */
+
+R0.H = A1,R0.L = A0;
+R1.H = A1,R1.L = A0;
+
+R0.H = A1,R0.L = A0 (FU);
+R1.H = A1,R1.L = A0 (FU);
+
+R0.H = A1,R0.L = A0 (IS);
+R1.H = A1,R1.L = A0 (IS);
+
+R0.H = A1,R0.L = A0 (IU);
+R1.H = A1,R1.L = A0 (IU);
+
+R0.H = A1,R0.L = A0 (T);
+R1.H = A1,R1.L = A0 (T);
+
+R0.H = A1,R0.L = A0 (S2RND);
+R1.H = A1,R1.L = A0 (S2RND);
+
+R0.H = A1,R0.L = A0 (ISS2);
+R1.H = A1,R1.L = A0 (ISS2);
+
+R0.H = A1,R0.L = A0 (IH);
+R1.H = A1,R1.L = A0 (IH);
+
+//Dreg = Dreg_byte (Z) ; /* (a)*/
+
+R0 = R1.B(Z);
+R0 = R2.B(Z);
+
+R7 = R1.B(Z);
+R7 = R2.B(Z);
+
+//Dreg = Dreg_byte (X) ; /* (a) */
+R0 = R1.B(X);
+R0 = R2.B(X);
+
+R7 = R1.B(X);
+R7 = R2.B(X);
+
- .section .text;\r
- R5 = Deposit (r3, r2) || I0 += 2;\r
- r0 = DEPOSIT (r7, R6) (X) || I1 += 4;\r
- r4 = extract (r2, r1.L) (z) || I2 -= M0;\r
- R2 = EXTRACT (r0, r2.l) (Z) || i3 += m1;\r
-\r
- r7 = ExtracT (r3, r4.L) (X) || I3 += M1 (breV);\r
- r5 = ExtRACt (R6, R1.L) (x) || i0 -= 2;\r
-\r
- BITMUX(R1, R0, A0) (ASR) || I1 -= 4;\r
- Bitmux (r2, R3, a0) (aSr) || I0 += 2;\r
-\r
- bitmux (r4, r5, a0) (asl) || Sp = [P0];\r
- BiTMux (R7, r6, a0) (ASl) || FP = [P1++];\r
-\r
- R5.l = ones r0 || P0 = [fp--];\r
- r7.L = Ones R2 || p1 = [P5 + 24];\r
-\r
- a0 = abs a0 || p2 = [Sp+60] || r0 = [i0];\r
- A0 = ABS A1 || P3 = [FP-60] || R1 = [I1++M0];\r
- A1 = Abs a0 || P4 = [fp-4] || r2 = [i1++];\r
- a1 = aBs A1 || fp = [sp] || r3 = [I2--];\r
- A1 = abs a1, a0 = ABS A0 || R4=[p5+56] || r0.h = w [I0];\r
- r0 = abs r2 || B[sp] = r0 || R1.H = W[I1++];\r
-\r
- r4.L = R2.h + r0.L (s) || b [fp] = r0 || r2.H = w [i2--];\r
- r5.H = R1.H + R1.L (S) || b [p0] = r0 || R3.l = W[I3];\r
- r6.L = R6.L + r5.l (NS) || b [p1] = r0 || r4.L =w [i3++];\r
-\r
- r4.l = r0 + r1 (RND20) || b [p2] = r0 || R5.l = W [i2--];\r
- R3.H = r5 + r0 (rnd20) || r0 = b [p0] (x) || [i0] = R6;\r
- r1.L = r7 - R5 (rND20) || r0 = b [p4] (z) || [I1++] = R7;\r
-\r
- r2.L = R0 + R1 (rnd12) || r1 = b [sp] (x) || [I2--]= r7;\r
- r7.H = r7 + r6 (RND12) || r1 = b [p0] (x)|| [I3++m1]=r6;\r
- r5.l = r3 - R2 (rNd12) || r1 = b [p1] (z) || W [ i3 ] = r5.h;\r
- r2.h = R1 - R2 (Rnd12) || r1 = b [p2] (z) || w [I2++] = R4.H;\r
-\r
-\r
- r6.L = EXPADJ (r5, r4.l) || r1 = b [p3] (z) || W[I1--]=r3.h;\r
- R5.l = ExpAdj (r0.h, r1.l) || r1 = b [p4] (z) || w[i0]=r2.l;\r
- R4.L = expadj (R3, R5.L) (V) || r1 = b [p5] (z) || W [I0++] = R1.L;\r
-\r
- R6 = MAX (r5, R2) || r2 = b [p0] (x) || W[i1--]=R0.l;\r
- r0 = max (r1, r3) || b [p1] = r2 || NoP;\r
-\r
- r5 = mIn (r2, R3) || b [p2] = r2 || r0 = [i1++];\r
- R4 = Min (r7, R0) || b [p3] = r2 || r1 = [i1++];\r
-\r
-\r
- A0 -= A1 || b [p4] = r2 || r2 = [i1++];\r
- a0 -= a1 (w32) || b [p5] = r2 || r3 = [i1++];\r
-\r
- a0 += a1 || b [sp] = r2 || r4 = [i1++];\r
- A0 += A1 (w32) || b [fp] = r2 || r5 = [i1++];\r
- r7 = ( a0 += a1) || b [sp] = r3 || r6 = [i1++];\r
- r6.l = (A0 += a1) || b [fp] = r3 || r7 = [i1++];\r
- R0.H = (a0 += A1) || b [p0] = r3 || r7 = [i0++];\r
-\r
-\r
- R0.l = r1.h * r2.l || b [p1] = r3 || r1 = [i0++];\r
- r1.L = r5.H * r0.H (s2rnd) || b [p2] = r3 || r2 = [i0++];\r
- r7.l = r3.l * r3.H (FU) || b [p3] = r3 || r3 = [i0++];\r
- r4 = r2.H * r5.H (iSS2) || b [p4] = r3 || r0 = [i0++];\r
- r0 = r1.l * r3.l (is) || b [p5] = r3 || r5 = [i0++];\r
- r6 = R5.H * r0.l || b [fp] = r4 || r7 = [i0++];\r
-\r
- r2.h = r7.l * r6.H (M, iu) || b [sp] = r4 || r6 = [i0++];\r
- r3.H = r5.H * r0.L || r4 = b [p0] (x) || [I0++M0] = R0;\r
- R0.H = r1.L * r1.H (M) || r4 = b [p1] (x) || [i0++M0] = R1;\r
- r1 = r7.H * r6.L (M, is) || r4 = b [p2] (x) || [i0++M0] = R2;\r
- R5 = r0.l * r2.h || r4 = b [p3] (x) || [i0++m0] = R3;\r
- r3 = r6.H * r0.H (m) || r4 = b [p4] (z) || [i0++m0] = R4;\r
-\r
- a0 = r5.l * R7.H (w32) || r4 = b [p5] (z) || [i0++m0] = R5;\r
- a0 = r0.h * r0.l || r5 = b [p0] (x) || [i0++M0] =R6;\r
- A0 += R2.L * r3.H (FU) || r5 = b [p1] (z) || [i0++M0]=R7;\r
- A0 += r4.h * r1.L || r5 = b [p2] (z) || [I1++M1] = R7;\r
- a0 -= r7.l * r6.H (Is) || r5 = b [p3] (x) || [i1++m1] = r6;\r
- A0 -= R5.H * r2.H || r5 = b [p4] (z) || [i1++m1]=r5;\r
-\r
- a1 = r1.L * r0.H (M) || r5 = b [p5] (x) || [i1++m1]=r4;\r
- A1 = r2.h * r0.L || r5 = b [sp] (z) || [i1++m1] = r3;\r
- A1 = R7.H * R6.L (M, W32) || r5 = b [fp] (x) || [i1++m1] =r2;\r
-\r
- a1 += r3.l * r2.l (fu) || r0.l = w [i0] || [i1++m1] = r1;\r
- a1 += R6.H * r1.L || r1.l = w [i0] || [i1++m1] = R0;\r
- A1 -= r0.L * R3.H (is) || r2.l = w [i0] || [i2++m2] = R0;\r
- a1 -= r2.l * r7.h || r3.l = w [i0] || [I2++M2] =R1;\r
-\r
- r7.l = (a0 = r6.H * r5.L) || r4.l = w [i0] || [i2++m2] = r2;\r
- r0.L = (A0 = r1.h * R2.l) (tfu) || r5.l = w [i0] || [I2++m2] = R3;\r
- R2.L = (a0 += r5.L * r4.L) || r6.l = w [i0] || [I2++m2] = R4;\r
- r3.l = (A0 += r7.H * r6.h) (T) || r7.l = w [i0] || [ i2 ++ m2] = R5;\r
- r0.l = (a0 -= r3.h * r2.h) || r7.l = w [i1++] || [i2++m2] = r6;\r
- r1.l = (a0 -= r5.L * r4.L) (iH) || r6.l = w [i1++] || [i2++m2] = R7;\r
-\r
- r1.H = (a1 = r1.l * R0.H) || r2.l = w [i1++] || [i3++m3] = R7;\r
- r2.h = (A1 = r0.H * r3.L) (M, Iss2) || r3.l = w [i1++] || [i3++m3] = r6;\r
- R6.H = (a1 += r7.l * r7.H) || r4.l = w [i1++] || [i3++m3] = R5;\r
- r7.h = (a1 += R2.L * R3.L) (S2rnd) || r5.l = w [i1++] || [i3++m3] = r4;\r
- r6.H = (A1 -= R4.h * r2.h) || r6.l = w [i1++] || [i3++m3] = r3;\r
- r5.h = (a1 -= r3.H * r7.L) (M, tFu) || r7.l = w [i1++] || [i3++m3] = r2;\r
-\r
- R0 = (A0 = R1.L * R2.L) || R1.L = W [I2--] || [i3++m3] = r1;\r
- R2 = (A0 = r1.l * r2.l) (is) || R1.L = W [I2--] || [i3++m3] = r0;\r
- r4 = (a0 += r7.h * r6.L) || R2.L = W [I2--] || r0.h = w[i0];\r
- r6 = (A0 += R5.L * r3.h) (s2RND) || R3.L = W [I2--] || R1.H = w[i1];\r
- R6 = (a0 -= r2.h * r7.l) || R4.L = W [I2--] || r2.h = w[i2];\r
- r4 = (A0 -= R0.L * r6.H) (FU) || R5.L = W [I2--] || r3.h = w[i3];\r
-\r
- r7 = (a1 = r0.h * r1.l) || R6.L = W [I2--] || r4.h = w[i3];\r
- R5 = (A1 = r2.H * r3.H) (M, fu) || R7.L = W [I2--] || r4.h = W[i2];\r
- R3 = (A1 += r7.l * r5.l) || w [p0] = r0.L || r6.h = W[i1];\r
- r1 = (a1 += r2.h * r7.h) (iss2) || w [p0] = r1.L || r7.h = w[i0];\r
- r3 = (A1 -= r0.l * R0.H) || w [p0] = r2.L || r7.L = w[I0++];\r
- R5 = (a1 -= R2.l * R7.h) (m, is) || w [p0] = r3.L || R6.L = W [i1++];\r
-\r
- r7 = -R2(s) || w [p0] = r4.L || r5.l = w[i2++];\r
- A0 = -A0 || w [p0] = r5.L || r4.l = w[i3++];\r
- a0 = -a1 || w [p0] = r6.L || r3.L = w [i3--];\r
- A1 = -A0 || w [p0] = r7.L || r2.l = W [i1++];\r
- a1 = -A1 || w [p1] = r0 || r1.L = w [i2--];\r
- a1 = -a1, a0 = -a0 || w [p1] = r1 || r0.l = w [i1--];\r
-\r
- R5.L = r3 (rnd) || w [p1] = r2 || r0 = [i0++m3];\r
- r6.H = r0 (RND) || w [p1] = r3 || r1 = [i1++m2];\r
-\r
- A0 = A0 (S) || w [p1] = r4 || r2 = [i2++m1];\r
- a1 = a1 (s) || w [p1] = r5 || r3 = [i3++m0];\r
- A1 = a1 (S), a0 = A0 (s) || r6 = w [p1] (z) || [i0] = r0;\r
-\r
- R5.l = signbits r0 || r7 = w [p1] (z) || [i1] = R0;\r
- r0.L = SIGNbits r7.H || r1 = w [p2++](x) || [I2] = r0;\r
- r3.l = signBits A0 || r2 = w [p2++] (x) || [I3] = R0;\r
- r7.L = SIGNBITS a1 || r3 = w [p2++] (z) || [i0] = R1;\r
-\r
- r5.l = R6.H - R7.h (s) || r4 = w [p2++] (x) || [i1] = r1;\r
- r0.H = r3.l - r3.h (NS) || r5 = w [p2++] (x) || [i2] = r2;\r
-\r
- R1 = [I0++] || R2 = ABS R2 || NOP;\r
+ .section .text;
+ R5 = Deposit (r3, r2) || I0 += 2;
+ r0 = DEPOSIT (r7, R6) (X) || I1 += 4;
+ r4 = extract (r2, r1.L) (z) || I2 -= M0;
+ R2 = EXTRACT (r0, r2.l) (Z) || i3 += m1;
+
+ r7 = ExtracT (r3, r4.L) (X) || I3 += M1 (breV);
+ r5 = ExtRACt (R6, R1.L) (x) || i0 -= 2;
+
+ BITMUX(R1, R0, A0) (ASR) || I1 -= 4;
+ Bitmux (r2, R3, a0) (aSr) || I0 += 2;
+
+ bitmux (r4, r5, a0) (asl) || Sp = [P0];
+ BiTMux (R7, r6, a0) (ASl) || FP = [P1++];
+
+ R5.l = ones r0 || P0 = [fp--];
+ r7.L = Ones R2 || p1 = [P5 + 24];
+
+ a0 = abs a0 || p2 = [Sp+60] || r0 = [i0];
+ A0 = ABS A1 || P3 = [FP-60] || R1 = [I1++M0];
+ A1 = Abs a0 || P4 = [fp-4] || r2 = [i1++];
+ a1 = aBs A1 || fp = [sp] || r3 = [I2--];
+ A1 = abs a1, a0 = ABS A0 || R4=[p5+56] || r0.h = w [I0];
+ r0 = abs r2 || B[sp] = r0 || R1.H = W[I1++];
+
+ r4.L = R2.h + r0.L (s) || b [fp] = r0 || r2.H = w [i2--];
+ r5.H = R1.H + R1.L (S) || b [p0] = r0 || R3.l = W[I3];
+ r6.L = R6.L + r5.l (NS) || b [p1] = r0 || r4.L =w [i3++];
+
+ r4.l = r0 + r1 (RND20) || b [p2] = r0 || R5.l = W [i2--];
+ R3.H = r5 + r0 (rnd20) || r0 = b [p0] (x) || [i0] = R6;
+ r1.L = r7 - R5 (rND20) || r0 = b [p4] (z) || [I1++] = R7;
+
+ r2.L = R0 + R1 (rnd12) || r1 = b [sp] (x) || [I2--]= r7;
+ r7.H = r7 + r6 (RND12) || r1 = b [p0] (x)|| [I3++m1]=r6;
+ r5.l = r3 - R2 (rNd12) || r1 = b [p1] (z) || W [ i3 ] = r5.h;
+ r2.h = R1 - R2 (Rnd12) || r1 = b [p2] (z) || w [I2++] = R4.H;
+
+
+ r6.L = EXPADJ (r5, r4.l) || r1 = b [p3] (z) || W[I1--]=r3.h;
+ R5.l = ExpAdj (r0.h, r1.l) || r1 = b [p4] (z) || w[i0]=r2.l;
+ R4.L = expadj (R3, R5.L) (V) || r1 = b [p5] (z) || W [I0++] = R1.L;
+
+ R6 = MAX (r5, R2) || r2 = b [p0] (x) || W[i1--]=R0.l;
+ r0 = max (r1, r3) || b [p1] = r2 || NoP;
+
+ r5 = mIn (r2, R3) || b [p2] = r2 || r0 = [i1++];
+ R4 = Min (r7, R0) || b [p3] = r2 || r1 = [i1++];
+
+
+ A0 -= A1 || b [p4] = r2 || r2 = [i1++];
+ a0 -= a1 (w32) || b [p5] = r2 || r3 = [i1++];
+
+ a0 += a1 || b [sp] = r2 || r4 = [i1++];
+ A0 += A1 (w32) || b [fp] = r2 || r5 = [i1++];
+ r7 = ( a0 += a1) || b [sp] = r3 || r6 = [i1++];
+ r6.l = (A0 += a1) || b [fp] = r3 || r7 = [i1++];
+ R0.H = (a0 += A1) || b [p0] = r3 || r7 = [i0++];
+
+
+ R0.l = r1.h * r2.l || b [p1] = r3 || r1 = [i0++];
+ r1.L = r5.H * r0.H (s2rnd) || b [p2] = r3 || r2 = [i0++];
+ r7.l = r3.l * r3.H (FU) || b [p3] = r3 || r3 = [i0++];
+ r4 = r2.H * r5.H (iSS2) || b [p4] = r3 || r0 = [i0++];
+ r0 = r1.l * r3.l (is) || b [p5] = r3 || r5 = [i0++];
+ r6 = R5.H * r0.l || b [fp] = r4 || r7 = [i0++];
+
+ r2.h = r7.l * r6.H (M, iu) || b [sp] = r4 || r6 = [i0++];
+ r3.H = r5.H * r0.L || r4 = b [p0] (x) || [I0++M0] = R0;
+ R0.H = r1.L * r1.H (M) || r4 = b [p1] (x) || [i0++M0] = R1;
+ r1 = r7.H * r6.L (M, is) || r4 = b [p2] (x) || [i0++M0] = R2;
+ R5 = r0.l * r2.h || r4 = b [p3] (x) || [i0++m0] = R3;
+ r3 = r6.H * r0.H (m) || r4 = b [p4] (z) || [i0++m0] = R4;
+
+ a0 = r5.l * R7.H (w32) || r4 = b [p5] (z) || [i0++m0] = R5;
+ a0 = r0.h * r0.l || r5 = b [p0] (x) || [i0++M0] =R6;
+ A0 += R2.L * r3.H (FU) || r5 = b [p1] (z) || [i0++M0]=R7;
+ A0 += r4.h * r1.L || r5 = b [p2] (z) || [I1++M1] = R7;
+ a0 -= r7.l * r6.H (Is) || r5 = b [p3] (x) || [i1++m1] = r6;
+ A0 -= R5.H * r2.H || r5 = b [p4] (z) || [i1++m1]=r5;
+
+ a1 = r1.L * r0.H (M) || r5 = b [p5] (x) || [i1++m1]=r4;
+ A1 = r2.h * r0.L || r5 = b [sp] (z) || [i1++m1] = r3;
+ A1 = R7.H * R6.L (M, W32) || r5 = b [fp] (x) || [i1++m1] =r2;
+
+ a1 += r3.l * r2.l (fu) || r0.l = w [i0] || [i1++m1] = r1;
+ a1 += R6.H * r1.L || r1.l = w [i0] || [i1++m1] = R0;
+ A1 -= r0.L * R3.H (is) || r2.l = w [i0] || [i2++m2] = R0;
+ a1 -= r2.l * r7.h || r3.l = w [i0] || [I2++M2] =R1;
+
+ r7.l = (a0 = r6.H * r5.L) || r4.l = w [i0] || [i2++m2] = r2;
+ r0.L = (A0 = r1.h * R2.l) (tfu) || r5.l = w [i0] || [I2++m2] = R3;
+ R2.L = (a0 += r5.L * r4.L) || r6.l = w [i0] || [I2++m2] = R4;
+ r3.l = (A0 += r7.H * r6.h) (T) || r7.l = w [i0] || [ i2 ++ m2] = R5;
+ r0.l = (a0 -= r3.h * r2.h) || r7.l = w [i1++] || [i2++m2] = r6;
+ r1.l = (a0 -= r5.L * r4.L) (iH) || r6.l = w [i1++] || [i2++m2] = R7;
+
+ r1.H = (a1 = r1.l * R0.H) || r2.l = w [i1++] || [i3++m3] = R7;
+ r2.h = (A1 = r0.H * r3.L) (M, Iss2) || r3.l = w [i1++] || [i3++m3] = r6;
+ R6.H = (a1 += r7.l * r7.H) || r4.l = w [i1++] || [i3++m3] = R5;
+ r7.h = (a1 += R2.L * R3.L) (S2rnd) || r5.l = w [i1++] || [i3++m3] = r4;
+ r6.H = (A1 -= R4.h * r2.h) || r6.l = w [i1++] || [i3++m3] = r3;
+ r5.h = (a1 -= r3.H * r7.L) (M, tFu) || r7.l = w [i1++] || [i3++m3] = r2;
+
+ R0 = (A0 = R1.L * R2.L) || R1.L = W [I2--] || [i3++m3] = r1;
+ R2 = (A0 = r1.l * r2.l) (is) || R1.L = W [I2--] || [i3++m3] = r0;
+ r4 = (a0 += r7.h * r6.L) || R2.L = W [I2--] || r0.h = w[i0];
+ r6 = (A0 += R5.L * r3.h) (s2RND) || R3.L = W [I2--] || R1.H = w[i1];
+ R6 = (a0 -= r2.h * r7.l) || R4.L = W [I2--] || r2.h = w[i2];
+ r4 = (A0 -= R0.L * r6.H) (FU) || R5.L = W [I2--] || r3.h = w[i3];
+
+ r7 = (a1 = r0.h * r1.l) || R6.L = W [I2--] || r4.h = w[i3];
+ R5 = (A1 = r2.H * r3.H) (M, fu) || R7.L = W [I2--] || r4.h = W[i2];
+ R3 = (A1 += r7.l * r5.l) || w [p0] = r0.L || r6.h = W[i1];
+ r1 = (a1 += r2.h * r7.h) (iss2) || w [p0] = r1.L || r7.h = w[i0];
+ r3 = (A1 -= r0.l * R0.H) || w [p0] = r2.L || r7.L = w[I0++];
+ R5 = (a1 -= R2.l * R7.h) (m, is) || w [p0] = r3.L || R6.L = W [i1++];
+
+ r7 = -R2(s) || w [p0] = r4.L || r5.l = w[i2++];
+ A0 = -A0 || w [p0] = r5.L || r4.l = w[i3++];
+ a0 = -a1 || w [p0] = r6.L || r3.L = w [i3--];
+ A1 = -A0 || w [p0] = r7.L || r2.l = W [i1++];
+ a1 = -A1 || w [p1] = r0 || r1.L = w [i2--];
+ a1 = -a1, a0 = -a0 || w [p1] = r1 || r0.l = w [i1--];
+
+ R5.L = r3 (rnd) || w [p1] = r2 || r0 = [i0++m3];
+ r6.H = r0 (RND) || w [p1] = r3 || r1 = [i1++m2];
+
+ A0 = A0 (S) || w [p1] = r4 || r2 = [i2++m1];
+ a1 = a1 (s) || w [p1] = r5 || r3 = [i3++m0];
+ A1 = a1 (S), a0 = A0 (s) || r6 = w [p1] (z) || [i0] = r0;
+
+ R5.l = signbits r0 || r7 = w [p1] (z) || [i1] = R0;
+ r0.L = SIGNbits r7.H || r1 = w [p2++](x) || [I2] = r0;
+ r3.l = signBits A0 || r2 = w [p2++] (x) || [I3] = R0;
+ r7.L = SIGNBITS a1 || r3 = w [p2++] (z) || [i0] = R1;
+
+ r5.l = R6.H - R7.h (s) || r4 = w [p2++] (x) || [i1] = r1;
+ r0.H = r3.l - r3.h (NS) || r5 = w [p2++] (x) || [i2] = r2;
+
+ R1 = [I0++] || R2 = ABS R2 || NOP;
- .section .text;\r
- A0 = A1 || P0 = [sp+20];\r
- a1 = a0 || P0 = [p5+24];\r
- a0 = R0 || P0 = [P4+28];\r
- A1 = r1 || P0 = [P3+32];\r
-\r
- R4 = A0 (fu) || P0 = [p3+36];\r
- r5 = A1 (ISS2) || P0 = [P3+40];\r
- R6 = a0 || P0 = [P4+44];\r
- R7 = A1 || P0 = [P4+48];\r
- R6 = A0, R7 = a1 || P0 = [P4+52];\r
- r1 = a1, r0 = a0 (fu) || P0 = [P4+56];\r
-\r
- A0.X = r5.l || p0 = [p4+60];\r
- a1.X = r2.L || r0 = [i0 ++ m0];\r
- r0.l = a0.x || r1 = [i0 ++ m1];\r
- R7.l = A1.X || r0 = [i0 ++ m2];\r
- A0.L = r3.l || r0 = [i0 ++ m3];\r
- a1.l = r4.l || r0 = [i1 ++ m3];\r
- A0.h = r6.H || r0 = [i1 ++ m2];\r
- A1.H = r5.h || r0 = [i1 ++ m1];\r
- r0.l = A0 (iu) || r4 = [i1 ++ m0];\r
- R1.H = A1 (s2rnd) || r0 = [i2 ++ m0];\r
- r1.h = a1 || r0 = [i2 ++ m1];\r
- R2.l = A0, r2.H = A1 (IH) || r0 = [i2 ++ m2];\r
- R2.l = A0, r2.H = A1 || r0 = [i2 ++ m3];\r
- r0.H = A1, R0.L = a0 (t) || r5 = [i3 ++ m0];\r
- r0.H = A1, R0.L = a0 (fu) || r5 = [i3 ++ m1];\r
- r0.H = A1, R0.L = a0 (is) || r5 = [i3 ++ m2];\r
- r0.H = A1, R0.L = a0 || r5 = [i3 ++ m3];\r
-\r
- A0 = A0 >> 31 || r0 = [fp - 32];\r
- a0 = a0 << 31 || r0 = [fp - 28];\r
- a1 = a1 >> 0 || r0 = [fp - 24];\r
- A1 = A1 << 0 || r0 = [fp - 20];\r
- r7 = r5 << 31 (s) || r0 = [fp - 16];\r
- R3 = r2 >>> 22 || r0 = [fp - 12];\r
- r1.L = R2.H << 15 (S) || r0 = [fp - 8];\r
- r5.h = r2.l >>> 2 || r0 = [fp - 4];\r
-\r
- r3.l = Ashift r4.h by r2.l || r0 = [fp - 100];\r
- R7.H = ASHIFT R7.L by R0.L (S) || r0 = [fp - 104];\r
- r7.h = ashift r7.l by r0.l (s) || r0 = [fp - 108];\r
- r6 = AShiFT R5 by R2.L || r0 = [fp - 112];\r
- R0 = Ashift R4 by r1.l (s) || r3 = [fp - 116];\r
- r2 = ashift r6 BY r3.L (S) || r0 = [fp - 120];\r
- A0 = Ashift a0 by r1.l || r0 = [fp - 124];\r
- a1 = ASHIFT a1 by r0.L || r0 = [fp - 128];\r
-\r
- r1.H = r2.l >> 15 || R5 = W [P1--] (z);\r
- r7.l = r0.L << 0 || R5 = W [P2] (z);\r
- r5 = r5 >> 31 || R7 = W [P2++] (z);\r
- r0 = r0 << 12 || R5 = W [P2--] (z);\r
- A0 = A0 >> 1 || R5 = W [P2+0] (z);\r
- A0 = A0 << 0 || R5 = W [P2+2] (z);\r
- a1 = A1 << 31 || R5 = W [P2+4] (z);\r
- a1 = a1 >> 16 || R5 = W [P2+30] (z);\r
- \r
- R1.H = LShift r2.h by r0.l || R5 = W [P2+24] (z);\r
- r0.l = LSHIFT r0.h by r1.l || R5 = W [P2+22] (z);\r
- r7.L = lshift r6.L BY r2.l || R5 = W [P2+20] (z);\r
- r5 = LShIft R4 bY r3.L || R4 = W [P2+18] (z);\r
- A0 = Lshift a0 By R6.L || R5 = W [P2+16] (z);\r
- A1 = LsHIFt a1 by r5.l || R5 = W [P2+14] (z);\r
-\r
- r7 = ROT r7 by -32 || R5 = W [P2+12] (z);\r
- R6 = Rot r7 by -31 || R5 = W [P2+10] (z);\r
- R5 = RoT R7 by 31 || R6 = W [P2+8] (z);\r
- R4 = Rot r7 by 30 || R5 = W [P2+6] (z);\r
- a0 = rot A0 by 0 || R5 = W [P3] (z);\r
- A0 = ROT a0 BY 10 || R5 = W [P3++] (z);\r
- A1 = ROT A1 by -20 || R5 = W [P3--] (z);\r
- A1 = ROT a1 By -32 || R5 = W [P4] (z);\r
-\r
- r0 = rot r1 by r2.L || R5 = W [P4++] (z);\r
- R0 = Rot R4 BY R3.L || R5 = W [P4--] (z);\r
- A0 = ROT A0 by r7.l || R5 = W [P5] (z);\r
- A1 = rot a1 bY r6.l || R5 = W [P5++] (z);\r
-\r
- NOp || R5 = W [P5--] (z);\r
+ .section .text;
+ A0 = A1 || P0 = [sp+20];
+ a1 = a0 || P0 = [p5+24];
+ a0 = R0 || P0 = [P4+28];
+ A1 = r1 || P0 = [P3+32];
+
+ R4 = A0 (fu) || P0 = [p3+36];
+ r5 = A1 (ISS2) || P0 = [P3+40];
+ R6 = a0 || P0 = [P4+44];
+ R7 = A1 || P0 = [P4+48];
+ R6 = A0, R7 = a1 || P0 = [P4+52];
+ r1 = a1, r0 = a0 (fu) || P0 = [P4+56];
+
+ A0.X = r5.l || p0 = [p4+60];
+ a1.X = r2.L || r0 = [i0 ++ m0];
+ r0.l = a0.x || r1 = [i0 ++ m1];
+ R7.l = A1.X || r0 = [i0 ++ m2];
+ A0.L = r3.l || r0 = [i0 ++ m3];
+ a1.l = r4.l || r0 = [i1 ++ m3];
+ A0.h = r6.H || r0 = [i1 ++ m2];
+ A1.H = r5.h || r0 = [i1 ++ m1];
+ r0.l = A0 (iu) || r4 = [i1 ++ m0];
+ R1.H = A1 (s2rnd) || r0 = [i2 ++ m0];
+ r1.h = a1 || r0 = [i2 ++ m1];
+ R2.l = A0, r2.H = A1 (IH) || r0 = [i2 ++ m2];
+ R2.l = A0, r2.H = A1 || r0 = [i2 ++ m3];
+ r0.H = A1, R0.L = a0 (t) || r5 = [i3 ++ m0];
+ r0.H = A1, R0.L = a0 (fu) || r5 = [i3 ++ m1];
+ r0.H = A1, R0.L = a0 (is) || r5 = [i3 ++ m2];
+ r0.H = A1, R0.L = a0 || r5 = [i3 ++ m3];
+
+ A0 = A0 >> 31 || r0 = [fp - 32];
+ a0 = a0 << 31 || r0 = [fp - 28];
+ a1 = a1 >> 0 || r0 = [fp - 24];
+ A1 = A1 << 0 || r0 = [fp - 20];
+ r7 = r5 << 31 (s) || r0 = [fp - 16];
+ R3 = r2 >>> 22 || r0 = [fp - 12];
+ r1.L = R2.H << 15 (S) || r0 = [fp - 8];
+ r5.h = r2.l >>> 2 || r0 = [fp - 4];
+
+ r3.l = Ashift r4.h by r2.l || r0 = [fp - 100];
+ R7.H = ASHIFT R7.L by R0.L (S) || r0 = [fp - 104];
+ r7.h = ashift r7.l by r0.l (s) || r0 = [fp - 108];
+ r6 = AShiFT R5 by R2.L || r0 = [fp - 112];
+ R0 = Ashift R4 by r1.l (s) || r3 = [fp - 116];
+ r2 = ashift r6 BY r3.L (S) || r0 = [fp - 120];
+ A0 = Ashift a0 by r1.l || r0 = [fp - 124];
+ a1 = ASHIFT a1 by r0.L || r0 = [fp - 128];
+
+ r1.H = r2.l >> 15 || R5 = W [P1--] (z);
+ r7.l = r0.L << 0 || R5 = W [P2] (z);
+ r5 = r5 >> 31 || R7 = W [P2++] (z);
+ r0 = r0 << 12 || R5 = W [P2--] (z);
+ A0 = A0 >> 1 || R5 = W [P2+0] (z);
+ A0 = A0 << 0 || R5 = W [P2+2] (z);
+ a1 = A1 << 31 || R5 = W [P2+4] (z);
+ a1 = a1 >> 16 || R5 = W [P2+30] (z);
+
+ R1.H = LShift r2.h by r0.l || R5 = W [P2+24] (z);
+ r0.l = LSHIFT r0.h by r1.l || R5 = W [P2+22] (z);
+ r7.L = lshift r6.L BY r2.l || R5 = W [P2+20] (z);
+ r5 = LShIft R4 bY r3.L || R4 = W [P2+18] (z);
+ A0 = Lshift a0 By R6.L || R5 = W [P2+16] (z);
+ A1 = LsHIFt a1 by r5.l || R5 = W [P2+14] (z);
+
+ r7 = ROT r7 by -32 || R5 = W [P2+12] (z);
+ R6 = Rot r7 by -31 || R5 = W [P2+10] (z);
+ R5 = RoT R7 by 31 || R6 = W [P2+8] (z);
+ R4 = Rot r7 by 30 || R5 = W [P2+6] (z);
+ a0 = rot A0 by 0 || R5 = W [P3] (z);
+ A0 = ROT a0 BY 10 || R5 = W [P3++] (z);
+ A1 = ROT A1 by -20 || R5 = W [P3--] (z);
+ A1 = ROT a1 By -32 || R5 = W [P4] (z);
+
+ r0 = rot r1 by r2.L || R5 = W [P4++] (z);
+ R0 = Rot R4 BY R3.L || R5 = W [P4--] (z);
+ A0 = ROT A0 by r7.l || R5 = W [P5] (z);
+ A1 = rot a1 bY r6.l || R5 = W [P5++] (z);
+
+ NOp || R5 = W [P5--] (z);
- .section .text;\r
- r4.h = r4.l = Sign (R1.h) * R5.h + Sign(r1.L) * R5.L|| [p0] = P0;\r
-\r
- R7 = Vit_Max (R5, r2) (ASL)|| [p0++] = P0;\r
- r0 = VIT_MAX (r0, r6) (asr)|| [p0--] = P0;\r
- r5.l = vit_max (R3) (asL)|| [p0+4] = P0;\r
- r2.L = VIT_Max (r2) (Asr)|| [p0+8] = P0;\r
-\r
- R5 = ABS R5 (V)|| [p0+60] = P0;\r
- r2 = abs r0 (v)|| [p0+56] = P0;\r
-\r
- R5 = r3 +|+ R2|| [p0+52] = P0;\r
- r5 = r3 +|+ r2 (Sco)|| [p1] = P0;\r
- r7 = R0 -|+ r6|| [p1++] = P0;\r
- r2 = R1 -|+ R3 (S)|| [p1--] = P0;\r
- R4 = R0 +|- R2|| [p1+48] = P0;\r
- R5 = r1 +|- r2 (CO)|| [p1+44] = P0;\r
- r6 = r3 -|- R4|| [p1+40] = P0;\r
- r7 = R5 -|- R6 (co)|| [p2] = P0;\r
-\r
- r5 = r4 +|+ r3, R7 = r4 -|- r3 (Sco, ASR)|| [p2++] = P0;\r
- R0 = R3 +|+ r6, R1 = R3 -|- R6 (ASL)|| [p2--] = P0;\r
- R7 = R1 +|- R2, R6 = R1 -|+ R2 (S)|| [p2+36] = P0;\r
- r1 = r2 +|- r3, r5 = r2 -|+ r3|| [p2+32] = P0;\r
-\r
- R5 = R0 + R1, R6 = R0 - R1|| [p3] = P0;\r
- r0 = r7 + r1, r3 = r7 - r1 (s)|| [p3++] = P0;\r
-\r
- r7 = A1 + A0, r5 = A1 - A0|| [p3--] = P0;\r
- r3 = a0 + a1, r6 = a0 - a1 (s)|| [p3+28] = P0;\r
-\r
- R1 = R3 >>> 15 (V)|| [p3+24] = P0;\r
- r4 = r0 >>> 4 (v)|| [p4] = P0;\r
- r5 = r0 << 0 (v,s)|| [p4++] = P0;\r
- r2 = r2 << 12 (v, S)|| [p4--] = P0;\r
-\r
- R7 = ASHIFT R5 BY R2.L (V)|| [p4+24] = P0;\r
- r0 = Ashift r2 by r0.L (v, s)|| [p4+20] = P0;\r
-\r
- R5 = r2 >> 15 (V)|| [p4+16] = P0;\r
- r0 = R1 << 2 (v)|| [p4+12] = P0;\r
-\r
- R4 = lshift r1 by r2.L (v)|| [p5] = P0;\r
-\r
- R6 = MAX (R0, R1) (V)|| [p5++] = P0;\r
- r0 = min (r2, r7) (v)|| [p5--] = P0;\r
-\r
- r2.h = r7.l * r6.h, r2.l = r7.h * r6.h|| [p5+8] = P0;\r
- R4.L = R1.L * R0.L, R4.H = R1.H * R0.H|| [p5+4] = P0;\r
- R0.h = R3.H * r2.l, r0.l=r3.l * r2.l|| [p5] = P0;\r
- r5.h = r3.h * r2.h (M), r5.l = r3.L * r2.L (fu)|| [sp] = P0;\r
- R0 = r4.l * r7.l, r1 = r4.h * r7.h (s2rnd)|| [sp++] = P0;\r
- R7 = R2.l * r5.l, r6 = r2.h * r5.h|| [sp--] = P0;\r
- R0.L = R7.L * R6.L, R0.H = R7.H * R6.H (ISS2)|| [sp+60] = P0;\r
- r3.h = r0.h * r1.h, r3.l = r0.l * r1.l (is)|| [fp] = P0;\r
-\r
- a1 = r2.l * r3.h, a0 = r2.h * R3.H|| [fp++] = P0;\r
- A0 = R1.l * R0.L, A1 += R1.h * R0.h|| [fp--] = P0;\r
- A1 = R5.h * R7.H, A0 += r5.L * r7.l (w32)|| [fp+0] = P0;\r
- a1 += r0.H * r1.H, A0 = R0.L * R1.l (is)|| [fp+60] = P0;\r
- a1 = r3.h * r4.h (m), a0 += r3.l * R4.L (FU)|| [p0] = P1;\r
- A1 += r4.H * R4.L, a0 -= r4.h * r4.h|| [p0] = P2;\r
-\r
- r0.l = (a0 += R7.l * R6.L), R0.H = (A1 += R7.H * R6.H) (Iss2)|| [p0] = P3;\r
- r2.H = A1, r2.l = (a0 += r0.L * r1.L) (s2rnd)|| [p0] = P4;\r
- r7.h = (a1 = r2.h * r1.h), a0 += r2.l * r1.l|| [p0] = P5;\r
- R2.H = (A1 = R7.L * R6.H), R2.L = (A0 = R7.H * R6.h)|| [p0] = fp;\r
- r6.L = (A0 = R3.L * r2.L), R6.H = (A1 += R3.H * R2.H)|| [p0] = sp;\r
- R7.h = (a1 += r6.h * r5.l), r7.l = (a0=r6.h * r5.h)|| [p0] = r1;\r
- r0.h = (A1 = r7.h * R4.l) (M), R0.l = (a0 += r7.l * r4.l)|| [p0++] = r2;\r
- R5.H = (a1 = r3.h * r2.h) (m), r5.l= (a0 += r3.l * r2.l) (fu)|| [p1--] = r3;\r
- r0.h = (A1 += R3.h * R2.h), R0.L = ( A0 = R3.L * R2.L) (is)|| [i0] = r0;\r
-\r
- R3 = (A1 = R6.H * R7.H) (M), A0 -= R6.L * R7.L|| [i0++] = r1;\r
- r1 = (a1 = r7.l * r4.l) (m), r0 = (a0 += r7.h * r4.h)|| [i0--] = r2;\r
- R0 = (a0 += r7.l * r6.l), r1 = (a1+= r7.h * r6.h) (ISS2)|| [i1] = r3;\r
- r4 = (a0 = r6.l * r7.l), r5 = (a1 += r6.h * r7.h)|| [i1++] = r3;\r
- R7 = (A1 += r3.h * r5.H), R6 = (A0 -= r3.l * r5.l)|| [i1--] = r3;\r
- r5 = (a1 -= r6.h * r7.h), a0 += r6.l * r7.l|| [i2] = r0;\r
- R3 = (A1 = r6.h * R7.h), R2 = (A0 = R6.l * r7.l)|| [i2++] = r0;\r
- R5 = (A1 = r3.h * r7.h) (M), r4 = (A0 += R3.l * r7.l) (fu)|| [i2--] = R0;\r
- R3 = a1, r2 = (a0 += r0.l *r1.l) (s2rnd)|| [i3] = R7;\r
- r1 = (a1 += r3.h * r2.h), r0 = (a0 = r3.l * r2.l) (is)|| [i3++] = R7;\r
-\r
- R0 = - R1 (V)|| [i3--] = R6;\r
- r7 = - r2 (v)|| [p0++p1] = R0;\r
-\r
- R7 = Pack (r0.h, r1.l)|| [p0++p1] = R3;\r
- r6 = PACK (r1.H, r6.H)|| [p0++p2] = r0;\r
- R5 = pack (R2.L, R2.H)|| [p0++p3] = r4;\r
- \r
- (R0, R1) = search R2 (lt)|| r2 = [p0+4];\r
- (r6, r7) = Search r0 (LE)|| r5 = [p0--];\r
- (r3, r6) = SEARCH r1 (Gt)|| r0 = [p0+20];\r
- (r4, R5) = sEARch r3 (gE)|| r1 = [p0++];\r
+ .section .text;
+ r4.h = r4.l = Sign (R1.h) * R5.h + Sign(r1.L) * R5.L|| [p0] = P0;
+
+ R7 = Vit_Max (R5, r2) (ASL)|| [p0++] = P0;
+ r0 = VIT_MAX (r0, r6) (asr)|| [p0--] = P0;
+ r5.l = vit_max (R3) (asL)|| [p0+4] = P0;
+ r2.L = VIT_Max (r2) (Asr)|| [p0+8] = P0;
+
+ R5 = ABS R5 (V)|| [p0+60] = P0;
+ r2 = abs r0 (v)|| [p0+56] = P0;
+
+ R5 = r3 +|+ R2|| [p0+52] = P0;
+ r5 = r3 +|+ r2 (Sco)|| [p1] = P0;
+ r7 = R0 -|+ r6|| [p1++] = P0;
+ r2 = R1 -|+ R3 (S)|| [p1--] = P0;
+ R4 = R0 +|- R2|| [p1+48] = P0;
+ R5 = r1 +|- r2 (CO)|| [p1+44] = P0;
+ r6 = r3 -|- R4|| [p1+40] = P0;
+ r7 = R5 -|- R6 (co)|| [p2] = P0;
+
+ r5 = r4 +|+ r3, R7 = r4 -|- r3 (Sco, ASR)|| [p2++] = P0;
+ R0 = R3 +|+ r6, R1 = R3 -|- R6 (ASL)|| [p2--] = P0;
+ R7 = R1 +|- R2, R6 = R1 -|+ R2 (S)|| [p2+36] = P0;
+ r1 = r2 +|- r3, r5 = r2 -|+ r3|| [p2+32] = P0;
+
+ R5 = R0 + R1, R6 = R0 - R1|| [p3] = P0;
+ r0 = r7 + r1, r3 = r7 - r1 (s)|| [p3++] = P0;
+
+ r7 = A1 + A0, r5 = A1 - A0|| [p3--] = P0;
+ r3 = a0 + a1, r6 = a0 - a1 (s)|| [p3+28] = P0;
+
+ R1 = R3 >>> 15 (V)|| [p3+24] = P0;
+ r4 = r0 >>> 4 (v)|| [p4] = P0;
+ r5 = r0 << 0 (v,s)|| [p4++] = P0;
+ r2 = r2 << 12 (v, S)|| [p4--] = P0;
+
+ R7 = ASHIFT R5 BY R2.L (V)|| [p4+24] = P0;
+ r0 = Ashift r2 by r0.L (v, s)|| [p4+20] = P0;
+
+ R5 = r2 >> 15 (V)|| [p4+16] = P0;
+ r0 = R1 << 2 (v)|| [p4+12] = P0;
+
+ R4 = lshift r1 by r2.L (v)|| [p5] = P0;
+
+ R6 = MAX (R0, R1) (V)|| [p5++] = P0;
+ r0 = min (r2, r7) (v)|| [p5--] = P0;
+
+ r2.h = r7.l * r6.h, r2.l = r7.h * r6.h|| [p5+8] = P0;
+ R4.L = R1.L * R0.L, R4.H = R1.H * R0.H|| [p5+4] = P0;
+ R0.h = R3.H * r2.l, r0.l=r3.l * r2.l|| [p5] = P0;
+ r5.h = r3.h * r2.h (M), r5.l = r3.L * r2.L (fu)|| [sp] = P0;
+ R0 = r4.l * r7.l, r1 = r4.h * r7.h (s2rnd)|| [sp++] = P0;
+ R7 = R2.l * r5.l, r6 = r2.h * r5.h|| [sp--] = P0;
+ R0.L = R7.L * R6.L, R0.H = R7.H * R6.H (ISS2)|| [sp+60] = P0;
+ r3.h = r0.h * r1.h, r3.l = r0.l * r1.l (is)|| [fp] = P0;
+
+ a1 = r2.l * r3.h, a0 = r2.h * R3.H|| [fp++] = P0;
+ A0 = R1.l * R0.L, A1 += R1.h * R0.h|| [fp--] = P0;
+ A1 = R5.h * R7.H, A0 += r5.L * r7.l (w32)|| [fp+0] = P0;
+ a1 += r0.H * r1.H, A0 = R0.L * R1.l (is)|| [fp+60] = P0;
+ a1 = r3.h * r4.h (m), a0 += r3.l * R4.L (FU)|| [p0] = P1;
+ A1 += r4.H * R4.L, a0 -= r4.h * r4.h|| [p0] = P2;
+
+ r0.l = (a0 += R7.l * R6.L), R0.H = (A1 += R7.H * R6.H) (Iss2)|| [p0] = P3;
+ r2.H = A1, r2.l = (a0 += r0.L * r1.L) (s2rnd)|| [p0] = P4;
+ r7.h = (a1 = r2.h * r1.h), a0 += r2.l * r1.l|| [p0] = P5;
+ R2.H = (A1 = R7.L * R6.H), R2.L = (A0 = R7.H * R6.h)|| [p0] = fp;
+ r6.L = (A0 = R3.L * r2.L), R6.H = (A1 += R3.H * R2.H)|| [p0] = sp;
+ R7.h = (a1 += r6.h * r5.l), r7.l = (a0=r6.h * r5.h)|| [p0] = r1;
+ r0.h = (A1 = r7.h * R4.l) (M), R0.l = (a0 += r7.l * r4.l)|| [p0++] = r2;
+ R5.H = (a1 = r3.h * r2.h) (m), r5.l= (a0 += r3.l * r2.l) (fu)|| [p1--] = r3;
+ r0.h = (A1 += R3.h * R2.h), R0.L = ( A0 = R3.L * R2.L) (is)|| [i0] = r0;
+
+ R3 = (A1 = R6.H * R7.H) (M), A0 -= R6.L * R7.L|| [i0++] = r1;
+ r1 = (a1 = r7.l * r4.l) (m), r0 = (a0 += r7.h * r4.h)|| [i0--] = r2;
+ R0 = (a0 += r7.l * r6.l), r1 = (a1+= r7.h * r6.h) (ISS2)|| [i1] = r3;
+ r4 = (a0 = r6.l * r7.l), r5 = (a1 += r6.h * r7.h)|| [i1++] = r3;
+ R7 = (A1 += r3.h * r5.H), R6 = (A0 -= r3.l * r5.l)|| [i1--] = r3;
+ r5 = (a1 -= r6.h * r7.h), a0 += r6.l * r7.l|| [i2] = r0;
+ R3 = (A1 = r6.h * R7.h), R2 = (A0 = R6.l * r7.l)|| [i2++] = r0;
+ R5 = (A1 = r3.h * r7.h) (M), r4 = (A0 += R3.l * r7.l) (fu)|| [i2--] = R0;
+ R3 = a1, r2 = (a0 += r0.l *r1.l) (s2rnd)|| [i3] = R7;
+ r1 = (a1 += r3.h * r2.h), r0 = (a0 = r3.l * r2.l) (is)|| [i3++] = R7;
+
+ R0 = - R1 (V)|| [i3--] = R6;
+ r7 = - r2 (v)|| [p0++p1] = R0;
+
+ R7 = Pack (r0.h, r1.l)|| [p0++p1] = R3;
+ r6 = PACK (r1.H, r6.H)|| [p0++p2] = r0;
+ R5 = pack (R2.L, R2.H)|| [p0++p3] = r4;
+
+ (R0, R1) = search R2 (lt)|| r2 = [p0+4];
+ (r6, r7) = Search r0 (LE)|| r5 = [p0--];
+ (r3, r6) = SEARCH r1 (Gt)|| r0 = [p0+20];
+ (r4, R5) = sEARch r3 (gE)|| r1 = [p0++];
- .section .text;\r
- R7 = Align8 (r5, r2) || [i0] = r0;\r
- R5 = ALIGN16 (R0, R1) || [i0++] = r0;\r
- r2 = ALIGN24 (r5, r0) || [i0--] = r0;\r
-\r
- DISAlgnExcpt || [i1] = r0;\r
-\r
- R5 = Byteop3p (r1:0, r3:2) (lO) \r
- || [i1++] = r0;\r
- R0 = BYTEOP3P (R1:0, R3:2) (HI) || // comment test\r
- [i1--] = r0;\r
- R1 = byteop3p (r1:0, r3:2) (LO, r) || [i2] = r0;\r
- r2 = ByteOp3P (r1:0, R3:2) (hi, R) || [i2++] = r0;\r
-\r
- R5 = A1.l + A1.h, R2 = a0.l + a0.h || [i2--] = r0;\r
-\r
- (r2, r3) = BYTEOP16P (R1:0, R3:2) || [i3] = r0;\r
- (R6, R0) = byteop16p (r1:0, r3:2) (r) || [i3++] = r0;\r
-\r
- R7 = BYTEOP1P (R1:0, R3:2) (t) || [i3--] = r0;\r
- r2 = byteop1p (r1:0, r3:2) (t) || [p0] = r0;\r
- R3 = ByteOp1P (r1:0, R3:2) (R) || [p0++] = r0;\r
- r7 = byteOP1P (R1:0, r3:2) (T, r) || [p0--] = r0;\r
-\r
- R0 = BYTEOP2P (R1:0, R3:2) (RNDL) || [p1] = r0;\r
- r1 = byteop2p (r1:0, r3:2) (rndh) || [p1++] = r0;\r
- R2 = Byteop2p (R1:0, R3:2) (tL) || [p1--] = r0;\r
- R3 = Byteop2p (r1:0, r3:2) (TH) || [p2] = r0;\r
- r4 = ByTEOP2P (r1:0, R3:2) (Rndl, R) || [p2++] = r0;\r
- R5 = byTeOp2p (R1:0, r3:2) (rndH, r) || [p2--] = r0;\r
- r6 = BYTEop2p (r1:0, r3:2) (tl, R) || [p3] = r0;\r
- R7 = byteop2p (r1:0, R3:2) (TH, r) || [p3++] = r0;\r
-\r
- R5 = BytePack (R0, R3) || [p3--] = r0;\r
-\r
- (R6, R2) = ByteOp16M (r1:0, r3:2) || [p4] = r0;\r
- (r0, r5) = byteop16m (R1:0, R3:2) (r) || [p4++] = r0;\r
-\r
- saa (r1:0, r3:2) || [p4--] = r0;\r
- SAA (R1:0, R3:2) (r) || [p5] = r0;\r
-\r
- (R7, R2) = byteunpack R1:0 || [p5++] = r0;\r
- (R6, R4) = BYTEUNPACK r3:2 (R) || [p5--] = r0;\r
+ .section .text;
+ R7 = Align8 (r5, r2) || [i0] = r0;
+ R5 = ALIGN16 (R0, R1) || [i0++] = r0;
+ r2 = ALIGN24 (r5, r0) || [i0--] = r0;
+
+ DISAlgnExcpt || [i1] = r0;
+
+ R5 = Byteop3p (r1:0, r3:2) (lO)
+ || [i1++] = r0;
+ R0 = BYTEOP3P (R1:0, R3:2) (HI) || // comment test
+ [i1--] = r0;
+ R1 = byteop3p (r1:0, r3:2) (LO, r) || [i2] = r0;
+ r2 = ByteOp3P (r1:0, R3:2) (hi, R) || [i2++] = r0;
+
+ R5 = A1.l + A1.h, R2 = a0.l + a0.h || [i2--] = r0;
+
+ (r2, r3) = BYTEOP16P (R1:0, R3:2) || [i3] = r0;
+ (R6, R0) = byteop16p (r1:0, r3:2) (r) || [i3++] = r0;
+
+ R7 = BYTEOP1P (R1:0, R3:2) (t) || [i3--] = r0;
+ r2 = byteop1p (r1:0, r3:2) (t) || [p0] = r0;
+ R3 = ByteOp1P (r1:0, R3:2) (R) || [p0++] = r0;
+ r7 = byteOP1P (R1:0, r3:2) (T, r) || [p0--] = r0;
+
+ R0 = BYTEOP2P (R1:0, R3:2) (RNDL) || [p1] = r0;
+ r1 = byteop2p (r1:0, r3:2) (rndh) || [p1++] = r0;
+ R2 = Byteop2p (R1:0, R3:2) (tL) || [p1--] = r0;
+ R3 = Byteop2p (r1:0, r3:2) (TH) || [p2] = r0;
+ r4 = ByTEOP2P (r1:0, R3:2) (Rndl, R) || [p2++] = r0;
+ R5 = byTeOp2p (R1:0, r3:2) (rndH, r) || [p2--] = r0;
+ r6 = BYTEop2p (r1:0, r3:2) (tl, R) || [p3] = r0;
+ R7 = byteop2p (r1:0, R3:2) (TH, r) || [p3++] = r0;
+
+ R5 = BytePack (R0, R3) || [p3--] = r0;
+
+ (R6, R2) = ByteOp16M (r1:0, r3:2) || [p4] = r0;
+ (r0, r5) = byteop16m (R1:0, R3:2) (r) || [p4++] = r0;
+
+ saa (r1:0, r3:2) || [p4--] = r0;
+ SAA (R1:0, R3:2) (r) || [p5] = r0;
+
+ (R7, R2) = byteunpack R1:0 || [p5++] = r0;
+ (R6, R4) = BYTEUNPACK r3:2 (R) || [p5--] = r0;
-\r
-.EXTERN MY_LABEL2;\r
-.section .text;\r
-\r
-//\r
-//9 SHIFT/ROTATE OPERATIONS\r
-//\r
-\r
-//Preg = ( Preg + Preg ) << 1 ; /* dest_reg = (dest_reg + src_reg) x 2 (a) */\r
-P0 = (P0+P0)<<1;\r
-P0 = (P0+P1)<<1;\r
-P2 = (P2+P0)<<1;\r
-P1 = (P1+P2)<<1;\r
-\r
-//P0 = (P2+P0)<<1;\r
-\r
-//Preg = ( Preg + Preg ) << 2 ; /* dest_reg = (dest_reg + src_reg) x 4 (a) */\r
-P0 = (P0+P0)<<2;\r
-P0 = (P0+P1)<<2;\r
-P2 = (P2+P0)<<2;\r
-P1 = (P1+P2)<<2;\r
-\r
-//P0 = (P2+P0)<<2;\r
-\r
-//Dreg = (Dreg + Dreg) << 1 ; /* dest_reg = (dest_reg + src_reg) x 2 (a) */\r
-R0 = (R0+R0)<<1;\r
-R0 = (R0+R1)<<1;\r
-R2 = (R2+R0)<<1;\r
-R1 = (R1+R2)<<1;\r
-\r
-//R0 = (R2+R0)<<1;\r
-\r
-\r
-//Dreg = (Dreg + Dreg) << 2 ; /* dest_reg = (dest_reg + src_reg) x 4 (a) */\r
-R0 = (R0+R0)<<2;\r
-R0 = (R0+R1)<<2;\r
-R2 = (R2+R0)<<2;\r
-R1 = (R1+R2)<<2;\r
-\r
-//R0 = (R2+R0)<<2;\r
-\r
-//Preg = Preg + ( Preg << 1 ) ; /* adder_pntr + (src_pntr x 2) (a) */\r
-P0 = P0 + (P0 << 1);\r
-P0 = P0 + (P1 << 1);\r
-P0 = P0 + (P2 << 1);\r
-P0 = P1 + (P2 << 1);\r
-P0 = P2 + (P3 << 1);\r
-P1 = P0 + (P0 << 1);\r
-P1 = P0 + (P1 << 1);\r
-P1 = P0 + (P2 << 1);\r
-P1 = P1 + (P2 << 1);\r
-P1 = P2 + (P3 << 1);\r
-\r
-//Preg = Preg + ( Preg << 2 ) ; /* adder_pntr + (src_pntr x 4) (a) */\r
-P0 = P0 + (P0 << 2);\r
-P0 = P0 + (P1 << 2);\r
-P0 = P0 + (P2 << 2);\r
-P0 = P1 + (P2 << 2);\r
-P0 = P2 + (P3 << 2);\r
-P1 = P0 + (P0 << 2);\r
-P1 = P0 + (P1 << 2);\r
-P1 = P0 + (P2 << 2);\r
-P1 = P1 + (P2 << 2);\r
-P1 = P2 + (P3 << 2);\r
-\r
-//Dreg >>>= uimm5 ; /* arithmetic right shift (a) */\r
-R0 >>>= 0;\r
-R0 >>>= 31;\r
-R0 >>>= 5;\r
-R5 >>>= 0;\r
-R5 >>>= 31;\r
-R5 >>>= 5;\r
-\r
-//Dreg <<= uimm5 ; /* logical left shift (a) */\r
-R0 <<= 0;\r
-R0 <<= 31;\r
-R0 <<= 5;\r
-R5 <<= 0;\r
-R5 <<= 31;\r
-R5 <<= 5;\r
-//Dreg_lo_hi = Dreg_lo_hi >>> uimm4 ; /* arithmetic right shift (b) */\r
-R0.L = R0.L >>> 0;\r
-R0.L = R0.L >>> 15;\r
-R0.L = R0.H >>> 0;\r
-R0.L = R0.H >>> 15;\r
-R0.H = R0.L >>> 0;\r
-R0.H = R0.L >>> 15;\r
-R0.H = R0.H >>> 0;\r
-R0.H = R0.H >>> 15;\r
-\r
-R0.L = R1.L >>> 0;\r
-R0.L = R1.L >>> 15;\r
-R0.L = R1.H >>> 0;\r
-R0.L = R1.H >>> 15;\r
-R0.H = R1.L >>> 0;\r
-R0.H = R1.L >>> 15;\r
-R0.H = R1.H >>> 0;\r
-R0.H = R1.H >>> 15;\r
-\r
-R0.L = R7.L >>> 0;\r
-R1.L = R6.L >>> 15;\r
-R2.L = R5.H >>> 0;\r
-R3.L = R4.H >>> 15;\r
-R4.H = R3.L >>> 0;\r
-R5.H = R2.L >>> 15;\r
-R6.H = R1.H >>> 0;\r
-R7.H = R0.H >>> 15;\r
-\r
-//Dreg_lo_hi = Dreg_lo_hi << uimm4 (S) ; /* arithmetic left shift (b) */\r
-R0.L = R0.L << 0(S);\r
-R0.L = R0.L << 15(S);\r
-R0.L = R0.H << 0(S);\r
-R0.L = R0.H << 15(S);\r
-R0.H = R0.L << 0(S);\r
-R0.H = R0.L << 15(S);\r
-R0.H = R0.H << 0(S);\r
-R0.H = R0.H << 15(S);\r
-\r
-R0.L = R1.L << 0(S);\r
-R0.L = R1.L << 15(S);\r
-R0.L = R1.H << 0(S);\r
-R0.L = R1.H << 15(S);\r
-R0.H = R1.L << 0(S);\r
-R0.H = R1.L << 15(S);\r
-R0.H = R1.H << 0(S);\r
-R0.H = R1.H << 15(S);\r
-\r
-R0.L = R7.L << 0(S);\r
-R1.L = R6.L << 15(S);\r
-R2.L = R5.H << 0(S);\r
-R3.L = R4.H << 15(S);\r
-R4.H = R3.L << 0(S);\r
-R5.H = R2.L << 15(S);\r
-R6.H = R1.H << 0(S);\r
-R7.H = R0.H << 15(S);\r
-//Dreg = Dreg >>> uimm5 ; /* arithmetic right shift (b) */\r
-R0 = R0 >>> 0;\r
-R0 = R0 >>> 31;\r
-R0 = R1 >>> 0;\r
-R0 = R1 >>> 31;\r
-R7 = R0 >>> 0;\r
-R6 = R1 >>> 31;\r
-R5 = R2 >>> 0;\r
-R4 = R3 >>> 31;\r
-R3 = R4 >>> 0;\r
-R2 = R5 >>> 31;\r
-R1 = R6 >>> 0;\r
-R0 = R7 >>> 31;\r
-\r
-//Dreg = Dreg << uimm5 (S) ; /* arithmetic left shift (b) */\r
-R0 = R0 << 0(S);\r
-R0 = R0 << 31(S);\r
-R0 = R1 << 0(S);\r
-R0 = R1 << 31(S);\r
-R7 = R0 << 0(S);\r
-R6 = R1 << 31(S);\r
-R5 = R2 << 0(S);\r
-R4 = R3 << 31(S);\r
-R3 = R4 << 0(S);\r
-R2 = R5 << 31(S);\r
-R1 = R6 << 0(S);\r
-R0 = R7 << 31(S);\r
-//A0 = A0 >>> uimm5 ; /* arithmetic right shift (b) */\r
-A0 = A0 >>> 0;\r
-A0 = A0 >>> 15;\r
-A0 = A0 >>> 31;\r
-\r
-//A0 = A0 << uimm5 ; /* logical left shift (b) */\r
-A0 = A0 << 0;\r
-A0 = A0 << 15;\r
-A0 = A0 << 31;\r
-\r
-//A1 = A1 >>> uimm5 ; /* arithmetic right shift (b) */\r
-A1 = A1 >>> 0;\r
-A1 = A1 >>> 15;\r
-A1 = A1 >>> 31;\r
-\r
-//A1 = A1 << uimm5 ; /* logical left shift (b) */\r
-A1 = A1 << 0;\r
-A1 = A1 << 15;\r
-A1 = A1 << 31;\r
-\r
-//Dreg >>>= Dreg ; /* arithmetic right shift (a) */\r
-R0 >>>= R0;\r
-R0 >>>= R1;\r
-R1 >>>= R0;\r
-R1 >>>= R7;\r
-\r
-//Dreg <<= Dreg ; /* logical left shift (a) */\r
-R0 <<= R0;\r
-R0 <<= R1;\r
-R1 <<= R0;\r
-R1 <<= R7;\r
-\r
-//Dreg_lo_hi = ASHIFT Dreg_lo_hi BY Dreg_lo (opt_sat) ; /* arithmetic right shift (b) */\r
-r3.l = ashift r0.h by r7.l ; /* shift, half-word */\r
-r3.h = ashift r0.l by r7.l ;\r
-r3.h = ashift r0.h by r7.l ;\r
-r3.l = ashift r0.l by r7.l ;\r
-r3.l = ashift r0.h by r7.l(s) ; /* shift, half-word, saturated */\r
-r3.h = ashift r0.l by r7.l(s) ; /* shift, half-word, saturated */\r
-r3.h = ashift r0.h by r7.l(s) ;\r
-r3.l = ashift r0.l by r7.l (s) ;\r
-\r
-//Dreg = ASHIFT Dreg BY Dreg_lo (opt_sat) ; /* arithmetic right shift (b) */\r
-r4 = ashift r2 by r7.l ; /* shift, word */\r
-r4 = ashift r2 by r7.l (s) ; /* shift, word, saturated */\r
-\r
-//A0 = ASHIFT A0 BY Dreg_lo ; /* arithmetic right shift (b)*/\r
-A0 = ashift A0 by r7.l ; /* shift, Accumulator */\r
-\r
-//A1 = ASHIFT A1 BY Dreg_lo ; /* arithmetic right shift (b)*/\r
-A1 = ashift A1 by r7.l ; /* shift, Accumulator */\r
-\r
-p3 = p2 >> 1 ; /* pointer right shift by 1 */\r
-p3 = p3 >> 2 ; /* pointer right shift by 2 */\r
-p4 = p5 << 1 ; /* pointer left shift by 1 */\r
-p0 = p1 << 2 ; /* pointer left shift by 2 */\r
-r3 >>= 17 ; /* data right shift */\r
-r3 <<= 17 ; /* data left shift */\r
-r3.l = r0.l >> 4 ; /* data right shift, half-word register */\r
-r3.l = r0.h >> 4 ; /* same as above; half-word register combinations are arbitrary */\r
-r3.h = r0.l << 12 ; /* data left shift, half-word register */\r
-r3.h = r0.h << 14 ; /* same as above; half-word register combinations are arbitrary */\r
-\r
-r3 = r6 >> 4 ; /* right shift, 32-bit word */\r
-r3 = r6 << 4 ; /* left shift, 32-bit word */\r
-\r
-a0 = a0 >> 7 ; /* Accumulator right shift */\r
-a1 = a1 >> 25 ; /* Accumulator right shift */\r
-a0 = a0 << 7 ; /* Accumulator left shift */\r
-a1 = a1 << 14 ; /* Accumulator left shift */\r
-\r
-r3 >>= r0 ; /* data right shift */\r
-r3 <<= r1 ; /* data left shift */\r
-\r
-r3.l = lshift r0.l by r2.l ; /* shift direction controlled by sign of R2.L */\r
-r3.h = lshift r0.l by r2.l ;\r
-\r
-a0 = lshift a0 by r7.l ;\r
-a1 = lshift a1 by r7.l ;\r
-\r
-r4 = rot r1 by 31 ; /* rotate left */\r
-r4 = rot r1 by -32 ; /* rotate right */\r
-r4 = rot r1 by 5 ; /* rotate right */\r
-\r
-a0 = rot a0 by 22 ; /* rotate Accumulator left */\r
-a0 = rot a0 by -32 ; /* rotate Accumulator left */\r
-a0 = rot a0 by 31 ; /* rotate Accumulator left */\r
-\r
-a1 = rot a1 by -32 ; /* rotate Accumulator right */\r
-a1 = rot a1 by 31 ; /* rotate Accumulator right */\r
-a1 = rot a1 by 22 ; /* rotate Accumulator right */\r
-\r
-r4 = rot r1 by r2.l ;\r
-a0 = rot a0 by r3.l ;\r
-a1 = rot a1 by r7.l ;\r
-\r
-r0.l = r1.l << 0;\r
-r0.l = r1.l << 1;\r
-r0.l = r1.l << 2;\r
-r0.l = r1.l << 4;\r
-r0.l = r1.l >> 0;\r
-r0.l = r1.l >> 1;\r
-r0.l = r1.l >> 2;\r
-r0.l = r1.l >> 4;\r
-r0.l = r1.l >>> 1;\r
-r0.l = r1.l >>> 2;\r
-r0.l = r1.l >>> 4;\r
-\r
-r0.l = r1.h << 0;\r
-r0.l = r1.h << 1;\r
-r0.l = r1.h << 2;\r
-r0.l = r1.h << 4;\r
-r0.l = r1.h >> 0;\r
-r0.l = r1.h >> 1;\r
-r0.l = r1.h >> 2;\r
-r0.l = r1.h >> 4;\r
-r0.l = r1.h >>> 1;\r
-r0.l = r1.h >>> 2;\r
-r0.l = r1.h >>> 4;\r
-\r
-r0.l = r1.h << 0 (S);\r
-r0.l = r1.h << 1 (S);\r
-r0.l = r1.h << 2 (S);\r
-r0.l = r1.h << 4 (S);\r
-r0.l = r1.h >>> 1 (S);\r
-r0.l = r1.h >>> 2 (S);\r
-r0.l = r1.h >>> 4 (S);\r
-\r
+
+.EXTERN MY_LABEL2;
+.section .text;
+
+//
+//9 SHIFT/ROTATE OPERATIONS
+//
+
+//Preg = ( Preg + Preg ) << 1 ; /* dest_reg = (dest_reg + src_reg) x 2 (a) */
+P0 = (P0+P0)<<1;
+P0 = (P0+P1)<<1;
+P2 = (P2+P0)<<1;
+P1 = (P1+P2)<<1;
+
+//P0 = (P2+P0)<<1;
+
+//Preg = ( Preg + Preg ) << 2 ; /* dest_reg = (dest_reg + src_reg) x 4 (a) */
+P0 = (P0+P0)<<2;
+P0 = (P0+P1)<<2;
+P2 = (P2+P0)<<2;
+P1 = (P1+P2)<<2;
+
+//P0 = (P2+P0)<<2;
+
+//Dreg = (Dreg + Dreg) << 1 ; /* dest_reg = (dest_reg + src_reg) x 2 (a) */
+R0 = (R0+R0)<<1;
+R0 = (R0+R1)<<1;
+R2 = (R2+R0)<<1;
+R1 = (R1+R2)<<1;
+
+//R0 = (R2+R0)<<1;
+
+
+//Dreg = (Dreg + Dreg) << 2 ; /* dest_reg = (dest_reg + src_reg) x 4 (a) */
+R0 = (R0+R0)<<2;
+R0 = (R0+R1)<<2;
+R2 = (R2+R0)<<2;
+R1 = (R1+R2)<<2;
+
+//R0 = (R2+R0)<<2;
+
+//Preg = Preg + ( Preg << 1 ) ; /* adder_pntr + (src_pntr x 2) (a) */
+P0 = P0 + (P0 << 1);
+P0 = P0 + (P1 << 1);
+P0 = P0 + (P2 << 1);
+P0 = P1 + (P2 << 1);
+P0 = P2 + (P3 << 1);
+P1 = P0 + (P0 << 1);
+P1 = P0 + (P1 << 1);
+P1 = P0 + (P2 << 1);
+P1 = P1 + (P2 << 1);
+P1 = P2 + (P3 << 1);
+
+//Preg = Preg + ( Preg << 2 ) ; /* adder_pntr + (src_pntr x 4) (a) */
+P0 = P0 + (P0 << 2);
+P0 = P0 + (P1 << 2);
+P0 = P0 + (P2 << 2);
+P0 = P1 + (P2 << 2);
+P0 = P2 + (P3 << 2);
+P1 = P0 + (P0 << 2);
+P1 = P0 + (P1 << 2);
+P1 = P0 + (P2 << 2);
+P1 = P1 + (P2 << 2);
+P1 = P2 + (P3 << 2);
+
+//Dreg >>>= uimm5 ; /* arithmetic right shift (a) */
+R0 >>>= 0;
+R0 >>>= 31;
+R0 >>>= 5;
+R5 >>>= 0;
+R5 >>>= 31;
+R5 >>>= 5;
+
+//Dreg <<= uimm5 ; /* logical left shift (a) */
+R0 <<= 0;
+R0 <<= 31;
+R0 <<= 5;
+R5 <<= 0;
+R5 <<= 31;
+R5 <<= 5;
+//Dreg_lo_hi = Dreg_lo_hi >>> uimm4 ; /* arithmetic right shift (b) */
+R0.L = R0.L >>> 0;
+R0.L = R0.L >>> 15;
+R0.L = R0.H >>> 0;
+R0.L = R0.H >>> 15;
+R0.H = R0.L >>> 0;
+R0.H = R0.L >>> 15;
+R0.H = R0.H >>> 0;
+R0.H = R0.H >>> 15;
+
+R0.L = R1.L >>> 0;
+R0.L = R1.L >>> 15;
+R0.L = R1.H >>> 0;
+R0.L = R1.H >>> 15;
+R0.H = R1.L >>> 0;
+R0.H = R1.L >>> 15;
+R0.H = R1.H >>> 0;
+R0.H = R1.H >>> 15;
+
+R0.L = R7.L >>> 0;
+R1.L = R6.L >>> 15;
+R2.L = R5.H >>> 0;
+R3.L = R4.H >>> 15;
+R4.H = R3.L >>> 0;
+R5.H = R2.L >>> 15;
+R6.H = R1.H >>> 0;
+R7.H = R0.H >>> 15;
+
+//Dreg_lo_hi = Dreg_lo_hi << uimm4 (S) ; /* arithmetic left shift (b) */
+R0.L = R0.L << 0(S);
+R0.L = R0.L << 15(S);
+R0.L = R0.H << 0(S);
+R0.L = R0.H << 15(S);
+R0.H = R0.L << 0(S);
+R0.H = R0.L << 15(S);
+R0.H = R0.H << 0(S);
+R0.H = R0.H << 15(S);
+
+R0.L = R1.L << 0(S);
+R0.L = R1.L << 15(S);
+R0.L = R1.H << 0(S);
+R0.L = R1.H << 15(S);
+R0.H = R1.L << 0(S);
+R0.H = R1.L << 15(S);
+R0.H = R1.H << 0(S);
+R0.H = R1.H << 15(S);
+
+R0.L = R7.L << 0(S);
+R1.L = R6.L << 15(S);
+R2.L = R5.H << 0(S);
+R3.L = R4.H << 15(S);
+R4.H = R3.L << 0(S);
+R5.H = R2.L << 15(S);
+R6.H = R1.H << 0(S);
+R7.H = R0.H << 15(S);
+//Dreg = Dreg >>> uimm5 ; /* arithmetic right shift (b) */
+R0 = R0 >>> 0;
+R0 = R0 >>> 31;
+R0 = R1 >>> 0;
+R0 = R1 >>> 31;
+R7 = R0 >>> 0;
+R6 = R1 >>> 31;
+R5 = R2 >>> 0;
+R4 = R3 >>> 31;
+R3 = R4 >>> 0;
+R2 = R5 >>> 31;
+R1 = R6 >>> 0;
+R0 = R7 >>> 31;
+
+//Dreg = Dreg << uimm5 (S) ; /* arithmetic left shift (b) */
+R0 = R0 << 0(S);
+R0 = R0 << 31(S);
+R0 = R1 << 0(S);
+R0 = R1 << 31(S);
+R7 = R0 << 0(S);
+R6 = R1 << 31(S);
+R5 = R2 << 0(S);
+R4 = R3 << 31(S);
+R3 = R4 << 0(S);
+R2 = R5 << 31(S);
+R1 = R6 << 0(S);
+R0 = R7 << 31(S);
+//A0 = A0 >>> uimm5 ; /* arithmetic right shift (b) */
+A0 = A0 >>> 0;
+A0 = A0 >>> 15;
+A0 = A0 >>> 31;
+
+//A0 = A0 << uimm5 ; /* logical left shift (b) */
+A0 = A0 << 0;
+A0 = A0 << 15;
+A0 = A0 << 31;
+
+//A1 = A1 >>> uimm5 ; /* arithmetic right shift (b) */
+A1 = A1 >>> 0;
+A1 = A1 >>> 15;
+A1 = A1 >>> 31;
+
+//A1 = A1 << uimm5 ; /* logical left shift (b) */
+A1 = A1 << 0;
+A1 = A1 << 15;
+A1 = A1 << 31;
+
+//Dreg >>>= Dreg ; /* arithmetic right shift (a) */
+R0 >>>= R0;
+R0 >>>= R1;
+R1 >>>= R0;
+R1 >>>= R7;
+
+//Dreg <<= Dreg ; /* logical left shift (a) */
+R0 <<= R0;
+R0 <<= R1;
+R1 <<= R0;
+R1 <<= R7;
+
+//Dreg_lo_hi = ASHIFT Dreg_lo_hi BY Dreg_lo (opt_sat) ; /* arithmetic right shift (b) */
+r3.l = ashift r0.h by r7.l ; /* shift, half-word */
+r3.h = ashift r0.l by r7.l ;
+r3.h = ashift r0.h by r7.l ;
+r3.l = ashift r0.l by r7.l ;
+r3.l = ashift r0.h by r7.l(s) ; /* shift, half-word, saturated */
+r3.h = ashift r0.l by r7.l(s) ; /* shift, half-word, saturated */
+r3.h = ashift r0.h by r7.l(s) ;
+r3.l = ashift r0.l by r7.l (s) ;
+
+//Dreg = ASHIFT Dreg BY Dreg_lo (opt_sat) ; /* arithmetic right shift (b) */
+r4 = ashift r2 by r7.l ; /* shift, word */
+r4 = ashift r2 by r7.l (s) ; /* shift, word, saturated */
+
+//A0 = ASHIFT A0 BY Dreg_lo ; /* arithmetic right shift (b)*/
+A0 = ashift A0 by r7.l ; /* shift, Accumulator */
+
+//A1 = ASHIFT A1 BY Dreg_lo ; /* arithmetic right shift (b)*/
+A1 = ashift A1 by r7.l ; /* shift, Accumulator */
+
+p3 = p2 >> 1 ; /* pointer right shift by 1 */
+p3 = p3 >> 2 ; /* pointer right shift by 2 */
+p4 = p5 << 1 ; /* pointer left shift by 1 */
+p0 = p1 << 2 ; /* pointer left shift by 2 */
+r3 >>= 17 ; /* data right shift */
+r3 <<= 17 ; /* data left shift */
+r3.l = r0.l >> 4 ; /* data right shift, half-word register */
+r3.l = r0.h >> 4 ; /* same as above; half-word register combinations are arbitrary */
+r3.h = r0.l << 12 ; /* data left shift, half-word register */
+r3.h = r0.h << 14 ; /* same as above; half-word register combinations are arbitrary */
+
+r3 = r6 >> 4 ; /* right shift, 32-bit word */
+r3 = r6 << 4 ; /* left shift, 32-bit word */
+
+a0 = a0 >> 7 ; /* Accumulator right shift */
+a1 = a1 >> 25 ; /* Accumulator right shift */
+a0 = a0 << 7 ; /* Accumulator left shift */
+a1 = a1 << 14 ; /* Accumulator left shift */
+
+r3 >>= r0 ; /* data right shift */
+r3 <<= r1 ; /* data left shift */
+
+r3.l = lshift r0.l by r2.l ; /* shift direction controlled by sign of R2.L */
+r3.h = lshift r0.l by r2.l ;
+
+a0 = lshift a0 by r7.l ;
+a1 = lshift a1 by r7.l ;
+
+r4 = rot r1 by 31 ; /* rotate left */
+r4 = rot r1 by -32 ; /* rotate right */
+r4 = rot r1 by 5 ; /* rotate right */
+
+a0 = rot a0 by 22 ; /* rotate Accumulator left */
+a0 = rot a0 by -32 ; /* rotate Accumulator left */
+a0 = rot a0 by 31 ; /* rotate Accumulator left */
+
+a1 = rot a1 by -32 ; /* rotate Accumulator right */
+a1 = rot a1 by 31 ; /* rotate Accumulator right */
+a1 = rot a1 by 22 ; /* rotate Accumulator right */
+
+r4 = rot r1 by r2.l ;
+a0 = rot a0 by r3.l ;
+a1 = rot a1 by r7.l ;
+
+r0.l = r1.l << 0;
+r0.l = r1.l << 1;
+r0.l = r1.l << 2;
+r0.l = r1.l << 4;
+r0.l = r1.l >> 0;
+r0.l = r1.l >> 1;
+r0.l = r1.l >> 2;
+r0.l = r1.l >> 4;
+r0.l = r1.l >>> 1;
+r0.l = r1.l >>> 2;
+r0.l = r1.l >>> 4;
+
+r0.l = r1.h << 0;
+r0.l = r1.h << 1;
+r0.l = r1.h << 2;
+r0.l = r1.h << 4;
+r0.l = r1.h >> 0;
+r0.l = r1.h >> 1;
+r0.l = r1.h >> 2;
+r0.l = r1.h >> 4;
+r0.l = r1.h >>> 1;
+r0.l = r1.h >>> 2;
+r0.l = r1.h >>> 4;
+
+r0.l = r1.h << 0 (S);
+r0.l = r1.h << 1 (S);
+r0.l = r1.h << 2 (S);
+r0.l = r1.h << 4 (S);
+r0.l = r1.h >>> 1 (S);
+r0.l = r1.h >>> 2 (S);
+r0.l = r1.h >>> 4 (S);
+
-\r
-.EXTERN MY_LABEL2;\r
-.section .text;\r
-\r
-//\r
-//5 STACK CONTROL\r
-//\r
-\r
-//[ -- SP ] = allreg ; /* predecrement SP (a) */\r
-\r
-[--SP ] = R0;\r
-[--SP ] = R6;\r
-\r
-[--SP ] = P0;\r
-[--SP ] = P4;\r
-\r
-[--SP ] = I0;\r
-[--SP ] = I1;\r
-\r
-[--SP ] = M0;\r
-[--SP ] = M1;\r
-\r
-[--SP ] = L0;\r
-[--SP ] = L1;\r
-\r
-[--SP ] = B0;\r
-[--SP ] = B1;\r
-\r
-[--SP ] = A0.X;\r
-[--SP ] = A1.X;\r
-\r
-[--SP ] = A0.W;\r
-[--SP ] = A1.W;\r
-\r
-[--SP ] = ASTAT;\r
-[--SP ] = RETS;\r
-[--SP ] = RETI;\r
-[--SP ] = RETX;\r
-[--SP ] = RETN;\r
-[--SP ] = RETE;\r
-[--SP ] = LC0;\r
-[--SP ] = LC1;\r
-[--SP ] = LT0;\r
-[--SP ] = LT1;\r
-[--SP ] = LB0;\r
-[--SP ] = LB1;\r
-[--SP ] = CYCLES;\r
-[--SP ] = CYCLES2;\r
-//[--SP ] = EMUDAT;\r
-[--SP ] = USP;\r
-[--SP ] = SEQSTAT;\r
-[--SP ] = SYSCFG;\r
-\r
-\r
-//[ -- SP ] = ( R7 : Dreglim , P5 : Preglim ) ; /* Dregs and indexed Pregs (a) */\r
-[--SP ] = ( R7:0, P5:0);\r
-\r
-\r
-//[ -- SP ] = ( R7 : Dreglim ) ; /* Dregs, only (a) */\r
-[--SP ] = ( R7:0);\r
-\r
-//[ -- SP ] = ( P5 : Preglim ) ; /* indexed Pregs, only (a) */\r
-[--SP ] = (P5:0);\r
-\r
-\r
-//mostreg = [ SP ++ ] ; /* post-increment SP; does not apply to Data Registers and Pointer Registers (a) */\r
-\r
-R0= [ SP ++ ] ; \r
-R6= [ SP ++ ] ; \r
- \r
-P0= [ SP ++ ] ; \r
-P4= [ SP ++ ] ; \r
- \r
-I0= [ SP ++ ] ; \r
-I1= [ SP ++ ] ; \r
- \r
-M0= [ SP ++ ] ; \r
-M1= [ SP ++ ] ; \r
- \r
-L0= [ SP ++ ] ; \r
-L1= [ SP ++ ] ; \r
- \r
-B0= [ SP ++ ] ; \r
-B1= [ SP ++ ] ; \r
- \r
-A0.X= [ SP ++ ] ; \r
-A1.X= [ SP ++ ] ; \r
- \r
-A0.W= [ SP ++ ] ; \r
-A1.W= [ SP ++ ] ; \r
- \r
-ASTAT= [ SP ++ ] ; \r
-RETS= [ SP ++ ] ; \r
-RETI= [ SP ++ ] ; \r
-RETX= [ SP ++ ] ; \r
-RETN= [ SP ++ ] ; \r
-RETE= [ SP ++ ] ; \r
-LC0= [ SP ++ ] ; \r
-LC1= [ SP ++ ] ; \r
-LT0= [ SP ++ ] ; \r
-LT1= [ SP ++ ] ; \r
-LB0= [ SP ++ ] ; \r
-LB1= [ SP ++ ] ; \r
-CYCLES= [ SP ++ ] ; \r
-CYCLES2= [ SP ++ ] ; \r
-//EMUDAT= [ SP ++ ] ; \r
-USP= [ SP ++ ] ; \r
-SEQSTAT= [ SP ++ ] ; \r
-SYSCFG= [ SP ++ ] ; \r
-\r
-//( R7 : Dreglim, P5 : Preglim ) = [ SP ++ ] ; /* Dregs and indexed Pregs (a) */\r
-( R7:0, P5:0) = [ SP++ ];\r
-\r
-//( R7 : Dreglim ) = [ SP ++ ] ; /* Dregs, only (a) */\r
-( R7:0) = [ SP++ ];\r
-\r
-//( P5 : Preglim ) = [ SP ++ ] ; /* indexed Pregs, only (a) */\r
-( P5:0) = [ SP++ ];\r
-\r
-//LINK uimm18m4 ; /* allocate a stack frame of specified size (b) */\r
-LINK 0X0;\r
-LINK 0X8;\r
-LINK 0x3FFFC;\r
-\r
-UNLINK ; /* de-allocate the stack frame (b)*/\r
+
+.EXTERN MY_LABEL2;
+.section .text;
+
+//
+//5 STACK CONTROL
+//
+
+//[ -- SP ] = allreg ; /* predecrement SP (a) */
+
+[--SP ] = R0;
+[--SP ] = R6;
+
+[--SP ] = P0;
+[--SP ] = P4;
+
+[--SP ] = I0;
+[--SP ] = I1;
+
+[--SP ] = M0;
+[--SP ] = M1;
+
+[--SP ] = L0;
+[--SP ] = L1;
+
+[--SP ] = B0;
+[--SP ] = B1;
+
+[--SP ] = A0.X;
+[--SP ] = A1.X;
+
+[--SP ] = A0.W;
+[--SP ] = A1.W;
+
+[--SP ] = ASTAT;
+[--SP ] = RETS;
+[--SP ] = RETI;
+[--SP ] = RETX;
+[--SP ] = RETN;
+[--SP ] = RETE;
+[--SP ] = LC0;
+[--SP ] = LC1;
+[--SP ] = LT0;
+[--SP ] = LT1;
+[--SP ] = LB0;
+[--SP ] = LB1;
+[--SP ] = CYCLES;
+[--SP ] = CYCLES2;
+//[--SP ] = EMUDAT;
+[--SP ] = USP;
+[--SP ] = SEQSTAT;
+[--SP ] = SYSCFG;
+
+
+//[ -- SP ] = ( R7 : Dreglim , P5 : Preglim ) ; /* Dregs and indexed Pregs (a) */
+[--SP ] = ( R7:0, P5:0);
+
+
+//[ -- SP ] = ( R7 : Dreglim ) ; /* Dregs, only (a) */
+[--SP ] = ( R7:0);
+
+//[ -- SP ] = ( P5 : Preglim ) ; /* indexed Pregs, only (a) */
+[--SP ] = (P5:0);
+
+
+//mostreg = [ SP ++ ] ; /* post-increment SP; does not apply to Data Registers and Pointer Registers (a) */
+
+R0= [ SP ++ ] ;
+R6= [ SP ++ ] ;
+
+P0= [ SP ++ ] ;
+P4= [ SP ++ ] ;
+
+I0= [ SP ++ ] ;
+I1= [ SP ++ ] ;
+
+M0= [ SP ++ ] ;
+M1= [ SP ++ ] ;
+
+L0= [ SP ++ ] ;
+L1= [ SP ++ ] ;
+
+B0= [ SP ++ ] ;
+B1= [ SP ++ ] ;
+
+A0.X= [ SP ++ ] ;
+A1.X= [ SP ++ ] ;
+
+A0.W= [ SP ++ ] ;
+A1.W= [ SP ++ ] ;
+
+ASTAT= [ SP ++ ] ;
+RETS= [ SP ++ ] ;
+RETI= [ SP ++ ] ;
+RETX= [ SP ++ ] ;
+RETN= [ SP ++ ] ;
+RETE= [ SP ++ ] ;
+LC0= [ SP ++ ] ;
+LC1= [ SP ++ ] ;
+LT0= [ SP ++ ] ;
+LT1= [ SP ++ ] ;
+LB0= [ SP ++ ] ;
+LB1= [ SP ++ ] ;
+CYCLES= [ SP ++ ] ;
+CYCLES2= [ SP ++ ] ;
+//EMUDAT= [ SP ++ ] ;
+USP= [ SP ++ ] ;
+SEQSTAT= [ SP ++ ] ;
+SYSCFG= [ SP ++ ] ;
+
+//( R7 : Dreglim, P5 : Preglim ) = [ SP ++ ] ; /* Dregs and indexed Pregs (a) */
+( R7:0, P5:0) = [ SP++ ];
+
+//( R7 : Dreglim ) = [ SP ++ ] ; /* Dregs, only (a) */
+( R7:0) = [ SP++ ];
+
+//( P5 : Preglim ) = [ SP ++ ] ; /* indexed Pregs, only (a) */
+( P5:0) = [ SP++ ];
+
+//LINK uimm18m4 ; /* allocate a stack frame of specified size (b) */
+LINK 0X0;
+LINK 0X8;
+LINK 0x3FFFC;
+
+UNLINK ; /* de-allocate the stack frame (b)*/
-\r
-.EXTERN MY_LABEL2;\r
-.section .text;\r
-\r
-//\r
-//13 VIDEO PIXEL OPERATIONS\r
-//\r
-\r
-//Dreg = ALIGN8 ( Dreg, Dreg ) ; /* overlay 1 byte (b) */\r
-R0 = ALIGN8(R0, R0);\r
-R0 = ALIGN8(R0, R1);\r
-R0 = ALIGN8(R1, R0);\r
-R0 = ALIGN8(R1, R1);\r
-R0 = ALIGN8(R1, R2);\r
-R3 = ALIGN8(R4, R5);\r
-R6 = ALIGN8(R7, R0);\r
-R1 = ALIGN8(R2, R3);\r
-R4 = ALIGN8(R5, R6);\r
-R7 = ALIGN8(R0, R1);\r
-R2 = ALIGN8(R3, R4);\r
-R5 = ALIGN8(R6, R7);\r
-\r
-//Dreg = ALIGN16 ( Dreg, Dreg ) ; /* overlay 2 bytes (b) */\r
-R0 = ALIGN16(R0, R0);\r
-R0 = ALIGN16(R0, R1);\r
-R0 = ALIGN16(R1, R0);\r
-R0 = ALIGN16(R1, R1);\r
-R0 = ALIGN16(R1, R2);\r
-R3 = ALIGN16(R4, R5);\r
-R6 = ALIGN16(R7, R0);\r
-R1 = ALIGN16(R2, R3);\r
-R4 = ALIGN16(R5, R6);\r
-R7 = ALIGN16(R0, R1);\r
-R2 = ALIGN16(R3, R4);\r
-R5 = ALIGN16(R6, R7);\r
-\r
-//Dreg = ALIGN24 ( Dreg, Dreg ) ; /* overlay 3 bytes (b) */\r
-R0 = ALIGN24(R0, R0);\r
-R0 = ALIGN24(R0, R1);\r
-R0 = ALIGN24(R1, R0);\r
-R0 = ALIGN24(R1, R1);\r
-R0 = ALIGN24(R1, R2);\r
-R3 = ALIGN24(R4, R5);\r
-R6 = ALIGN24(R7, R0);\r
-R1 = ALIGN24(R2, R3);\r
-R4 = ALIGN24(R5, R6);\r
-R7 = ALIGN24(R0, R1);\r
-R2 = ALIGN24(R3, R4);\r
-R5 = ALIGN24(R6, R7);\r
-\r
-DISALGNEXCPT ; /* (b) */\r
-\r
-/* forward byte order operands */\r
-//Dreg = BYTEOP3P (Dreg_pair, Dreg_pair) (LO) ; /* sum into low bytes (b) */\r
-//Dreg = BYTEOP3P (Dreg_pair, Dreg_pair) (HI) ; /* sum into high bytes (b) */\r
-/* reverse byte order operands */\r
-//Dreg = BYTEOP3P (Dreg_pair, Dreg_pair) (LO, R) ; /* sum into low bytes (b) */\r
-//Dreg = BYTEOP3P (Dreg_pair, Dreg_pair) (HI, R) ; /* sum into high bytes (b) */\r
-\r
-r0 = byteop3p (r1:0, r3:2) (lo) ;\r
-r1 = byteop3p (r1:0, r3:2) (hi) ;\r
-r2 = byteop3p (r1:0, r3:2) (lo, r) ;\r
-r3 = byteop3p (r1:0, r3:2) (hi, r) ;\r
-r4 = byteop3p (r3:2, r1:0) (lo) ;\r
-r5 = byteop3p (r3:2, r1:0) (hi) ;\r
-r6 = byteop3p (r3:2, r1:0) (lo, r) ;\r
-r7 = byteop3p (r3:2, r1:0) (hi, r) ;\r
-\r
-//Dreg = A1.L + A1.H, Dreg = A0.L + A0.H ; /* (b) */\r
-\r
-R0 = A1.L + A1.H, R0= A0.L + A0.H ;\r
-R0 = A1.L + A1.H, R1= A0.L + A0.H ;\r
-R2 = A1.L + A1.H, R3= A0.L + A0.H ;\r
-R4 = A1.L + A1.H, R5= A0.L + A0.H ;\r
-R6 = A1.L + A1.H, R7= A0.L + A0.H ;\r
-\r
-/* forward byte order operands */\r
-//( Dreg, Dreg ) = BYTEOP16P ( Dreg_pair, Dreg_pair ) ; /* (b) */\r
-(r7,r0) = BYTEOP16P ( r3:2,r1:0 ) ;\r
-(r1,r2) = byteop16p (r3:2,r1:0) ;\r
-(r0,r1) = BYTEOP16P ( r3:2,r1:0 ) ;\r
-(r2,r3) = byteop16p (r3:2,r1:0) ;\r
-(r7,r0) = BYTEOP16P (r1:0, r3:2) ;\r
-(r1,r2) = byteop16p (r1:0,r3:2) ;\r
-(r0,r1) = BYTEOP16P (r1:0, r3:2) ;\r
-(r2,r3) = byteop16p (r1:0,r3:2) ;\r
-\r
-/* reverse byte order operands */\r
-//( Dreg, Dreg ) = BYTEOP16P ( Dreg_pair, Dreg_pair ) (R); /* (b) */\r
-(r7,r0) = BYTEOP16P ( r3:2,r1:0 )(r) ;\r
-(r1,r2) = byteop16p (r3:2,r1:0)(r) ;\r
-(r0,r1) = BYTEOP16P ( r3:2,r1:0 )(r) ;\r
-(r2,r3) = byteop16p (r3:2,r1:0)(r) ;\r
-(r7,r0) = BYTEOP16P (r1:0, r3:2)(r) ;\r
-(r1,r2) = byteop16p (r1:0,r3:2)(r) ;\r
-(r0,r1) = BYTEOP16P (r1:0, r3:2)(r) ;\r
-(r2,r3) = byteop16p (r1:0,r3:2)(r) ;\r
-\r
-/* forward byte order operands */\r
-//Dreg = BYTEOP1P (Dreg_pair, Dreg_pair) ; /* (b) */\r
-//Dreg = BYTEOP1P (Dreg_pair, Dreg_pair) (T) ; /* truncated (b)*/\r
-/* reverse byte order operands */\r
-//Dreg = BYTEOP1P (Dreg_pair, Dreg_pair) (R) ; /* (b) */\r
-//Dreg = BYTEOP1P (Dreg_pair, Dreg_pair) (T, R) ; /* truncated (b) */ \r
-\r
-r3 = byteop1p (r1:0, r3:2) ;\r
-r3 = byteop1p (r1:0, r3:2) (r) ;\r
-r3 = byteop1p (r1:0, r3:2) (t) ;\r
-r3 = byteop1p (r1:0, r3:2) (t,r) ;\r
-\r
-r0 = byteop1p (r3:2,r1:0);\r
-r1 = byteop1p (r3:2,r1:0)(r) ;\r
-r2 = byteop1p (r3:2,r1:0)(t) ;\r
-r3 = byteop1p (r3:2,r1:0)(t,r) ;\r
-\r
-/* forward byte order operands */\r
-//Dreg = BYTEOP2P (Dreg_pair, Dreg_pair) (RNDL) ;\r
-/* round into low bytes (b) */\r
-//Dreg = BYTEOP2P (Dreg_pair, Dreg_pair) (RNDH) ;\r
-/* round into high bytes (b) */\r
-//Dreg = BYTEOP2P (Dreg_pair, Dreg_pair) (TL) ;\r
-/* truncate into low bytes (b) */\r
-//Dreg = BYTEOP2P (Dreg_pair, Dreg_pair) (TH) ;\r
-/* truncate into high bytes (b) */\r
-/* reverse byte order operands */\r
-//Dreg = BYTEOP2P (Dreg_pair, Dreg_pair) (RNDL, R) ;\r
-/* round into low bytes (b) */\r
-//Dreg = BYTEOP2P (Dreg_pair, Dreg_pair) (RNDH, R) ;\r
-/* round into high bytes (b) */\r
-//Dreg = BYTEOP2P (Dreg_pair, Dreg_pair) (TL, R) ;\r
-/* truncate into low bytes (b) */\r
-//Dreg = BYTEOP2P (Dreg_pair, Dreg_pair) (TH, R) ;\r
-/* truncate into high bytes (b) */\r
-\r
-r3 = byteop2p (r1:0, r3:2) (rndl) ;\r
-r3 = byteop2p (r1:0, r3:2) (rndh) ;\r
-r3 = byteop2p (r1:0, r3:2) (tl) ;\r
-r3 = byteop2p (r1:0, r3:2) (th) ;\r
-r3 = byteop2p (r1:0, r3:2) (rndl, r) ;\r
-r3 = byteop2p (r1:0, r3:2) (rndh, r) ;\r
-r3 = byteop2p (r1:0, r3:2) (tl, r) ;\r
-r3 = byteop2p (r1:0, r3:2) (th, r) ;\r
-\r
-r0 = byteop2p (r1:0, r3:2) (rndl) ;\r
-r1 = byteop2p (r1:0, r3:2) (rndh) ;\r
-r2 = byteop2p (r1:0, r3:2) (tl) ;\r
-r3 = byteop2p (r1:0, r3:2) (th) ;\r
-r4 = byteop2p (r1:0, r3:2) (rndl, r) ;\r
-r5 = byteop2p (r1:0, r3:2) (rndh, r) ;\r
-r6 = byteop2p (r1:0, r3:2) (tl, r) ;\r
-r7 = byteop2p (r1:0, r3:2) (th, r) ;\r
-\r
-r0 = byteop2p (r3:2, r3:2) (rndl) ;\r
-r1 = byteop2p (r3:2, r3:2) (rndh) ;\r
-r2 = byteop2p (r3:2, r3:2) (tl) ;\r
-r3 = byteop2p (r3:2, r3:2) (th) ;\r
-r4 = byteop2p (r3:2, r3:2) (rndl, r) ;\r
-r5 = byteop2p (r3:2, r3:2) (rndh, r) ;\r
-r6 = byteop2p (r3:2, r3:2) (tl, r) ;\r
-r7 = byteop2p (r3:2, r3:2) (th, r) ;\r
-\r
-//Dreg = BYTEPACK ( Dreg, Dreg ) ; /* (b) */\r
-r0 = bytepack (r0,r0) ;\r
-r1 = bytepack (r2,r3) ;\r
-r4 = bytepack (r5,r6) ;\r
-r7 = bytepack (r0,r1) ;\r
-r2 = bytepack (r3,r4) ;\r
-r5 = bytepack (r6,r7) ;\r
-\r
-/* forward byte order operands */\r
-//(Dreg, Dreg) = BYTEOP16M (Dreg_pair, Dreg_pair) ; /* (b */)\r
-/* reverse byte order operands */\r
-//(Dreg, Dreg) = BYTEOP16M (Dreg-pair, Dreg-pair) (R) ; /* (b) */\r
-\r
-(r1,r2)= byteop16m (r3:2,r1:0) ;\r
-(r1,r2)= byteop16m (r3:2,r1:0) (r) ;\r
-(r0,r1)= byteop16m (r3:2,r1:0) ;\r
-(r2,r3)= byteop16m (r3:2,r1:0) (r) ;\r
-(r3,r5)= byteop16m (r3:2,r1:0) ;\r
-(r6,r7)= byteop16m (r3:2,r1:0) (r) ;\r
-\r
-(r1,r2)= byteop16m (r1:0,r1:0) ;\r
-(r1,r2)= byteop16m (r1:0,r1:0) (r) ;\r
-(r0,r1)= byteop16m (r1:0,r1:0) ;\r
-(r2,r3)= byteop16m (r1:0,r1:0) (r) ;\r
-(r3,r5)= byteop16m (r1:0,r1:0) ;\r
-(r6,r7)= byteop16m (r1:0,r1:0) (r) ;\r
-\r
-(r1,r2)= byteop16m (r1:0,r3:2) ;\r
-(r1,r2)= byteop16m (r1:0,r3:2) (r) ;\r
-(r0,r1)= byteop16m (r1:0,r3:2) ;\r
-(r2,r3)= byteop16m (r1:0,r3:2) (r) ;\r
-(r3,r5)= byteop16m (r1:0,r3:2) ;\r
-(r6,r7)= byteop16m (r1:0,r3:2) (r) ;\r
-\r
-(r1,r2)= byteop16m (r3:2,r3:2) ;\r
-(r1,r2)= byteop16m (r3:2,r3:2) (r) ;\r
-(r0,r1)= byteop16m (r3:2,r3:2) ;\r
-(r2,r3)= byteop16m (r3:2,r3:2) (r) ;\r
-(r3,r5)= byteop16m (r3:2,r3:2) ;\r
-(r6,r7)= byteop16m (r3:2,r3:2) (r) ;\r
-\r
-//SAA (Dreg_pair, Dreg_pair) ; /* forward byte order operands (b) */\r
-//SAA (Dreg_pair, Dreg_pair) (R) ; /* reverse byte order operands (b) */\r
-\r
-saa(r1:0, r3:2) || r0 = [i0++] || r2 = [i1++] ; /* parallel fill instructions */\r
-saa (r1:0, r3:2) (R) || r1 = [i0++] || r3 = [i1++] ; /* reverse, parallel fill instructions */\r
-saa (r1:0, r3:2) ; /* last SAA in a loop, no more fill required */\r
-\r
-//( Dreg , Dreg ) = BYTEUNPACK Dreg_pair ; /* (b) */\r
-//( Dreg , Dreg ) = BYTEUNPACK Dreg_pair (R) ; /* reverse source order (b) */\r
-\r
-(r6,r5) = byteunpack r1:0 ; /* non-reversing sources */\r
-(r6,r5) = byteunpack r1:0 (R) ; /* reversing sources case */\r
-(r6,r5) = byteunpack r3:2 ; /* non-reversing sources */\r
-(r6,r5) = byteunpack r3:2 (R) ; /* reversing sources case */\r
-(r0,r1) = byteunpack r1:0 ; /* non-reversing sources */\r
-(r2,r3) = byteunpack r1:0 (R) ; /* reversing sources case */\r
-(r4,r5) = byteunpack r3:2 ; /* non-reversing sources */\r
-(r6,r7) = byteunpack r3:2 (R) ; /* reversing sources case */\r
+
+.EXTERN MY_LABEL2;
+.section .text;
+
+//
+//13 VIDEO PIXEL OPERATIONS
+//
+
+//Dreg = ALIGN8 ( Dreg, Dreg ) ; /* overlay 1 byte (b) */
+R0 = ALIGN8(R0, R0);
+R0 = ALIGN8(R0, R1);
+R0 = ALIGN8(R1, R0);
+R0 = ALIGN8(R1, R1);
+R0 = ALIGN8(R1, R2);
+R3 = ALIGN8(R4, R5);
+R6 = ALIGN8(R7, R0);
+R1 = ALIGN8(R2, R3);
+R4 = ALIGN8(R5, R6);
+R7 = ALIGN8(R0, R1);
+R2 = ALIGN8(R3, R4);
+R5 = ALIGN8(R6, R7);
+
+//Dreg = ALIGN16 ( Dreg, Dreg ) ; /* overlay 2 bytes (b) */
+R0 = ALIGN16(R0, R0);
+R0 = ALIGN16(R0, R1);
+R0 = ALIGN16(R1, R0);
+R0 = ALIGN16(R1, R1);
+R0 = ALIGN16(R1, R2);
+R3 = ALIGN16(R4, R5);
+R6 = ALIGN16(R7, R0);
+R1 = ALIGN16(R2, R3);
+R4 = ALIGN16(R5, R6);
+R7 = ALIGN16(R0, R1);
+R2 = ALIGN16(R3, R4);
+R5 = ALIGN16(R6, R7);
+
+//Dreg = ALIGN24 ( Dreg, Dreg ) ; /* overlay 3 bytes (b) */
+R0 = ALIGN24(R0, R0);
+R0 = ALIGN24(R0, R1);
+R0 = ALIGN24(R1, R0);
+R0 = ALIGN24(R1, R1);
+R0 = ALIGN24(R1, R2);
+R3 = ALIGN24(R4, R5);
+R6 = ALIGN24(R7, R0);
+R1 = ALIGN24(R2, R3);
+R4 = ALIGN24(R5, R6);
+R7 = ALIGN24(R0, R1);
+R2 = ALIGN24(R3, R4);
+R5 = ALIGN24(R6, R7);
+
+DISALGNEXCPT ; /* (b) */
+
+/* forward byte order operands */
+//Dreg = BYTEOP3P (Dreg_pair, Dreg_pair) (LO) ; /* sum into low bytes (b) */
+//Dreg = BYTEOP3P (Dreg_pair, Dreg_pair) (HI) ; /* sum into high bytes (b) */
+/* reverse byte order operands */
+//Dreg = BYTEOP3P (Dreg_pair, Dreg_pair) (LO, R) ; /* sum into low bytes (b) */
+//Dreg = BYTEOP3P (Dreg_pair, Dreg_pair) (HI, R) ; /* sum into high bytes (b) */
+
+r0 = byteop3p (r1:0, r3:2) (lo) ;
+r1 = byteop3p (r1:0, r3:2) (hi) ;
+r2 = byteop3p (r1:0, r3:2) (lo, r) ;
+r3 = byteop3p (r1:0, r3:2) (hi, r) ;
+r4 = byteop3p (r3:2, r1:0) (lo) ;
+r5 = byteop3p (r3:2, r1:0) (hi) ;
+r6 = byteop3p (r3:2, r1:0) (lo, r) ;
+r7 = byteop3p (r3:2, r1:0) (hi, r) ;
+
+//Dreg = A1.L + A1.H, Dreg = A0.L + A0.H ; /* (b) */
+
+R0 = A1.L + A1.H, R0= A0.L + A0.H ;
+R0 = A1.L + A1.H, R1= A0.L + A0.H ;
+R2 = A1.L + A1.H, R3= A0.L + A0.H ;
+R4 = A1.L + A1.H, R5= A0.L + A0.H ;
+R6 = A1.L + A1.H, R7= A0.L + A0.H ;
+
+/* forward byte order operands */
+//( Dreg, Dreg ) = BYTEOP16P ( Dreg_pair, Dreg_pair ) ; /* (b) */
+(r7,r0) = BYTEOP16P ( r3:2,r1:0 ) ;
+(r1,r2) = byteop16p (r3:2,r1:0) ;
+(r0,r1) = BYTEOP16P ( r3:2,r1:0 ) ;
+(r2,r3) = byteop16p (r3:2,r1:0) ;
+(r7,r0) = BYTEOP16P (r1:0, r3:2) ;
+(r1,r2) = byteop16p (r1:0,r3:2) ;
+(r0,r1) = BYTEOP16P (r1:0, r3:2) ;
+(r2,r3) = byteop16p (r1:0,r3:2) ;
+
+/* reverse byte order operands */
+//( Dreg, Dreg ) = BYTEOP16P ( Dreg_pair, Dreg_pair ) (R); /* (b) */
+(r7,r0) = BYTEOP16P ( r3:2,r1:0 )(r) ;
+(r1,r2) = byteop16p (r3:2,r1:0)(r) ;
+(r0,r1) = BYTEOP16P ( r3:2,r1:0 )(r) ;
+(r2,r3) = byteop16p (r3:2,r1:0)(r) ;
+(r7,r0) = BYTEOP16P (r1:0, r3:2)(r) ;
+(r1,r2) = byteop16p (r1:0,r3:2)(r) ;
+(r0,r1) = BYTEOP16P (r1:0, r3:2)(r) ;
+(r2,r3) = byteop16p (r1:0,r3:2)(r) ;
+
+/* forward byte order operands */
+//Dreg = BYTEOP1P (Dreg_pair, Dreg_pair) ; /* (b) */
+//Dreg = BYTEOP1P (Dreg_pair, Dreg_pair) (T) ; /* truncated (b)*/
+/* reverse byte order operands */
+//Dreg = BYTEOP1P (Dreg_pair, Dreg_pair) (R) ; /* (b) */
+//Dreg = BYTEOP1P (Dreg_pair, Dreg_pair) (T, R) ; /* truncated (b) */
+
+r3 = byteop1p (r1:0, r3:2) ;
+r3 = byteop1p (r1:0, r3:2) (r) ;
+r3 = byteop1p (r1:0, r3:2) (t) ;
+r3 = byteop1p (r1:0, r3:2) (t,r) ;
+
+r0 = byteop1p (r3:2,r1:0);
+r1 = byteop1p (r3:2,r1:0)(r) ;
+r2 = byteop1p (r3:2,r1:0)(t) ;
+r3 = byteop1p (r3:2,r1:0)(t,r) ;
+
+/* forward byte order operands */
+//Dreg = BYTEOP2P (Dreg_pair, Dreg_pair) (RNDL) ;
+/* round into low bytes (b) */
+//Dreg = BYTEOP2P (Dreg_pair, Dreg_pair) (RNDH) ;
+/* round into high bytes (b) */
+//Dreg = BYTEOP2P (Dreg_pair, Dreg_pair) (TL) ;
+/* truncate into low bytes (b) */
+//Dreg = BYTEOP2P (Dreg_pair, Dreg_pair) (TH) ;
+/* truncate into high bytes (b) */
+/* reverse byte order operands */
+//Dreg = BYTEOP2P (Dreg_pair, Dreg_pair) (RNDL, R) ;
+/* round into low bytes (b) */
+//Dreg = BYTEOP2P (Dreg_pair, Dreg_pair) (RNDH, R) ;
+/* round into high bytes (b) */
+//Dreg = BYTEOP2P (Dreg_pair, Dreg_pair) (TL, R) ;
+/* truncate into low bytes (b) */
+//Dreg = BYTEOP2P (Dreg_pair, Dreg_pair) (TH, R) ;
+/* truncate into high bytes (b) */
+
+r3 = byteop2p (r1:0, r3:2) (rndl) ;
+r3 = byteop2p (r1:0, r3:2) (rndh) ;
+r3 = byteop2p (r1:0, r3:2) (tl) ;
+r3 = byteop2p (r1:0, r3:2) (th) ;
+r3 = byteop2p (r1:0, r3:2) (rndl, r) ;
+r3 = byteop2p (r1:0, r3:2) (rndh, r) ;
+r3 = byteop2p (r1:0, r3:2) (tl, r) ;
+r3 = byteop2p (r1:0, r3:2) (th, r) ;
+
+r0 = byteop2p (r1:0, r3:2) (rndl) ;
+r1 = byteop2p (r1:0, r3:2) (rndh) ;
+r2 = byteop2p (r1:0, r3:2) (tl) ;
+r3 = byteop2p (r1:0, r3:2) (th) ;
+r4 = byteop2p (r1:0, r3:2) (rndl, r) ;
+r5 = byteop2p (r1:0, r3:2) (rndh, r) ;
+r6 = byteop2p (r1:0, r3:2) (tl, r) ;
+r7 = byteop2p (r1:0, r3:2) (th, r) ;
+
+r0 = byteop2p (r3:2, r3:2) (rndl) ;
+r1 = byteop2p (r3:2, r3:2) (rndh) ;
+r2 = byteop2p (r3:2, r3:2) (tl) ;
+r3 = byteop2p (r3:2, r3:2) (th) ;
+r4 = byteop2p (r3:2, r3:2) (rndl, r) ;
+r5 = byteop2p (r3:2, r3:2) (rndh, r) ;
+r6 = byteop2p (r3:2, r3:2) (tl, r) ;
+r7 = byteop2p (r3:2, r3:2) (th, r) ;
+
+//Dreg = BYTEPACK ( Dreg, Dreg ) ; /* (b) */
+r0 = bytepack (r0,r0) ;
+r1 = bytepack (r2,r3) ;
+r4 = bytepack (r5,r6) ;
+r7 = bytepack (r0,r1) ;
+r2 = bytepack (r3,r4) ;
+r5 = bytepack (r6,r7) ;
+
+/* forward byte order operands */
+//(Dreg, Dreg) = BYTEOP16M (Dreg_pair, Dreg_pair) ; /* (b */)
+/* reverse byte order operands */
+//(Dreg, Dreg) = BYTEOP16M (Dreg-pair, Dreg-pair) (R) ; /* (b) */
+
+(r1,r2)= byteop16m (r3:2,r1:0) ;
+(r1,r2)= byteop16m (r3:2,r1:0) (r) ;
+(r0,r1)= byteop16m (r3:2,r1:0) ;
+(r2,r3)= byteop16m (r3:2,r1:0) (r) ;
+(r3,r5)= byteop16m (r3:2,r1:0) ;
+(r6,r7)= byteop16m (r3:2,r1:0) (r) ;
+
+(r1,r2)= byteop16m (r1:0,r1:0) ;
+(r1,r2)= byteop16m (r1:0,r1:0) (r) ;
+(r0,r1)= byteop16m (r1:0,r1:0) ;
+(r2,r3)= byteop16m (r1:0,r1:0) (r) ;
+(r3,r5)= byteop16m (r1:0,r1:0) ;
+(r6,r7)= byteop16m (r1:0,r1:0) (r) ;
+
+(r1,r2)= byteop16m (r1:0,r3:2) ;
+(r1,r2)= byteop16m (r1:0,r3:2) (r) ;
+(r0,r1)= byteop16m (r1:0,r3:2) ;
+(r2,r3)= byteop16m (r1:0,r3:2) (r) ;
+(r3,r5)= byteop16m (r1:0,r3:2) ;
+(r6,r7)= byteop16m (r1:0,r3:2) (r) ;
+
+(r1,r2)= byteop16m (r3:2,r3:2) ;
+(r1,r2)= byteop16m (r3:2,r3:2) (r) ;
+(r0,r1)= byteop16m (r3:2,r3:2) ;
+(r2,r3)= byteop16m (r3:2,r3:2) (r) ;
+(r3,r5)= byteop16m (r3:2,r3:2) ;
+(r6,r7)= byteop16m (r3:2,r3:2) (r) ;
+
+//SAA (Dreg_pair, Dreg_pair) ; /* forward byte order operands (b) */
+//SAA (Dreg_pair, Dreg_pair) (R) ; /* reverse byte order operands (b) */
+
+saa(r1:0, r3:2) || r0 = [i0++] || r2 = [i1++] ; /* parallel fill instructions */
+saa (r1:0, r3:2) (R) || r1 = [i0++] || r3 = [i1++] ; /* reverse, parallel fill instructions */
+saa (r1:0, r3:2) ; /* last SAA in a loop, no more fill required */
+
+//( Dreg , Dreg ) = BYTEUNPACK Dreg_pair ; /* (b) */
+//( Dreg , Dreg ) = BYTEUNPACK Dreg_pair (R) ; /* reverse source order (b) */
+
+(r6,r5) = byteunpack r1:0 ; /* non-reversing sources */
+(r6,r5) = byteunpack r1:0 (R) ; /* reversing sources case */
+(r6,r5) = byteunpack r3:2 ; /* non-reversing sources */
+(r6,r5) = byteunpack r3:2 (R) ; /* reversing sources case */
+(r0,r1) = byteunpack r1:0 ; /* non-reversing sources */
+(r2,r3) = byteunpack r1:0 (R) ; /* reversing sources case */
+(r4,r5) = byteunpack r3:2 ; /* non-reversing sources */
+(r6,r7) = byteunpack r3:2 (R) ; /* reversing sources case */
projects / binutils-gdb.git / commitdiff