r300: update r500 path for reordered WPOS and FOG fp attributes

Report and regression testing by Fabio Pedretti.

diff --git a/src/mesa/drivers/dri/r300/r300_state.c b/src/mesa/drivers/dri/r300/r300_state.c
index 46c3df70991498077845f47548a9f6aab3e731d0..f464335422f6b0914d03487529e3cb466946b03e 100644 (file)
--- a/src/mesa/drivers/dri/r300/r300_state.c
+++ b/src/mesa/drivers/dri/r300/r300_state.c
@@ -1701,16 +1701,29 @@ static void r500SetupRSUnit(GLcontext * ctx)
                ++fp_reg;
        }
 
+       if (InputsRead & FRAG_BIT_WPOS) {
+               r300->hw.ri.cmd[R300_RI_INTERP_0 + tex_ip] |= ((rs_tex_count + 0) << R500_RS_IP_TEX_PTR_S_SHIFT) |
+                       ((rs_tex_count + 1) << R500_RS_IP_TEX_PTR_T_SHIFT) |
+                       ((rs_tex_count + 2) << R500_RS_IP_TEX_PTR_R_SHIFT) |
+                       ((rs_tex_count + 3) << R500_RS_IP_TEX_PTR_Q_SHIFT);
+
+               r300->hw.rr.cmd[R300_RR_INST_0 + tex_ip] |= R500_RS_INST_TEX_ID(tex_ip) | R500_RS_INST_TEX_CN_WRITE | R500_RS_INST_TEX_ADDR(fp_reg);
+               InputsRead &= ~FRAG_BIT_WPOS;
+               rs_tex_count += 4;
+               ++tex_ip;
+               ++fp_reg;
+       }
+
        if (InputsRead & FRAG_BIT_FOGC) {
                if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_FOGC, _TNL_ATTRIB_FOG)) {
-                       r300->hw.ri.cmd[R300_RI_INTERP_0 + tex_ip] |= ((rs_tex_count + 0) << R500_RS_IP_TEX_PTR_S_SHIFT) |
-                               ((rs_tex_count + 1) << R500_RS_IP_TEX_PTR_T_SHIFT) |
-                               ((rs_tex_count + 2) << R500_RS_IP_TEX_PTR_R_SHIFT) |
-                               ((rs_tex_count + 3) << R500_RS_IP_TEX_PTR_Q_SHIFT);
+                       r300->hw.ri.cmd[R300_RI_INTERP_0 + tex_ip] |= (rs_tex_count << R500_RS_IP_TEX_PTR_S_SHIFT) |
+                               (R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_T_SHIFT) |
+                               (R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_R_SHIFT) |
+                               (R500_RS_IP_PTR_K1 << R500_RS_IP_TEX_PTR_Q_SHIFT);
 
                        r300->hw.rr.cmd[R300_RR_INST_0 + tex_ip] |= R500_RS_INST_TEX_ID(tex_ip) | R500_RS_INST_TEX_CN_WRITE | R500_RS_INST_TEX_ADDR(fp_reg);
                        InputsRead &= ~FRAG_BIT_FOGC;
-                       rs_tex_count += 4;
+                       rs_tex_count += 1;
                        ++tex_ip;
                        ++fp_reg;
                } else {
@@ -1718,19 +1731,6 @@ static void r500SetupRSUnit(GLcontext * ctx)
                }
        }
 
-       if (InputsRead & FRAG_BIT_WPOS) {
-               r300->hw.ri.cmd[R300_RI_INTERP_0 + tex_ip] |= ((rs_tex_count + 0) << R500_RS_IP_TEX_PTR_S_SHIFT) |
-                               ((rs_tex_count + 1) << R500_RS_IP_TEX_PTR_T_SHIFT) |
-                               ((rs_tex_count + 2) << R500_RS_IP_TEX_PTR_R_SHIFT) |
-                               ((rs_tex_count + 3) << R500_RS_IP_TEX_PTR_Q_SHIFT);
-
-               r300->hw.rr.cmd[R300_RR_INST_0 + tex_ip] |= R500_RS_INST_TEX_ID(tex_ip) | R500_RS_INST_TEX_CN_WRITE | R500_RS_INST_TEX_ADDR(fp_reg);
-               InputsRead &= ~FRAG_BIT_WPOS;
-               rs_tex_count += 4;
-               ++tex_ip;
-               ++fp_reg;
-       }
-
        /* Setup default color if no color or tex was set */
        if (rs_tex_count == 0 && col_ip == 0) {
                r300->hw.rr.cmd[R300_RR_INST_0] |= R500_RS_INST_COL_ID(0) | R500_RS_INST_COL_CN_WRITE | R500_RS_INST_COL_ADDR(0) | R500_RS_COL_FMT(R300_RS_COL_FMT_0001);