added english language description for lhbrsx instruction

diff --git a/openpower/isa/fixedloadshift.mdwn b/openpower/isa/fixedloadshift.mdwn
index 1935e59f08878e89b594588a2b1625fdc044248d..ba0b5d1e0ffb6c3900843b821a3342b39895c37e 100644 (file)
--- a/openpower/isa/fixedloadshift.mdwn
+++ b/openpower/isa/fixedloadshift.mdwn
@@ -356,13 +356,10 @@ Description:
     Let the effective address (EA) be the sum of the contents of
     register RB shifted by (SH+1), and (RA|0).
 
-    Bits 0:7 of the word in storage addressed
-    by EA are loaded into RT[56:63]. Bits 8:15 of the word in
-    storage addressed by EA are loaded into RT[48:55]. Bits
-    16:23 of the word in storage addressed by EA are
-    loaded into RT[40:47]. Bits 24:31 of the word in storage
-    addressed by EA are loaded into RT 32:39.
-    RT[0:31] are set to 0.
+    Bits 0:7 of the halfword in storage addressed by EA are
+    loaded into RT 56:63. Bits 8:15 of the halfword in storage
+    addressed by EA are loaded into RT[48:55].
+    RT[0:47] are set to 0.
 
 
 Special Registers Altered: