+2016-11-11 Michael Meissner <meissner@linux.vnet.ibm.com>
+
+ PR target/78243
+ * config/rs6000/vsx.md (vsx_extract_<mode>_p9): Correct the
+ element order for little endian ordering.
+
+ * config/rs6000/altivec.md (reduc_plus_scal_<mode>): Use
+ VECTOR_ELT_ORDER_BIG and not BYTES_BIG_ENDIAN to adjust element
+ number.
+
2016-11-11 Uros Bizjak <ubizjak@gmail.com>
PR target/78310
rtx vtmp1 = gen_reg_rtx (V4SImode);
rtx vtmp2 = gen_reg_rtx (<MODE>mode);
rtx dest = gen_lowpart (V4SImode, vtmp2);
- int elt = BYTES_BIG_ENDIAN ? GET_MODE_NUNITS (<MODE>mode) - 1 : 0;
+ int elt = VECTOR_ELT_ORDER_BIG ? GET_MODE_NUNITS (<MODE>mode) - 1 : 0;
emit_insn (gen_altivec_vspltisw (vzero, const0_rtx));
emit_insn (gen_altivec_vsum4s<VI_char>s (vtmp1, operands[1], vzero));
"VECTOR_MEM_VSX_P (<MODE>mode) && TARGET_VEXTRACTUB
&& TARGET_VSX_SMALL_INTEGER"
{
- /* Note, the element number has already been adjusted for endianness, so we
- don't have to adjust it here. */
- int unit_size = GET_MODE_UNIT_SIZE (<MODE>mode);
- HOST_WIDE_INT offset = unit_size * INTVAL (operands[2]);
+ HOST_WIDE_INT elt = INTVAL (operands[2]);
+ HOST_WIDE_INT elt_adj = (!VECTOR_ELT_ORDER_BIG
+ ? GET_MODE_NUNITS (<MODE>mode) - 1 - elt
+ : elt);
+
+ HOST_WIDE_INT unit_size = GET_MODE_UNIT_SIZE (<MODE>mode);
+ HOST_WIDE_INT offset = unit_size * elt_adj;
operands[2] = GEN_INT (offset);
if (unit_size == 4)