Fix markup in gcc.dg/vect/vect-cond-reduc-3.c

gcc.dg/vect/vect-cond-reduc-3.c had been failing on
arm-linux-gnueabihf since the test was added, because the test needs
support for VEC_COND_EXPR <float cmp float, int, int> whereas the target
only supports VEC_COND_EXPRs in which all modes are the same.  (I have
a fix for that, but it's not really stage 3 material.)

2019-11-22  Richard Sandiford  <richard.sandiford@arm.com>

gcc/testsuite/
	* gcc.dg/vect/vect-cond-reduc-3.c: Require vect_cond_mixed
	rather than vect_condition.

From-SVN: r278612

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 181e478bf90ce2a6283eb9f638b69b35982d41aa..9275c70d8e3217553925bbe991f987e2fb2fa24a 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2019-11-22  Richard Sandiford  <richard.sandiford@arm.com>
+
+       * gcc.dg/vect/vect-cond-reduc-3.c: Require vect_cond_mixed
+       rather than vect_condition.
+
 2019-11-22  Claudiu Zissulescu  <claziss@synopsys.com>
 
        * gcc.target/arc/add_n-combine.c: Match add1/2/3 instruction in

diff --git a/gcc/testsuite/gcc.dg/vect/vect-cond-reduc-3.c b/gcc/testsuite/gcc.dg/vect/vect-cond-reduc-3.c
index bb99b95eca5fff17c79a26cbe3542d5ed5f47a53..98f99ab58ae2f33af619f890df3de210764da43c 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/vect-cond-reduc-3.c
+++ b/gcc/testsuite/gcc.dg/vect/vect-cond-reduc-3.c
@@ -1,6 +1,6 @@
 /* Disabling epilogues until we find a better way to deal with scans.  */
 /* { dg-additional-options "--param vect-epilogues-nomask=0" } */
-/* { dg-require-effective-target vect_condition } */
+/* { dg-require-effective-target vect_cond_mixed } */
 /* { dg-require-effective-target vect_float } */
 
 #include "tree-vect.h"