x86: Change some CR0 settings when setting up kvm x86 processes.
authorGabe Black <gabe.black@gmail.com>
Wed, 16 Dec 2020 01:38:12 +0000 (17:38 -0800)
committerGabe Black <gabe.black@gmail.com>
Thu, 17 Dec 2020 03:30:01 +0000 (03:30 +0000)
These values were (seemingly) arbitrarily changed from the original,
non-KVM settings, and no longer matched the comments which were also
copied over. These two bits enable alignment checking on memory accesses
(not normally used on x86), and whether kernel code can write to read
only pages.

Change-Id: I48e560e448e4849607f12e9336d1ab0458ad9407
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38536
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
src/arch/x86/process.cc

index e9cdb617c63afebd69450859417b3c20cbc9c9ba..25f556ccdf8211ff2e85ba146635953fb499cab9 100644 (file)
@@ -352,8 +352,8 @@ X86_64Process::initState()
             cr0.pg = 1; // Turn on paging.
             cr0.cd = 0; // Don't disable caching.
             cr0.nw = 0; // This is bit is defined to be ignored.
-            cr0.am = 1; // No alignment checking
-            cr0.wp = 1; // Supervisor mode can write read only pages
+            cr0.am = 0; // No alignment checking
+            cr0.wp = 0; // Supervisor mode can write read only pages
             cr0.ne = 1;
             cr0.et = 1; // This should always be 1
             cr0.ts = 0; // We don't do task switching, so causing fp exceptions