X86: Implement idiv and propogate the mul corner case fix.

--HG--
extra : convert_revision : 348aa081067728afa14dc5b609fc7e26dbc5fad5

diff --git a/src/arch/x86/isa/decoder/one_byte_opcodes.isa b/src/arch/x86/isa/decoder/one_byte_opcodes.isa
index d8db470633afb9ff748a9ae795606c794e154f5d..ecb92947f6d62ae3e64dc1f4029b870d2c926640 100644 (file)
--- a/src/arch/x86/isa/decoder/one_byte_opcodes.isa
+++ b/src/arch/x86/isa/decoder/one_byte_opcodes.isa
@@ -504,28 +504,30 @@
                 {{"Tried to execute the rep/repe prefix!"}});
             0x4: hlt();
             0x5: cmc();
-            //0x6: group3_Eb();
-            0x6: decode MODRM_REG {
-                0x0: Inst::TEST(Eb,Iz);
-                0x1: Inst::TEST(Eb,Iz);
-                0x2: Inst::NOT(Eb);
-                0x3: Inst::NEG(Eb);
-                0x4: Inst::MUL_B(Eb);
-                0x5: Inst::IMUL_B(Eb);
-                //This should be Eb, but it access the entire word value ax.
-                0x6: Inst::DIV_B(Ew);
-                0x7: idiv_Eb();
-            }
-            //0x7: group3_Ev();
-            0x7: decode MODRM_REG {
-                0x0: Inst::TEST(Ev,Iz);
-                0x1: Inst::TEST(Ev,Iz);
-                0x2: Inst::NOT(Ev);
-                0x3: Inst::NEG(Ev);
-                0x4: Inst::MUL(Ev);
-                0x5: Inst::IMUL(Ev);
-                0x6: Inst::DIV(Ev);
-                0x7: idiv_Ev();
+            format Inst {
+                //0x6: group3_Eb();
+                0x6: decode MODRM_REG {
+                    0x0: TEST(Eb,Iz);
+                    0x1: TEST(Eb,Iz);
+                    0x2: NOT(Eb);
+                    0x3: NEG(Eb);
+                    0x4: MUL_B(Eb);
+                    0x5: IMUL_B(Eb);
+                    //This should be Eb, but it access the entire word value ax.
+                    0x6: DIV_B(Ew);
+                    0x7: IDIV(Eb);
+                }
+                //0x7: group3_Ev();
+                0x7: decode MODRM_REG {
+                    0x0: TEST(Ev,Iz);
+                    0x1: TEST(Ev,Iz);
+                    0x2: NOT(Ev);
+                    0x3: NEG(Ev);
+                    0x4: MUL(Ev);
+                    0x5: IMUL(Ev);
+                    0x6: DIV(Ev);
+                    0x7: IDIV(Ev);
+                }
             }
         }
         0x1F: decode OPCODE_OP_BOTTOM3 {

diff --git a/src/arch/x86/isa/insts/arithmetic/multiply_and_divide.py b/src/arch/x86/isa/insts/arithmetic/multiply_and_divide.py
index c28b2567cd78996dee92132ce9d5f7c967a9d29d..f498a10e06b4ce216b13babdc088888dd1aa59ee 100644 (file)
--- a/src/arch/x86/isa/insts/arithmetic/multiply_and_divide.py
+++ b/src/arch/x86/isa/insts/arithmetic/multiply_and_divide.py
@@ -134,8 +134,9 @@ def macroop IMUL_B_P
 
 def macroop IMUL_R
 {
-    muleh rdx, rax, reg
+    muleh t1, rax, reg
     mulel rax, rax, reg
+    mov rdx, rdx, t1
 };
 
 def macroop IMUL_M
@@ -229,8 +230,9 @@ def macroop DIV_B_P
 
 def macroop DIV_R
 {
-    divr rdx, rax, reg
+    divr t1, rax, reg
     divq rax, rax, reg
+    mov rdx, rdx, t1
 };
 
 def macroop DIV_M
@@ -247,6 +249,32 @@ def macroop DIV_P
     divr rdx, rax, t1
     divq rax, rax, t1
 };
+
+#
+# Signed division
+#
+
+def macroop IDIV_R
+{
+    divr t1, rax, reg
+    divq rax, rax, reg
+    mov rdx, rdx, t1
+};
+
+def macroop IDIV_M
+{
+    ld t1, seg, sib, disp
+    divr rdx, rax, t1
+    divq rax, rax, t1
+};
+
+def macroop IDIV_P
+{
+    rdip t7
+    ld t1, seg, riprel, disp
+    divr rdx, rax, t1
+    divq rax, rax, t1
+};
 '''
 #let {{
 #    class IDIV(Inst):