extern rtx sfunc_uses_reg (rtx);
extern int barrier_align (rtx);
extern int sh_loop_align (rtx);
-extern int fp_zero_operand (rtx);
-extern int fp_one_operand (rtx);
+extern bool fp_zero_operand (rtx);
+extern bool fp_one_operand (rtx);
extern int fp_int_operand (rtx);
extern rtx get_fpscr_rtx (void);
extern bool sh_legitimate_index_p (enum machine_mode, rtx);
extern bool sh_legitimize_reload_address (rtx *, enum machine_mode, int, int);
extern rtx legitimize_pic_address (rtx, enum machine_mode, rtx);
-extern int nonpic_symbol_mentioned_p (rtx);
+extern bool nonpic_symbol_mentioned_p (rtx);
extern void emit_sf_insn (rtx);
extern void emit_df_insn (rtx);
extern void output_pic_addr_const (FILE *, rtx);
-extern int expand_block_move (rtx *);
+extern bool expand_block_move (rtx *);
extern int prepare_move_operands (rtx[], enum machine_mode mode);
extern enum rtx_code prepare_cbranch_operands (rtx *, enum machine_mode mode,
enum rtx_code comparison);
extern void gen_ashift_hi (int, int, rtx);
extern void gen_shifty_op (int, rtx *);
extern void gen_shifty_hi_op (int, rtx *);
-extern int expand_ashiftrt (rtx *);
-extern int sh_dynamicalize_shift_p (rtx);
+extern bool expand_ashiftrt (rtx *);
+extern bool sh_dynamicalize_shift_p (rtx);
extern int shl_and_kind (rtx, rtx, int *);
extern int shl_and_length (rtx);
extern int shl_and_scr_length (rtx);
-extern int gen_shl_and (rtx, rtx, rtx, rtx);
+extern bool gen_shl_and (rtx, rtx, rtx, rtx);
extern int shl_sext_kind (rtx, rtx, int *);
extern int shl_sext_length (rtx);
-extern int gen_shl_sext (rtx, rtx, rtx, rtx);
+extern bool gen_shl_sext (rtx, rtx, rtx, rtx);
extern rtx gen_datalabel_ref (rtx);
extern int regs_used (rtx, int);
extern void fixup_addr_diff_vecs (rtx);
extern void final_prescan_insn (rtx, rtx *, int);
extern int symbol_ref_operand (rtx, enum machine_mode);
extern enum tls_model tls_symbolic_operand (rtx, enum machine_mode);
-extern int system_reg_operand (rtx, enum machine_mode);
+extern bool system_reg_operand (rtx, enum machine_mode);
extern int general_movsrc_operand (rtx, enum machine_mode);
extern int general_movdst_operand (rtx, enum machine_mode);
extern int arith_reg_operand (rtx, enum machine_mode);
extern int fpul_operand (rtx, enum machine_mode);
extern int commutative_float_operator (rtx, enum machine_mode);
extern int noncommutative_float_operator (rtx, enum machine_mode);
-extern int reg_unused_after (rtx, rtx);
+extern bool reg_unused_after (rtx, rtx);
extern void expand_sf_unop (rtx (*)(rtx, rtx, rtx), rtx *);
extern void expand_sf_binop (rtx (*)(rtx, rtx, rtx, rtx), rtx *);
extern void expand_df_unop (rtx (*)(rtx, rtx, rtx), rtx *);
extern void expand_df_binop (rtx (*)(rtx, rtx, rtx, rtx), rtx *);
extern void expand_fp_branch (rtx (*)(void), rtx (*)(void));
extern int sh_insn_length_adjustment (rtx);
-extern int sh_can_redirect_branch (rtx, rtx);
+extern bool sh_can_redirect_branch (rtx, rtx);
extern void sh_expand_unop_v2sf (enum rtx_code, rtx, rtx);
extern void sh_expand_binop_v2sf (enum rtx_code, rtx, rtx, rtx);
extern int sh_expand_t_scc (rtx *);
extern int sh_media_register_for_return (void);
extern void sh_expand_prologue (void);
extern void sh_expand_epilogue (bool);
-extern int sh_need_epilogue (void);
+extern bool sh_need_epilogue (void);
extern void sh_set_return_address (rtx, rtx);
extern int initial_elimination_offset (int, int);
-extern int fldi_ok (void);
-extern int sh_hard_regno_rename_ok (unsigned int, unsigned int);
-extern int sh_cfun_interrupt_handler_p (void);
-extern int sh_cfun_resbank_handler_p (void);
-extern int sh_attr_renesas_p (const_tree);
-extern int sh_cfun_attr_renesas_p (void);
+extern bool fldi_ok (void);
+extern bool sh_hard_regno_rename_ok (unsigned int, unsigned int);
+extern bool sh_cfun_interrupt_handler_p (void);
+extern bool sh_cfun_resbank_handler_p (void);
+extern bool sh_attr_renesas_p (const_tree);
+extern bool sh_cfun_attr_renesas_p (void);
extern bool sh_cannot_change_mode_class
(enum machine_mode, enum machine_mode, enum reg_class);
extern bool sh_small_register_classes_for_mode_p (enum machine_mode);
extern void sh_mark_label (rtx, int);
-extern int check_use_sfunc_addr (rtx, rtx);
+extern bool check_use_sfunc_addr (rtx, rtx);
#ifdef HARD_CONST
extern void fpscr_set_from_mem (int, HARD_REG_SET);
extern rtx function_symbol (rtx, const char *, enum sh_function_kind);
extern rtx sh_get_pr_initial_val (void);
-extern int sh_pass_in_reg_p (CUMULATIVE_ARGS *, enum machine_mode, tree);
extern void sh_init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx, tree, signed int, enum machine_mode);
extern rtx sh_dwarf_register_span (rtx);
extern rtx replace_n_hard_rtx (rtx, rtx *, int , int);
extern int shmedia_cleanup_truncate (rtx *, void *);
-extern int sh_contains_memref_p (rtx);
-extern int sh_loads_bankedreg_p (rtx);
+extern bool sh_contains_memref_p (rtx);
+extern bool sh_loads_bankedreg_p (rtx);
extern rtx shmedia_prepare_call_address (rtx fnaddr, int is_sibcall);
extern int sh2a_get_function_vector_number (rtx);
-extern int sh2a_is_function_vector_call (rtx);
+extern bool sh2a_is_function_vector_call (rtx);
extern void sh_fix_range (const char *);
extern bool sh_hard_regno_mode_ok (unsigned int, enum machine_mode);
#endif /* ! GCC_SH_PROTOS_H */
static rtx add_constant (rtx, enum machine_mode, rtx);
static void dump_table (rtx, rtx);
static int hi_const (rtx);
-static int broken_move (rtx);
-static int mova_p (rtx);
+static bool broken_move (rtx);
+static bool mova_p (rtx);
static rtx find_barrier (int, rtx, rtx);
-static int noncall_uses_reg (rtx, rtx, rtx *);
+static bool noncall_uses_reg (rtx, rtx, rtx *);
static rtx gen_block_redirect (rtx, int, int);
static void sh_reorg (void);
static void sh_option_override (void);
static int rank_for_reorder (const void *, const void *);
static void swap_reorder (rtx *, int);
static void ready_reorder (rtx *, int);
-static short high_pressure (enum machine_mode);
+static bool high_pressure (enum machine_mode);
static int sh_reorder (FILE *, int, rtx *, int *, int);
static int sh_reorder2 (FILE *, int, rtx *, int *, int);
static void sh_md_init (FILE *, int, int);
static rtx sh_expand_builtin (tree, rtx, rtx, enum machine_mode, int);
static void sh_output_mi_thunk (FILE *, tree, HOST_WIDE_INT, HOST_WIDE_INT, tree);
static void sh_file_start (void);
-static int flow_dependent_p (rtx, rtx);
+static bool flow_dependent_p (rtx, rtx);
static void flow_dependent_p_1 (rtx, const_rtx, void *);
static int shiftcosts (rtx);
static int and_xor_ior_costs (rtx, int);
static bool sh_scalar_mode_supported_p (enum machine_mode);
static int sh_dwarf_calling_convention (const_tree);
static void sh_encode_section_info (tree, rtx, int);
-static int sh2a_function_vector_p (tree);
+static bool sh2a_function_vector_p (tree);
static void sh_trampoline_init (rtx, tree, rtx);
static rtx sh_trampoline_adjust_address (rtx);
static void sh_conditional_register_usage (void);
OPERANDS[2] is the size.
OPERANDS[3] is the alignment safe to use. */
-int
+bool
expand_block_move (rtx *operands)
{
int align = INTVAL (operands[3]);
int bytes = (constp ? INTVAL (operands[2]) : 0);
if (! constp)
- return 0;
+ return false;
/* If we could use mov.l to move words and dest is word-aligned, we
can use movua.l for loads and still generate a relatively short
src_addr, copied),
bytes - copied, align, 0);
- return 1;
+ return true;
}
/* If it isn't a constant number of bytes, or if it doesn't have 4 byte
alignment, or if it isn't a multiple of 4 bytes, then fail. */
if (align < 4 || (bytes % 4 != 0))
- return 0;
+ return false;
if (TARGET_HARD_SH4)
{
if (bytes < 12)
- return 0;
+ return false;
else if (bytes == 12)
{
rtx func_addr_rtx = gen_reg_rtx (Pmode);
force_into (XEXP (operands[0], 0), r4);
force_into (XEXP (operands[1], 0), r5);
emit_insn (gen_block_move_real_i4 (func_addr_rtx));
- return 1;
+ return true;
}
else if (! optimize_size)
{
dwords = bytes >> 3;
emit_insn (gen_move_insn (r6, GEN_INT (dwords - 1)));
emit_insn (gen_block_lump_real_i4 (func_addr_rtx));
- return 1;
+ return true;
}
else
- return 0;
+ return false;
}
if (bytes < 64)
{
force_into (XEXP (operands[0], 0), r4);
force_into (XEXP (operands[1], 0), r5);
emit_insn (gen_block_move_real (func_addr_rtx));
- return 1;
+ return true;
}
/* This is the same number of bytes as a memcpy call, but to a different
while_loop = ((bytes / 4) / 16 - 1) * 16;
emit_insn (gen_move_insn (r6, GEN_INT (while_loop + final_switch)));
emit_insn (gen_block_lump_real (func_addr_rtx));
- return 1;
+ return true;
}
- return 0;
+ return false;
}
/* Prepare operands for a move define_expand; specifically, one of the
/* ??? Rewrite to use super-optimizer sequences. */
-int
+bool
expand_ashiftrt (rtx *operands)
{
rtx wrk;
rtx count = copy_to_mode_reg (SImode, operands[2]);
emit_insn (gen_negsi2 (count, count));
emit_insn (gen_ashrsi3_d (operands[0], operands[1], count));
- return 1;
+ return true;
}
else if (ashiftrt_insns[INTVAL (operands[2]) & 31]
> 1 + SH_DYNAMIC_SHIFT_COST)
rtx count
= force_reg (SImode, GEN_INT (- (INTVAL (operands[2]) & 31)));
emit_insn (gen_ashrsi3_d (operands[0], operands[1], count));
- return 1;
+ return true;
}
}
if (!CONST_INT_P (operands[2]))
- return 0;
+ return false;
value = INTVAL (operands[2]) & 31;
emit_insn (gen_cmpgtsi_t (force_reg (SImode, CONST0_RTX (SImode)),
operands[1]));
emit_insn (gen_mov_neg_si_t (operands[0]));
- return 1;
+ return true;
}
emit_insn (gen_ashrsi2_31 (operands[0], operands[1]));
- return 1;
+ return true;
}
else if (value >= 16 && value <= 19)
{
while (value--)
gen_ashift (ASHIFTRT, 1, wrk);
emit_move_insn (operands[0], wrk);
- return 1;
+ return true;
}
/* Expand a short sequence inline, longer call a magic routine. */
else if (value <= 5)
while (value--)
gen_ashift (ASHIFTRT, 1, wrk);
emit_move_insn (operands[0], wrk);
- return 1;
+ return true;
}
wrk = gen_reg_rtx (Pmode);
function_symbol (wrk, func, SFUNC_STATIC);
emit_insn (gen_ashrsi3_n (GEN_INT (value), wrk));
emit_move_insn (operands[0], gen_rtx_REG (SImode, 4));
- return 1;
+ return true;
}
-int
+bool
sh_dynamicalize_shift_p (rtx count)
{
return shift_insns[INTVAL (count) & 31] > 1 + SH_DYNAMIC_SHIFT_COST;
/* Generate rtl for instructions for which shl_and_kind advised a particular
method of generating them, i.e. returned zero. */
-int
+bool
gen_shl_and (rtx dest, rtx left_rtx, rtx mask_rtx, rtx source)
{
int attributes[3];
switch (kind)
{
default:
- return -1;
+ return true;
case 1:
{
int first = attributes[2];
break;
}
}
- return 0;
+ return false;
}
/* Try to find a good way to implement the combiner pattern
/* Generate rtl for this pattern */
-int
+bool
gen_shl_sext (rtx dest, rtx left_rtx, rtx size_rtx, rtx source)
{
int kind;
emit_insn (gen_ashrsi3_k (dest, dest, const1_rtx));
break;
default:
- return -1;
+ return true;
}
- return 0;
+ return false;
}
/* Prefix a symbol_ref name with "datalabel". */
CONST_DOUBLE input value is CONST_OK_FOR_I08. For a SFmode move, we don't
need to fix it if the input value is CONST_OK_FOR_I08. */
-static int
+static bool
broken_move (rtx insn)
{
if (NONJUMP_INSN_P (insn))
&& (satisfies_constraint_I20 (SET_SRC (pat))
|| satisfies_constraint_I28 (SET_SRC (pat))))
&& ! satisfies_constraint_I08 (SET_SRC (pat)))
- return 1;
+ return true;
}
- return 0;
+ return false;
}
-static int
+static bool
mova_p (rtx insn)
{
return (NONJUMP_INSN_P (insn)
setting it while calling it. Set *SET to a SET rtx if the register
is set by INSN. */
-static int
+static bool
noncall_uses_reg (rtx reg, rtx insn, rtx *set)
{
rtx pattern, reg2;
&& REG_P (SET_DEST (pattern))
&& REGNO (reg) == REGNO (SET_DEST (pattern)))
*set = pattern;
- return 0;
+ return false;
}
if (!CALL_P (insn))
{
{
part = XVECEXP (par, 0, i);
if (GET_CODE (part) != SET && reg_mentioned_p (reg, part))
- return 1;
+ return true;
}
return reg_mentioned_p (reg, SET_SRC (pattern));
}
- return 1;
+ return true;
}
pattern = PATTERN (insn);
for (i = XVECLEN (pattern, 0) - 1; i >= 1; i--)
if (reg_mentioned_p (reg, XVECEXP (pattern, 0, i)))
- return 1;
+ return true;
pattern = XVECEXP (pattern, 0, 0);
}
mode is different. */
if (!REG_P (SET_DEST (pattern))
|| REGNO (reg) != REGNO (SET_DEST (pattern)))
- return 1;
+ return true;
*set = pattern;
}
if (GET_CODE (pattern) != CALL
|| !MEM_P (XEXP (pattern, 0))
|| ! rtx_equal_p (reg, XEXP (XEXP (pattern, 0), 0)))
- return 1;
+ return true;
- return 0;
+ return false;
}
/* Given a X, a pattern of an insn or a part of it, return a mask of used
static int sh_need_epilogue_known = 0;
-int
+bool
sh_need_epilogue (void)
{
if (! sh_need_epilogue_known)
sh_promote_prototypes (const_tree type)
{
if (TARGET_HITACHI)
- return 0;
+ return false;
if (! type)
- return 1;
+ return true;
return ! sh_attr_renesas_p (type);
}
return NULL_TREE;
}
-/* Returns 1 if current function has been assigned the attribute
+/* Returns true if current function has been assigned the attribute
'function_vector'. */
-int
+bool
sh2a_is_function_vector_call (rtx x)
{
if (GET_CODE (x) == SYMBOL_REF
tree tr = SYMBOL_REF_DECL (x);
if (sh2a_function_vector_p (tr))
- return 1;
+ return true;
}
- return 0;
+ return false;
}
/* Returns the function vector number, if the attribute
}
/* True if __attribute__((renesas)) or -mrenesas. */
-int
+bool
sh_attr_renesas_p (const_tree td)
{
if (TARGET_HITACHI)
- return 1;
+ return true;
if (td == 0)
- return 0;
+ return false;
if (DECL_P (td))
td = TREE_TYPE (td);
if (td == error_mark_node)
- return 0;
+ return false;
return (lookup_attribute ("renesas", TYPE_ATTRIBUTES (td))
!= NULL_TREE);
}
/* True if __attribute__((renesas)) or -mrenesas, for the current
function. */
-int
+bool
sh_cfun_attr_renesas_p (void)
{
return sh_attr_renesas_p (current_function_decl);
}
-int
+bool
sh_cfun_interrupt_handler_p (void)
{
return (lookup_attribute ("interrupt_handler",
!= NULL_TREE);
}
-/* Returns 1 if FUNC has been assigned the attribute
+/* Returns true if FUNC has been assigned the attribute
"function_vector". */
-int
+bool
sh2a_function_vector_p (tree func)
{
tree list;
if (TREE_CODE (func) != FUNCTION_DECL)
- return 0;
+ return false;
list = SH_ATTRIBUTES (func);
while (list)
{
if (is_attribute_p ("function_vector", TREE_PURPOSE (list)))
- return 1;
+ return true;
list = TREE_CHAIN (list);
}
- return 0;
+ return false;
}
/* Returns TRUE if given tree has the "resbank" attribute. */
-int
+bool
sh_cfun_resbank_handler_p (void)
{
return ((lookup_attribute ("resbank",
\f
/* Predicates used by the templates. */
-/* Returns 1 if OP is MACL, MACH or PR. The input must be a REG rtx.
+/* Returns true if OP is MACL, MACH or PR. The input must be a REG rtx.
Used only in general_movsrc_operand. */
-int
+bool
system_reg_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
{
switch (REGNO (op))
case PR_REG:
case MACL_REG:
case MACH_REG:
- return 1;
+ return true;
}
- return 0;
+ return false;
}
-/* Nonzero if OP is a floating point value with value 0.0. */
+/* Returns true if OP is a floating point value with value 0.0. */
-int
+bool
fp_zero_operand (rtx op)
{
REAL_VALUE_TYPE r;
if (GET_MODE (op) != SFmode)
- return 0;
+ return false;
REAL_VALUE_FROM_CONST_DOUBLE (r, op);
return REAL_VALUES_EQUAL (r, dconst0) && ! REAL_VALUE_MINUS_ZERO (r);
}
-/* Nonzero if OP is a floating point value with value 1.0. */
+/* Returns true if OP is a floating point value with value 1.0. */
-int
+bool
fp_one_operand (rtx op)
{
REAL_VALUE_TYPE r;
if (GET_MODE (op) != SFmode)
- return 0;
+ return false;
REAL_VALUE_FROM_CONST_DOUBLE (r, op);
return REAL_VALUES_EQUAL (r, dconst1);
interface to find that out during reload, so we must avoid
choosing an fldi alternative during reload and thus failing to
allocate a scratch register for the constant loading. */
-int
+bool
fldi_ok (void)
{
- return 1;
+ return true;
}
/* Return the TLS type for TLS symbols, 0 for otherwise. */
/* Return nonzero if REG is not used after INSN.
We assume REG is a reload reg, and therefore does
not live past labels. It may live past calls or jumps though. */
-int
+bool
reg_unused_after (rtx reg, rtx insn)
{
enum rtx_code code;
set = single_set (insn);
if (set && !MEM_P (SET_DEST (set))
&& reg_overlap_mentioned_p (reg, SET_DEST (set)))
- return 1;
+ return true;
while ((insn = NEXT_INSN (insn)))
{
#endif
if (code == JUMP_INSN)
- return 0;
+ return false;
/* If this is a sequence, we must handle them all at once.
We could have for instance a call that sets the target register,
else if (JUMP_P (this_insn))
{
if (INSN_ANNULLED_BRANCH_P (this_insn))
- return 0;
+ return false;
code = JUMP_INSN;
}
if (set && reg_overlap_mentioned_p (reg, SET_SRC (set)))
- return 0;
+ return false;
if (set && reg_overlap_mentioned_p (reg, SET_DEST (set)))
{
if (!MEM_P (SET_DEST (set)))
- retval = 1;
+ retval = true;
else
- return 0;
+ return false;
}
if (set == 0
&& reg_overlap_mentioned_p (reg, PATTERN (this_insn)))
- return 0;
+ return false;
}
if (retval == 1)
- return 1;
+ return true;
else if (code == JUMP_INSN)
- return 0;
+ return false;
}
set = single_set (insn);
if (set && reg_overlap_mentioned_p (reg, SET_SRC (set)))
- return 0;
+ return false;
if (set && reg_overlap_mentioned_p (reg, SET_DEST (set)))
return !MEM_P (SET_DEST (set));
if (set == 0 && reg_overlap_mentioned_p (reg, PATTERN (insn)))
- return 0;
+ return false;
if (code == CALL_INSN && call_really_used_regs[REGNO (reg)])
- return 1;
+ return true;
}
- return 1;
+ return true;
}
\f
#include "ggc.h"
\f
/* Return TRUE if X references a SYMBOL_REF or LABEL_REF whose symbol
isn't protected by a PIC unspec. */
-int
+bool
nonpic_symbol_mentioned_p (rtx x)
{
- register const char *fmt;
- register int i;
+ const char *fmt;
+ int i;
if (GET_CODE (x) == SYMBOL_REF || GET_CODE (x) == LABEL_REF
|| GET_CODE (x) == PC)
- return 1;
+ return true;
/* We don't want to look into the possible MEM location of a
CONST_DOUBLE, since we're not going to use it, in general. */
if (GET_CODE (x) == CONST_DOUBLE)
- return 0;
+ return false;
if (GET_CODE (x) == UNSPEC
&& (XINT (x, 1) == UNSPEC_PIC
|| XINT (x, 1) == UNSPEC_PLT
|| XINT (x, 1) == UNSPEC_SYMOFF
|| XINT (x, 1) == UNSPEC_PCREL_SYMOFF))
- return 0;
+ return false;
fmt = GET_RTX_FORMAT (GET_CODE (x));
for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
{
if (fmt[i] == 'E')
{
- register int j;
-
+ int j;
for (j = XVECLEN (x, i) - 1; j >= 0; j--)
if (nonpic_symbol_mentioned_p (XVECEXP (x, i, j)))
- return 1;
+ return true;
}
else if (fmt[i] == 'e' && nonpic_symbol_mentioned_p (XEXP (x, i)))
- return 1;
+ return true;
}
- return 0;
+ return false;
}
/* Convert a non-PIC address in `orig' to a PIC address using @GOT or
/* Return true if it's possible to redirect BRANCH1 to the destination
of an unconditional jump BRANCH2. We only want to do this if the
resulting branch will have a short displacement. */
-int
+bool
sh_can_redirect_branch (rtx branch1, rtx branch2)
{
if (flag_expensive_optimizations && simplejump_p (branch2))
insn = PREV_INSN (insn))
{
if (insn == dest)
- return 1;
+ return true;
else
distance += get_attr_length (insn);
}
insn = NEXT_INSN (insn))
{
if (insn == dest)
- return 1;
+ return true;
else
distance += get_attr_length (insn);
}
}
- return 0;
+ return false;
}
/* Return nonzero if register old_reg can be renamed to register new_reg. */
-int
+bool
sh_hard_regno_rename_ok (unsigned int old_reg ATTRIBUTE_UNUSED,
unsigned int new_reg)
{
call-clobbered. */
if (sh_cfun_interrupt_handler_p () && !df_regs_ever_live_p (new_reg))
- return 0;
+ return false;
- return 1;
+ return true;
}
/* Function to update the integer COST
/* Check if INSN is flow-dependent on DEP_INSN. Can also be used to check
if DEP_INSN is anti-flow dependent on INSN. */
-static int
+static bool
flow_dependent_p (rtx insn, rtx dep_insn)
{
rtx tmp = PATTERN (insn);
#define SFMODE_MAX_WEIGHT 10
/* Return true if the pressure is high for MODE. */
-static short
+static bool
high_pressure (enum machine_mode mode)
{
/* Pressure on register r0 can lead to spill failures. so avoid sched1 for
functions that already have high pressure on r0. */
if (r0_life_regions >= R0_MAX_LIFE_REGIONS)
- return 1;
+ return true;
if (mode == SFmode)
return (CURR_REGMODE_PRESSURE (SFmode) > SFMODE_MAX_WEIGHT);
use_sfunc_addr.
INSN is the use_sfunc_addr instruction, and REG is the register it
guards. */
-int
+bool
check_use_sfunc_addr (rtx insn, rtx reg)
{
/* Search for the sfunc. It should really come right after INSN. */
return (MEM_P (*loc));
}
-/* Return nonzero iff INSN contains a MEM. */
-int
+/* Return true iff INSN contains a MEM. */
+bool
sh_contains_memref_p (rtx insn)
{
return for_each_rtx (&PATTERN (insn), &sh_contains_memref_p_1, NULL);
}
-/* Return nonzero iff INSN loads a banked register. */
-int
+/* Return true iff INSN loads a banked register. */
+bool
sh_loads_bankedreg_p (rtx insn)
{
if (GET_CODE (PATTERN (insn)) == SET)
{
rtx op = SET_DEST (PATTERN(insn));
if (REG_P (op) && BANKED_REGISTER_P (REGNO (op)))
- return 1;
+ return true;
}
- return 0;
+ return false;
}
/* FNADDR is the MEM expression from a call expander. Return an address
projects / gcc.git / commitdiff