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added sthsux instruction
authorShriya Sharma <shriya@redsemiconductor.com>
Thu, 19 Oct 2023 10:49:11 +0000 (11:49 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sun, 29 Oct 2023 08:54:37 +0000 (08:54 +0000)
openpower/isa/fixedstoreshift.mdwn patch | blob | history

diff --git a/openpower/isa/fixedstoreshift.mdwn b/openpower/isa/fixedstoreshift.mdwn
index d38616c87dcb8010ada066ffad59a27c4e4ecef8..1f377cd1c58afefc573b85cc0cd30c34bd6be118 100644 (file)
--- a/openpower/isa/fixedstoreshift.mdwn
+++ b/openpower/isa/fixedstoreshift.mdwn
@@ -84,15 +84,15 @@ Special Registers Altered:
 
     None
 
-# Store Halfword with Update Indexed
+# Store Halfword Shifted with Update Indexed
 
 X-Form
 
-* sthux RS,RA,RB
+* sthsux RS,RA,RB,SH
 
 Pseudo-code:
 
-    EA <- (RA) + (RB)
+    EA <- (RA) + (RB) << (SH+1)
     MEM(EA, 2) <- (RS)[XLEN-16:XLEN-1]
     RA <- EA