Check nusers of DSP output, not whole flop

diff --git a/passes/pmgen/xilinx_dsp.pmg b/passes/pmgen/xilinx_dsp.pmg
index f982a10cfd30a71406a81e8141242c780f1c6b32..5dee36a11d62ec28da249a0d9b0352abd6016e84 100644 (file)
--- a/passes/pmgen/xilinx_dsp.pmg
+++ b/passes/pmgen/xilinx_dsp.pmg
@@ -112,8 +112,8 @@ endcode
 match ffP
        if param(dsp, \PREG).as_int() == 0
        if !sigPused.empty()
+       if nusers(sigPused) == 2
        select ffP->type.in($dff)
-       index <int> nusers(port(ffP, \D)) === 2
        // DSP48E1 does not support clock inversion
        select param(ffP, \CLK_POLARITY).as_bool()
        filter param(ffP, \WIDTH).as_int() >= GetSize(sigPused)