intel/compiler: Add NF some more places

Necessary to handle these cases when we test fuzzed instructions.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2635>

diff --git a/src/intel/compiler/brw_eu_validate.c b/src/intel/compiler/brw_eu_validate.c
index 5953c82bc70dc27e0a4552b095f0b3e4cd4be14a..efd7787c00d8e8c0360e6d8bb8d6e85f1e014596 100644 (file)
--- a/src/intel/compiler/brw_eu_validate.c
+++ b/src/intel/compiler/brw_eu_validate.c
@@ -475,6 +475,10 @@ execution_type(const struct gen_device_info *devinfo, const brw_inst *inst)
    if (src0_exec_type == src1_exec_type)
       return src0_exec_type;
 
+   if (src0_exec_type == BRW_REGISTER_TYPE_NF ||
+       src1_exec_type == BRW_REGISTER_TYPE_NF)
+      return BRW_REGISTER_TYPE_NF;
+
    /* Mixed operand types where one is float is float on Gen < 6
     * (and not allowed on later platforms)
     */

diff --git a/src/intel/compiler/brw_reg.h b/src/intel/compiler/brw_reg.h
index 4543d841c66030c45c2f0c9df4ca023c70c441a3..a85b10e09f9e3602bf412323abc8862905e25d36 100644 (file)
--- a/src/intel/compiler/brw_reg.h
+++ b/src/intel/compiler/brw_reg.h
@@ -318,6 +318,7 @@ type_sz(unsigned type)
    case BRW_REGISTER_TYPE_UQ:
    case BRW_REGISTER_TYPE_Q:
    case BRW_REGISTER_TYPE_DF:
+   case BRW_REGISTER_TYPE_NF:
       return 8;
    case BRW_REGISTER_TYPE_UD:
    case BRW_REGISTER_TYPE_D: