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freedreno/a5xx: fix random faults on first sysmem draw
author
Rob Clark
<robdclark@gmail.com>
Wed, 7 Dec 2016 20:21:56 +0000
(15:21 -0500)
committer
Rob Clark
<robdclark@gmail.com>
Sun, 18 Dec 2016 18:47:08 +0000
(13:47 -0500)
Not sure what this event is, but blob writes it.. and it seems to solve
random write faults at mystery address that would sometimes happen on
first BYPASS draw.
Signed-off-by: Rob Clark <robdclark@gmail.com>
src/gallium/drivers/freedreno/a5xx/fd5_gmem.c
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diff --git
a/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c
b/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c
index cf1cd76fea8f692752cc008f0d90464743366253..775d5b9cb224255f6a39f4aafd340845c34efd24 100644
(file)
--- a/
src/gallium/drivers/freedreno/a5xx/fd5_gmem.c
+++ b/
src/gallium/drivers/freedreno/a5xx/fd5_gmem.c
@@
-485,6
+485,9
@@
fd5_emit_sysmem_prep(struct fd_batch *batch)
OUT_PKT7(ring, CP_SKIP_IB2_ENABLE_GLOBAL, 1);
OUT_RING(ring, 0x0);
+ OUT_PKT7(ring, CP_EVENT_WRITE, 1);
+ OUT_RING(ring, UNK_19);
+
OUT_PKT4(ring, REG_A5XX_PC_POWER_CNTL, 1);
OUT_RING(ring, 0x00000003); /* PC_POWER_CNTL */