Move a couple of DPRINTFs from Cache to CachePort.

--HG--
extra : convert_revision : 55a0d26660aeb8f63b41897d53e6b2d1f0a163be

diff --git a/src/mem/cache/base_cache.hh b/src/mem/cache/base_cache.hh
index fcc040bd9d72c9addaa58ad2dad51213dbff6d8e..46414974b84aaaaea0acad8ebd2a2915d2738fe5 100644 (file)
--- a/src/mem/cache/base_cache.hh
+++ b/src/mem/cache/base_cache.hh
@@ -126,7 +126,7 @@ class BaseCache : public MemObject
 
         void requestBus(RequestCause cause, Tick time)
         {
-            DPRINTF(Cache, "Asserting bus request for cause %d\n", cause);
+            DPRINTF(CachePort, "Asserting bus request for cause %d\n", cause);
             if (!waitingOnRetry) {
                 schedSendEvent(time);
             }

diff --git a/src/mem/cache/cache_impl.hh b/src/mem/cache/cache_impl.hh
index 320e0be81ca5dc92bdc4c2ee1755a29b9a0d44b4..b159df84a25f1dfe7fbb8589a2ccce5de38df90b 100644 (file)
--- a/src/mem/cache/cache_impl.hh
+++ b/src/mem/cache/cache_impl.hh
@@ -1238,7 +1238,8 @@ Cache<TagStore>::MemSidePort::sendPacket()
             MSHR *mshr = dynamic_cast<MSHR*>(pkt->senderState);
 
             bool success = sendTiming(pkt);
-            DPRINTF(Cache, "Address %x was %s in sending the timing request\n",
+            DPRINTF(CachePort,
+                    "Address %x was %s in sending the timing request\n",
                     pkt->getAddr(), success ? "successful" : "unsuccessful");
 
             waitingOnRetry = !success;