arch-arm: Do not check MustBeOne flag for TLB requests from the prefetcher

Allow TLB requests generated from prefetchers to override the
MustBeOne arch flag. This allows the prefetchers to issue requests
without having to know architecutre-specific flags.

Change-Id: Id83e0c93f3d1a614da11c4f344ab4dc594423672
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18768
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>

diff --git a/src/arch/arm/tlb.cc b/src/arch/arm/tlb.cc
index 4b43a50a4436544d8d1373adf3ba2147a199abcf..f30e195c113a3c5a01a3286eddd283063fde3d2b 100644 (file)
--- a/src/arch/arm/tlb.cc
+++ b/src/arch/arm/tlb.cc
@@ -586,7 +586,7 @@ TLB::translateSe(const RequestPtr &req, ThreadContext *tc, Mode mode,
     bool is_write = (mode == Write);
 
     if (!is_fetch) {
-        assert(flags & MustBeOne);
+        assert(flags & MustBeOne || req->isPrefetch());
         if (sctlr.a || !(flags & AllowUnaligned)) {
             if (vaddr & mask(flags & AlignmentMask)) {
                 // LPAE is always disabled in SE mode
@@ -1038,7 +1038,7 @@ TLB::translateFs(const RequestPtr &req, ThreadContext *tc, Mode mode,
         req->setFlags(Request::STRICT_ORDER);
     }
     if (!is_fetch) {
-        assert(flags & MustBeOne);
+        assert(flags & MustBeOne || req->isPrefetch());
         if (sctlr.a || !(flags & AllowUnaligned)) {
             if (vaddr & mask(flags & AlignmentMask)) {
                 alignFaults++;