* i386.md (sqrt?f): Fix conditionals.

From-SVN: r48003

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index be8e7b46f14fde60284289dfa2bbc3a0a7d8b81d..f77017a3c589bdb8ec430b6a222faefc3d6cf9bb 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+Fri Dec 14 19:53:23 CET 2001  Jan Hubicka  <jh@suse.cz>
+
+       * i386.md (sqrt?f): Fix conditionals.
+
 Fri Dec 14 07:29:52 2001  Douglas B. Rupp  <rupp@gnat.com>
 
        * config.gcc (alpha64-dec-*vms*): New case.

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index edd3f039e5bbc5197f863d86178d8c39c249ebf3..eee94a724a9d4d257c13cde7b89c0b559bf3ce9d 100644 (file)
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -14446,9 +14446,9 @@
 (define_expand "sqrtsf2"
   [(set (match_operand:SF 0 "register_operand" "")
        (sqrt:SF (match_operand:SF 1 "nonimmediate_operand" "")))]
-  "(! TARGET_NO_FANCY_MATH_387 && TARGET_80387) || TARGET_SSE"
+  "(! TARGET_NO_FANCY_MATH_387 && TARGET_80387) || TARGET_SSE_MATH"
 {
-  if (!TARGET_SSE)
+  if (!TARGET_SSE_MATH)
     operands[1] = force_reg (SFmode, operands[1]);
 })
 
@@ -14456,7 +14456,7 @@
   [(set (match_operand:SF 0 "register_operand" "=f#x,x#f")
        (sqrt:SF (match_operand:SF 1 "nonimmediate_operand" "0#x,xm#f")))]
   "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
-   && (TARGET_SSE && TARGET_MIX_SSE_I387)"
+   && (TARGET_SSE_MATH && TARGET_MIX_SSE_I387)"
   "@
    fsqrt
    sqrtss\t{%1, %0|%0, %1}"
@@ -14467,7 +14467,7 @@
 (define_insn "sqrtsf2_1_sse_only"
   [(set (match_operand:SF 0 "register_operand" "=x")
        (sqrt:SF (match_operand:SF 1 "nonimmediate_operand" "xm")))]
-  "TARGET_SSE && (!TARGET_80387 || !TARGET_MIX_SSE_I387)"
+  "TARGET_SSE_MATH && (!TARGET_80387 || !TARGET_MIX_SSE_I387)"
   "sqrtss\t{%1, %0|%0, %1}"
   [(set_attr "type" "sse")
    (set_attr "mode" "SF")
@@ -14477,7 +14477,7 @@
   [(set (match_operand:SF 0 "register_operand" "=f")
        (sqrt:SF (match_operand:SF 1 "register_operand" "0")))]
   "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
-   && (!TARGET_SSE && !TARGET_MIX_SSE_I387)"
+   && !TARGET_SSE_MATH"
   "fsqrt"
   [(set_attr "type" "fpspc")
    (set_attr "mode" "SF")
@@ -14518,7 +14518,7 @@
   [(set (match_operand:DF 0 "register_operand" "=f")
        (sqrt:DF (match_operand:DF 1 "register_operand" "0")))]
   "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
-   && (!TARGET_SSE2 && TARGET_SSE_MATH && !TARGET_MIX_SSE_I387)"
+   && (!TARGET_SSE2 || !TARGET_SSE_MATH)"
   "fsqrt"
   [(set_attr "type" "fpspc")
    (set_attr "mode" "DF")