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diff --git a/openpower/sv/SimpleV_rationale.mdwn b/openpower/sv/SimpleV_rationale.mdwn
index b911a67a96bf3f797ecdb337ae3e0b3bf32f8daa..9e55f39a95b62456a78c0e16d26a937cf46454ad 100644 (file)
--- a/openpower/sv/SimpleV_rationale.mdwn
+++ b/openpower/sv/SimpleV_rationale.mdwn
@@ -205,3 +205,14 @@ foundation to take a leap forward in performance and performance/watt,
 
 # How do you turn a Scalar ISA into a Vector one?
 
+The most obvious question before that is: why would you want to?
+As explained in the "SIMD Considered Harmful" article, Cray-style
+Vector ISAs break the link between data element batches and the
+underylying architectural back-end parallel processing capability.
+Packed SIMD explicitly smashes that width right in the face of the
+programmer and expects them to like it.  As the article immediately
+demonstrates, an arbitrary-sized data set has to contend with
+power-of-two setup and teardown that can add literally an order
+of magnitude size in the number of hand-written lines of assembler
+compared to a well-designed Cray-style Vector ISA with a `setvl`
+instruction.