radeonsi: add a debug flag that disables printing the LLVM IR in shader dumps
authorMarek Olšák <marek.olsak@amd.com>
Sat, 25 Jul 2015 14:15:48 +0000 (16:15 +0200)
committerMarek Olšák <marek.olsak@amd.com>
Fri, 31 Jul 2015 14:49:17 +0000 (16:49 +0200)
This is for shader-db and should reduce size of shader dumps.

src/gallium/drivers/r600/r600_llvm.c
src/gallium/drivers/radeon/r600_pipe_common.c
src/gallium/drivers/radeon/r600_pipe_common.h
src/gallium/drivers/radeon/radeon_llvm_emit.c
src/gallium/drivers/radeon/radeon_llvm_emit.h
src/gallium/drivers/radeonsi/si_shader.c

index 9cd4357f5301743d72e0db8ad25933c13fe34715..faf538ccbb5bed92c88cfb5896b2d7ca91309144 100644 (file)
@@ -1028,7 +1028,7 @@ unsigned r600_llvm_compile(
        const char * gpu_family = r600_get_llvm_processor_name(family);
 
        memset(&binary, 0, sizeof(struct radeon_shader_binary));
-       r = radeon_llvm_compile(mod, &binary, gpu_family, dump, NULL);
+       r = radeon_llvm_compile(mod, &binary, gpu_family, dump, dump, NULL);
 
        r = r600_create_shader(bc, &binary, use_kill);
 
index fb834b01dcd0e09b373bd8a20745c3a9b8a608bf..c1dbdc740a070801fa0e00fb28ccc283e69bf107 100644 (file)
@@ -335,6 +335,7 @@ static const struct debug_named_value common_debug_options[] = {
        { "cs", DBG_CS, "Print compute shaders" },
        { "tcs", DBG_TCS, "Print tessellation control shaders" },
        { "tes", DBG_TES, "Print tessellation evaluation shaders" },
+       { "noir", DBG_NO_IR, "Don't print the LLVM IR"},
 
        /* features */
        { "nodma", DBG_NO_ASYNC_DMA, "Disable asynchronous DMA" },
index ea165fd0f6017284ef10333dee3eb598f030a97b..c2b83859b52b130e1532f612d10efc674597d6fe 100644 (file)
 #define DBG_CS                 (1 << 9)
 #define DBG_TCS                        (1 << 10)
 #define DBG_TES                        (1 << 11)
+#define DBG_NO_IR              (1 << 12)
+/* Bits 21-31 are reserved for the r600g driver. */
 /* features */
-#define DBG_NO_ASYNC_DMA       (1 << 12)
-#define DBG_NO_HYPERZ          (1 << 13)
-#define DBG_NO_DISCARD_RANGE   (1 << 14)
-#define DBG_NO_2D_TILING       (1 << 15)
-#define DBG_NO_TILING          (1 << 16)
-#define DBG_SWITCH_ON_EOP      (1 << 17)
-#define DBG_FORCE_DMA          (1 << 18)
-#define DBG_PRECOMPILE         (1 << 19)
-#define DBG_INFO               (1 << 20)
-/* The maximum allowed bit is 20. */
+#define DBG_NO_ASYNC_DMA       (1llu << 32)
+#define DBG_NO_HYPERZ          (1llu << 33)
+#define DBG_NO_DISCARD_RANGE   (1llu << 34)
+#define DBG_NO_2D_TILING       (1llu << 35)
+#define DBG_NO_TILING          (1llu << 36)
+#define DBG_SWITCH_ON_EOP      (1llu << 37)
+#define DBG_FORCE_DMA          (1llu << 38)
+#define DBG_PRECOMPILE         (1llu << 39)
+#define DBG_INFO               (1llu << 40)
 
 #define R600_MAP_BUFFER_ALIGNMENT 64
 
@@ -272,7 +273,7 @@ struct r600_common_screen {
        enum chip_class                 chip_class;
        struct radeon_info              info;
        struct r600_tiling_info         tiling_info;
-       unsigned                        debug_flags;
+       uint64_t                        debug_flags;
        bool                            has_cp_dma;
        bool                            has_streamout;
 
index 04f62d13ca78d2bb43bd1493690fa0a225baee9b..f0112c784d43247fd2ed65c118504db94be31c57 100644 (file)
@@ -148,7 +148,8 @@ static void radeonDiagnosticHandler(LLVMDiagnosticInfoRef di, void *context)
  * @returns 0 for success, 1 for failure
  */
 unsigned radeon_llvm_compile(LLVMModuleRef M, struct radeon_shader_binary *binary,
-                         const char *gpu_family, unsigned dump, LLVMTargetMachineRef tm)
+                            const char *gpu_family, bool dump_ir, bool dump_asm,
+                            LLVMTargetMachineRef tm)
 {
 
        char cpu[CPU_STRING_LEN];
@@ -171,17 +172,15 @@ unsigned radeon_llvm_compile(LLVMModuleRef M, struct radeon_shader_binary *binar
                }
                strncpy(cpu, gpu_family, CPU_STRING_LEN);
                memset(fs, 0, sizeof(fs));
-               if (dump) {
+               if (dump_asm)
                        strncpy(fs, "+DumpCode", FS_STRING_LEN);
-               }
                tm = LLVMCreateTargetMachine(target, triple, cpu, fs,
                                  LLVMCodeGenLevelDefault, LLVMRelocDefault,
                                                  LLVMCodeModelDefault);
                dispose_tm = true;
        }
-       if (dump) {
+       if (dump_ir)
                LLVMDumpModule(M);
-       }
        /* Setup Diagnostic Handler*/
        llvm_ctx = LLVMGetModuleContext(M);
 
index 3ccef78e36d464f3ece2ea5b93ec2ff7d871aaba..e20aed94c6b842c9b1ea7f019bf99beefd64b91e 100644 (file)
@@ -29,6 +29,7 @@
 
 #include <llvm-c/Core.h>
 #include <llvm-c/TargetMachine.h>
+#include <stdbool.h>
 
 struct radeon_shader_binary;
 
@@ -36,11 +37,8 @@ void radeon_llvm_shader_type(LLVMValueRef F, unsigned type);
 
 LLVMTargetRef radeon_llvm_get_r600_target(const char *triple);
 
-unsigned  radeon_llvm_compile(
-       LLVMModuleRef M,
-       struct radeon_shader_binary *binary,
-       const char * gpu_family,
-       unsigned dump,
-       LLVMTargetMachineRef tm);
+unsigned radeon_llvm_compile(LLVMModuleRef M, struct radeon_shader_binary *binary,
+                            const char *gpu_family, bool dump_ir, bool dump_asm,
+                            LLVMTargetMachineRef tm);
 
 #endif /* RADEON_LLVM_EMIT_H */
index 465eecd0346aed995451ee1b5e562c01280d325e..61bf1b801eedebb661ef5ea99ae3eb1c03a35167 100644 (file)
@@ -3836,14 +3836,15 @@ int si_compile_llvm(struct si_screen *sscreen, struct si_shader *shader,
                    LLVMTargetMachineRef tm, LLVMModuleRef mod)
 {
        int r = 0;
-       bool dump = r600_can_dump_shader(&sscreen->b,
-                       shader->selector ? shader->selector->tokens : NULL);
-       r = radeon_llvm_compile(mod, &shader->binary,
-               r600_get_llvm_processor_name(sscreen->b.family), dump, tm);
+       bool dump_asm = r600_can_dump_shader(&sscreen->b,
+                               shader->selector ? shader->selector->tokens : NULL);
+       bool dump_ir = dump_asm && !(sscreen->b.debug_flags & DBG_NO_IR);
 
-       if (r) {
+       r = radeon_llvm_compile(mod, &shader->binary,
+               r600_get_llvm_processor_name(sscreen->b.family), dump_ir, dump_asm, tm);
+       if (r)
                return r;
-       }
+
        r = si_shader_binary_read(sscreen, shader);
 
        FREE(shader->binary.config);