inorder: write-hints bug fix

make sure to only read 1 src reg. for write-hint and any other similar
'store' instruction. Reading the source reg when its not necessary
can cause the simulator to read from uninitialized values

diff --git a/src/cpu/inorder/pipeline_traits.cc b/src/cpu/inorder/pipeline_traits.cc
index 8ff26dce2ee0454a52ff668a195fd6a8b044cd43..3971701638a7d3d14f719c56bec0c6ab5a58a5e8 100644 (file)
--- a/src/cpu/inorder/pipeline_traits.cc
+++ b/src/cpu/inorder/pipeline_traits.cc
@@ -116,7 +116,9 @@ bool createBackEndSchedule(DynInstPtr &inst)
     if ( inst->isLoad() ) {
         M->needs(DCache, CacheUnit::InitiateReadData);
     } else if ( inst->isStore() ) {
-        M->needs(RegManager, UseDefUnit::ReadSrcReg, 1);
+        if ( inst->numSrcRegs() >= 2 ) {            
+            M->needs(RegManager, UseDefUnit::ReadSrcReg, 1);
+        }        
         M->needs(AGEN, AGENUnit::GenerateAddr);
         M->needs(DCache, CacheUnit::InitiateWriteData);
     }