Copy with 1'bx padding in $shiftx

diff --git a/passes/techmap/shregmap.cc b/passes/techmap/shregmap.cc
index a541b33bef692bf9b277eda3437526519c91cbd5..75eedfbcc2204b2b73460064c9535ade187c8d28 100644 (file)
--- a/passes/techmap/shregmap.cc
+++ b/passes/techmap/shregmap.cc
@@ -178,7 +178,17 @@ struct ShregmapTechXilinx7 : ShregmapTech
 
                // Only map if $shiftx exclusively covers the shift register
                if (shiftx->type == "$shiftx") {
-                       if (GetSize(taps) != shiftx->getParam("\\A_WIDTH").as_int())
+                       if (GetSize(taps) > shiftx->getParam("\\A_WIDTH").as_int())
+                               return false;
+                       // Due to padding the most significant bits of A may be 1'bx,
+                       //   and if so, discount them
+                       if (GetSize(taps) < shiftx->getParam("\\A_WIDTH").as_int()) {
+                               const SigSpec A = shiftx->getPort("\\A");
+                               const int A_width = shiftx->getParam("\\A_WIDTH").as_int();
+                               for (int i = GetSize(taps); i < A_width; ++i)
+                                       if (A[i] != RTLIL::Sx) return false;
+                       }
+                       else if (GetSize(taps) != shiftx->getParam("\\A_WIDTH").as_int())
                                return false;
                }
                else if (shiftx->type == "$mux") {