Fix disassembly of the V850's LD.BU instruction.

	PR target/19937
opcode	* v850-opc.c (v850_opcodes): Correct masks for long versions of
	the LD.B and LD.BU instructions.

gas	* testsuite/gas/v850/pr19937.s: New test.
	* testsuite/gas/v850/pr19937.d: New test control file.
	* testsuite/gas/v850/basic.exp: Run the new test.

diff --git a/gas/testsuite/gas/v850/basic.exp b/gas/testsuite/gas/v850/basic.exp
index aa733032131ad6c5e9aeaa6416e16e13ee6b3f61..ff0f6030b356e656f2eb1acbc8604f5d1da447ba 100644 (file)
--- a/gas/testsuite/gas/v850/basic.exp
+++ b/gas/testsuite/gas/v850/basic.exp
@@ -437,4 +437,5 @@ if [istarget v850*-*-*] then {
     gas_test_error "range.s" "-mwarn-signed-overflow" "Check for range error on byte load/store"
     run_dump_test "v850e1"
     run_dump_test "split-lo16"
+    run_dump_test "pr19937"
 }

diff --git a/gas/testsuite/gas/v850/pr19937.d b/gas/testsuite/gas/v850/pr19937.d
new file mode 100644 (file)
index 0000000..ccc93fd
--- /dev/null
+++ b/gas/testsuite/gas/v850/pr19937.d
@@ -0,0 +1,15 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: Disassembly of LD.BU 0x4[rN], rM
+#as: -mv850e3v5
+
+.*: +file format .*v850.*
+
+Disassembly of section .text:
+0+000 <.*> 8a a7 01 00[        ]+ld.bu[        ]+0\[r10\], r20
+0+004 <.*> 8a a7 05 00[        ]+ld.bu[        ]+4\[r10\], r20
+0+008 <.*> 8a a7 09 00[        ]+ld.bu[        ]+8\[r10\], r20
+0+00c <.*> 0a a7 00 00[        ]+ld.b[         ]+0\[r10\], r20
+0+010 <.*> 0a a7 04 00[        ]+ld.b[         ]+4\[r10\], r20
+0+014 <.*> 0a a7 08 00[        ]+ld.b[         ]+8\[r10\], r20
+#pass
+

diff --git a/gas/testsuite/gas/v850/pr19937.s b/gas/testsuite/gas/v850/pr19937.s
new file mode 100644 (file)
index 0000000..f3a0405
--- /dev/null
+++ b/gas/testsuite/gas/v850/pr19937.s
@@ -0,0 +1,17 @@
+.text
+.globl  _start
+_start:
+    # ld.bu FMT14
+    ld.bu 0x0[r10], r20
+    ld.bu 0x4[r10], r20
+    ld.bu 0x8[r10], r20
+
+    ld.b  0x0[r10], r20
+    ld.b  0x4[r10], r20
+    ld.b  0x8[r10], r20
+
+exit:
+    mov r0, r1
+
+.data
+data:

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 04b497612c65d5711cfebf54e5b05768431efef0..a426055461e69f74876ab53350422aa2f139805c 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,9 @@
+2016-04-13  Nick Clifton  <nickc@redhat.com>
+
+       PR target/19937
+       * v850-opc.c (v850_opcodes): Correct masks for long versions of
+       the LD.B and LD.BU instructions.
+
 2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
 
        * arc-dis.c (find_format): Check for extension flags.

diff --git a/opcodes/v850-opc.c b/opcodes/v850-opc.c
index 473a9ef51add08469fa3fbf77656d99b65d4d411..d5e54a5d9b11a2da304c1859c1184e03856fb394 100644 (file)
--- a/opcodes/v850-opc.c
+++ b/opcodes/v850-opc.c
@@ -1578,11 +1578,11 @@ const struct v850_opcode v850_opcodes[] =
 { "ldacc",     two (0x07e0, 0x0bc4),   two (0x07e0, 0xffff),   {R1, R2},               0, PROCESSOR_V850E2_UP | PROCESSOR_OPTION_EXTENSION },
 
 { "ld.b",      two (0x0700, 0x0000),   two (0x07e0, 0x0000),   {D16, R1, R2},          2, PROCESSOR_ALL },
-{ "ld.b",      two (0x0780, 0x0005),   two (0x07e0, 0x000f),   {D23, R1, R3},          2, PROCESSOR_V850E2_UP },
+{ "ld.b",      two (0x0780, 0x0005),   two (0xffe0, 0x000f),   {D23, R1, R3},          2, PROCESSOR_V850E2_UP },
 { "ld.b23",    two (0x0780, 0x0005),   two (0x07e0, 0x000f),   {D23, R1, R3},          2, PROCESSOR_V850E2_UP | PROCESSOR_OPTION_ALIAS },
 
 { "ld.bu",     two (0x0780, 0x0001),   two (0x07c0, 0x0001),   {D16_16, R1, R2_NOTR0}, 2, PROCESSOR_NOT_V850 },
-{ "ld.bu",     two (0x07a0, 0x0005),   two (0x07e0, 0x000f),   {D23, R1, R3},          2, PROCESSOR_V850E2_UP },
+{ "ld.bu",     two (0x07a0, 0x0005),   two (0xffe0, 0x000f),   {D23, R1, R3},          2, PROCESSOR_V850E2_UP },
 { "ld.bu23",   two (0x07a0, 0x0005),   two (0x07e0, 0x000f),   {D23, R1, R3},          2, PROCESSOR_V850E2_UP | PROCESSOR_OPTION_ALIAS },
 
 { "ld.dw",     two (0x07a0, 0x0009),   two (0xffe0, 0x001f), {D23_ALIGN1, R1, R3_EVEN}, 2, PROCESSOR_V850E3V5_UP },