add note about bug #884 new reg vector naming convention

diff --git a/src/openpower/sv/trans/svp64.py b/src/openpower/sv/trans/svp64.py
index c7b01721967362941371ec73d4dae2e61821bdaa..9efcf1c93c6ad12419d39bdb9fcd40088e89bc6e 100644 (file)
--- a/src/openpower/sv/trans/svp64.py
+++ b/src/openpower/sv/trans/svp64.py
@@ -468,6 +468,8 @@ def decode_ffirst(encoding):
 
 def decode_reg(field):
     # decode the field number. "5.v" or "3.s" or "9"
+    # and now also "*0", and "*%0".  note: *NOT* to add "*%rNNN" etc.
+    # https://bugs.libre-soc.org/show_bug.cgi?id=884#c0
     field = field.split(".")
     regmode = 'scalar'  # default
     if len(field) == 2: