This breaks one more architecture dependence outside of the ISAs.
Change-Id: I071f9ed73aef78e1cd1752247c183e30854b2d28
Reviewed-on: https://gem5-review.googlesource.com/6982
Maintainer: Gabe Black <gabeblack@google.com>
Reviewed-by: Alexandru Duțu <alexandru.dutu@amd.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Brandon Potter <Brandon.Potter@amd.com>
using namespace std;
AlphaProcess::AlphaProcess(ProcessParams *params, ObjectFile *objFile)
- : Process(params, new FuncPageTable(params->name, params->pid), objFile)
+ : Process(params, new FuncPageTable(params->name, params->pid, PageBytes),
+ objFile)
{
fatal_if(!params->useArchPT, "Arch page tables not implemented.");
Addr brk_point = objFile->dataBase() + objFile->dataSize() +
ArmProcess::ArmProcess(ProcessParams *params, ObjectFile *objFile,
ObjectFile::Arch _arch)
- : Process(params, new FuncPageTable(params->name, params->pid), objFile),
+ : Process(params, new FuncPageTable(params->name, params->pid, PageBytes),
+ objFile),
arch(_arch)
{
fatal_if(!params->useArchPT, "Arch page tables not implemented.");
using namespace MipsISA;
MipsProcess::MipsProcess(ProcessParams *params, ObjectFile *objFile)
- : Process(params, new FuncPageTable(params->name, params->pid), objFile)
+ : Process(params, new FuncPageTable(params->name, params->pid, PageBytes),
+ objFile)
{
fatal_if(!params->useArchPT, "Arch page tables not implemented.");
// Set up stack. On MIPS, stack starts at the top of kuseg
using namespace PowerISA;
PowerProcess::PowerProcess(ProcessParams *params, ObjectFile *objFile)
- : Process(params, new FuncPageTable(params->name, params->pid), objFile)
+ : Process(params, new FuncPageTable(params->name, params->pid, PageBytes),
+ objFile)
{
fatal_if(!params->useArchPT, "Arch page tables not implemented.");
// Set up break point (Top of Heap)
using namespace RiscvISA;
RiscvProcess::RiscvProcess(ProcessParams *params, ObjectFile *objFile) :
- Process(params, new FuncPageTable(params->name, params->pid), objFile)
+ Process(params, new FuncPageTable(params->name, params->pid,
+ PageBytes),
+ objFile)
{
fatal_if(!params->useArchPT, "Arch page tables not implemented.");
const Addr stack_base = 0x7FFFFFFFFFFFFFFFL;
SparcProcess::SparcProcess(ProcessParams *params, ObjectFile *objFile,
Addr _StackBias)
- : Process(params, new FuncPageTable(params->name, params->pid), objFile),
- StackBias(_StackBias)
+ : Process(params, new FuncPageTable(params->name, params->pid, PageBytes),
+ objFile),
+ StackBias(_StackBias)
{
fatal_if(!params->useArchPT, "Arch page tables not implemented.");
// Initialize these to 0s
: Process(params, params->useArchPT ?
static_cast<PageTableBase *>(
new ArchPageTable(params->name, params->pid,
- params->system)) :
+ params->system, PageBytes)) :
static_cast<PageTableBase *>(
- new FuncPageTable(params->name, params->pid)),
+ new FuncPageTable(params->name, params->pid,
+ PageBytes)),
objFile),
syscallDescs(_syscallDescs), numSyscallDescs(_numSyscallDescs)
{
public:
MultiLevelPageTable(const std::string &__name, uint64_t _pid,
- System *_sys);
+ System *_sys, Addr pageSize);
~MultiLevelPageTable();
void initState(ThreadContext* tc) override;
template <class ISAOps>
MultiLevelPageTable<ISAOps>::MultiLevelPageTable(const std::string &__name,
- uint64_t _pid, System *_sys)
- : PageTableBase(__name, _pid), system(_sys),
+ uint64_t _pid, System *_sys,
+ Addr pageSize)
+ : PageTableBase(__name, _pid, pageSize), system(_sys),
logLevelSize(PageTableLayout),
numLevels(logLevelSize.size())
{
public:
- PageTableBase(const std::string &__name, uint64_t _pid,
- Addr _pageSize = TheISA::PageBytes)
+ PageTableBase(const std::string &__name, uint64_t _pid, Addr _pageSize)
: pageSize(_pageSize), offsetMask(mask(floorLog2(_pageSize))),
pid(_pid), _name(__name)
{
public:
- FuncPageTable(const std::string &__name, uint64_t _pid,
- Addr _pageSize = TheISA::PageBytes);
+ FuncPageTable(const std::string &__name, uint64_t _pid, Addr _pageSize);
~FuncPageTable();