i386.md (*addqi_2): Do not assert operands[2] == 255 for TYPE_INCDEC operands.

	* config/i386/i386.md (*addqi_2): Do not assert operands[2] == 255
	for TYPE_INCDEC operands.
	(*addqi_3): Ditto.
	(*addqi_4): Ditto.
	(*addqi_5): Ditto.
	(*addqi_ext_1_rex64): Ditto.
	(*addqi_ext_1): Ditto.

	(*addqi_4): Check for incdec_operand in QImode.

	(*add<mode>_2): Macroize insn from *add<mode>_2 and *add{qi,hi}_2
	using SWI mode iterator.
	(*add<mode>_3): Ditto from *add<mode>_3 and *add{qi,hi}_3.
	(*add<mode>_4): Macroize insn from *add{qi,hi,si}_4 using SWI124
	mode iterator.
	(*add<mode>_5): Macroize insn from *add<mode>_5 and *add{qi,hi}_5
	using SWI mode iterator.

From-SVN: r160277

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 72d52cec7e82c118824321b9c73c673702489fb0..836de436c7f9688598f470a3ffd48eef9e14b9f9 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,23 @@
+2010-06-04  Uros Bizjak  <ubizjak@gmail.com>
+
+       * config/i386/i386.md (*addqi_2): Do not assert operands[2] == 255
+       for TYPE_INCDEC operands.
+       (*addqi_3): Ditto.
+       (*addqi_4): Ditto.
+       (*addqi_5): Ditto.
+       (*addqi_ext_1_rex64): Ditto.
+       (*addqi_ext_1): Ditto.
+
+       (*addqi_4): Check for incdec_operand in QImode.
+
+       (*add<mode>_2): Macroize insn from *add<mode>_2 and *add{qi,hi}_2
+       using SWI mode iterator.
+       (*add<mode>_3): Ditto from *add<mode>_3 and *add{qi,hi}_3.
+       (*add<mode>_4): Macroize insn from *add{qi,hi,si}_4 using SWI124
+       mode iterator.
+       (*add<mode>_5): Macroize insn from *add<mode>_5 and *add{qi,hi}_5
+       using SWI mode iterator.
+
 2010-06-04  Manuel López-Ibáñez  <manu@gcc.gnu.org>
 
        PR c/25880
@@ -15,8 +35,7 @@
 
 2010-06-04  Kai Tietz  <kai.tietz@onevision.com>
 
-       * config/i386/cygming.h (ASM_GENERATE_INTERNAL_LABEL): Prefix
-       by '*'.
+       * config/i386/cygming.h (ASM_GENERATE_INTERNAL_LABEL): Prefix by '*'.
 
 2010-06-04  Jan Hubicka  <jh@suse.cz>
 
@@ -55,12 +74,13 @@
        df_md_bb_local_compute_process_def, df_md_local_compute, df_md_reset,
        df_md_transfer_function, df_md_init, df_md_confluence_0,
        df_md_confluence_n,
-       df_md_top_dump, df_md_bottom_dump): Update.  (struct df_lr_problem_data):
-       Embedd bitmap headers.
+       df_md_top_dump, df_md_bottom_dump): Update.
+       (struct df_lr_problem_data): Embedd bitmap headers.
 
 2010-06-04  Jan Hubicka  <jh@suse.cz>
 
-       * dce.c (dce_process_block): Do not re-scan already marked instructions.
+       * dce.c (dce_process_block): Do not re-scan already marked
+       instructions.
 
 2010-06-04  Bernd Schmidt  <bernds@codesourcery.com>
 
@@ -81,8 +101,7 @@
        (ira_adjust_equiv_reg_cost): New function.
        * ira.h (ira_adjust_equiv_reg_cost): Declare it.
        * reload1.c (init_eliminable_invariants, free_reg_equiv,
-       elimination_costs_in_insn, note_reg_elim_costly): New static
-       functions.
+       elimination_costs_in_insn, note_reg_elim_costly): New static functions.
        (elim_bb): New static variable.
        (reload): Move code out of here into init_eliminable_invariants and
        free_reg_equiv.  Call them.

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 6ed8db655946757249c553b80a70070375d84cbe..468c2391f24c42619d32fd4dcc50366512ad7139 100644 (file)
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -6395,12 +6395,12 @@
 (define_insn "*add<mode>_2"
   [(set (reg FLAGS_REG)
        (compare
-         (plus:SWI48
-           (match_operand:SWI48 1 "nonimmediate_operand" "%0,0")
-           (match_operand:SWI48 2 "<general_operand>" "<g>,r<i>"))
+         (plus:SWI
+           (match_operand:SWI 1 "nonimmediate_operand" "%0,0")
+           (match_operand:SWI 2 "<general_operand>" "<g>,<r><i>"))
          (const_int 0)))
-   (set (match_operand:SWI48 0 "nonimmediate_operand" "=r,rm")
-       (plus:SWI48 (match_dup 1) (match_dup 2)))]
+   (set (match_operand:SWI 0 "nonimmediate_operand" "=<r>,<r>m")
+       (plus:SWI (match_dup 1) (match_dup 2)))]
   "ix86_match_ccmode (insn, CCGOCmode)
    && ix86_binary_operator_ok (PLUS, <MODE>mode, operands)"
 {
@@ -6427,7 +6427,7 @@
     }
 }
   [(set (attr "type")
-     (if_then_else (match_operand:SWI48 2 "incdec_operand" "")
+     (if_then_else (match_operand:SWI 2 "incdec_operand" "")
        (const_string "incdec")
        (const_string "alu")))
    (set (attr "length_immediate")
@@ -6478,89 +6478,12 @@
        (const_string "*")))
    (set_attr "mode" "SI")])
 
-(define_insn "*addhi_2"
-  [(set (reg FLAGS_REG)
-       (compare
-         (plus:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0")
-                  (match_operand:HI 2 "general_operand" "rmn,rn"))
-         (const_int 0)))
-   (set (match_operand:HI 0 "nonimmediate_operand" "=r,rm")
-       (plus:HI (match_dup 1) (match_dup 2)))]
-  "ix86_match_ccmode (insn, CCGOCmode)
-   && ix86_binary_operator_ok (PLUS, HImode, operands)"
-{
-  switch (get_attr_type (insn))
-    {
-    case TYPE_INCDEC:
-      if (operands[2] == const1_rtx)
-       return "inc{w}\t%0";
-      else
-        {
-         gcc_assert (operands[2] == constm1_rtx);
-         return "dec{w}\t%0";
-       }
-
-    default:
-      if (x86_maybe_negate_const_int (&operands[2], HImode))
-       return "sub{w}\t{%2, %0|%0, %2}";
-
-      return "add{w}\t{%2, %0|%0, %2}";
-    }
-}
-  [(set (attr "type")
-     (if_then_else (match_operand:HI 2 "incdec_operand" "")
-       (const_string "incdec")
-       (const_string "alu")))
-   (set (attr "length_immediate")
-      (if_then_else
-       (and (eq_attr "type" "alu") (match_operand 2 "const128_operand" ""))
-       (const_string "1")
-       (const_string "*")))
-   (set_attr "mode" "HI")])
-
-(define_insn "*addqi_2"
-  [(set (reg FLAGS_REG)
-       (compare
-         (plus:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0")
-                  (match_operand:QI 2 "general_operand" "qmn,qn"))
-         (const_int 0)))
-   (set (match_operand:QI 0 "nonimmediate_operand" "=q,qm")
-       (plus:QI (match_dup 1) (match_dup 2)))]
-  "ix86_match_ccmode (insn, CCGOCmode)
-   && ix86_binary_operator_ok (PLUS, QImode, operands)"
-{
-  switch (get_attr_type (insn))
-    {
-    case TYPE_INCDEC:
-      if (operands[2] == const1_rtx)
-       return "inc{b}\t%0";
-      else
-        {
-         gcc_assert (operands[2] == constm1_rtx
-                     || (CONST_INT_P (operands[2])
-                         && INTVAL (operands[2]) == 255));
-         return "dec{b}\t%0";
-       }
-
-    default:
-      if (x86_maybe_negate_const_int (&operands[2], QImode))
-       return "sub{b}\t{%2, %0|%0, %2}";
-
-      return "add{b}\t{%2, %0|%0, %2}";
-    }
-}
-  [(set (attr "type")
-     (if_then_else (match_operand:QI 2 "incdec_operand" "")
-       (const_string "incdec")
-       (const_string "alu")))
-   (set_attr "mode" "QI")])
-
 (define_insn "*add<mode>_3"
   [(set (reg FLAGS_REG)
        (compare
-         (neg:SWI48 (match_operand:SWI48 2 "<general_operand>" "<g>"))
-         (match_operand:SWI48 1 "nonimmediate_operand" "%0")))
-   (clobber (match_scratch:SWI48 0 "=r"))]
+         (neg:SWI (match_operand:SWI 2 "<general_operand>" "<g>"))
+         (match_operand:SWI 1 "nonimmediate_operand" "%0")))
+   (clobber (match_scratch:SWI 0 "=<r>"))]
   "ix86_match_ccmode (insn, CCZmode)
    && !(MEM_P (operands[1]) && MEM_P (operands[2]))"
 {
@@ -6587,7 +6510,7 @@
     }
 }
   [(set (attr "type")
-     (if_then_else (match_operand:SWI48 2 "incdec_operand" "")
+     (if_then_else (match_operand:SWI 2 "incdec_operand" "")
        (const_string "incdec")
        (const_string "alu")))
    (set (attr "length_immediate")
@@ -6637,79 +6560,6 @@
        (const_string "*")))
    (set_attr "mode" "SI")])
 
-(define_insn "*addhi_3"
-  [(set (reg FLAGS_REG)
-       (compare
-         (neg:HI (match_operand:HI 2 "general_operand" "rmn"))
-         (match_operand:HI 1 "nonimmediate_operand" "%0")))
-   (clobber (match_scratch:HI 0 "=r"))]
-  "ix86_match_ccmode (insn, CCZmode)
-   && !(MEM_P (operands[1]) && MEM_P (operands[2]))"
-{
-  switch (get_attr_type (insn))
-    {
-    case TYPE_INCDEC:
-      if (operands[2] == const1_rtx)
-       return "inc{w}\t%0";
-      else
-        {
-         gcc_assert (operands[2] == constm1_rtx);
-         return "dec{w}\t%0";
-       }
-
-    default:
-      if (x86_maybe_negate_const_int (&operands[2], HImode))
-       return "sub{w}\t{%2, %0|%0, %2}";
-
-      return "add{w}\t{%2, %0|%0, %2}";
-    }
-}
-  [(set (attr "type")
-     (if_then_else (match_operand:HI 2 "incdec_operand" "")
-       (const_string "incdec")
-       (const_string "alu")))
-   (set (attr "length_immediate")
-      (if_then_else
-       (and (eq_attr "type" "alu") (match_operand 2 "const128_operand" ""))
-       (const_string "1")
-       (const_string "*")))
-   (set_attr "mode" "HI")])
-
-(define_insn "*addqi_3"
-  [(set (reg FLAGS_REG)
-       (compare
-         (neg:QI (match_operand:QI 2 "general_operand" "qmn"))
-         (match_operand:QI 1 "nonimmediate_operand" "%0")))
-   (clobber (match_scratch:QI 0 "=q"))]
-  "ix86_match_ccmode (insn, CCZmode)
-   && !(MEM_P (operands[1]) && MEM_P (operands[2]))"
-{
-  switch (get_attr_type (insn))
-    {
-    case TYPE_INCDEC:
-      if (operands[2] == const1_rtx)
-       return "inc{b}\t%0";
-      else
-        {
-         gcc_assert (operands[2] == constm1_rtx
-                     || (CONST_INT_P (operands[2])
-                         && INTVAL (operands[2]) == 255));
-         return "dec{b}\t%0";
-       }
-
-    default:
-      if (x86_maybe_negate_const_int (&operands[2], QImode))
-       return "sub{b}\t{%2, %0|%0, %2}";
-
-      return "add{b}\t{%2, %0|%0, %2}";
-    }
-}
-  [(set (attr "type")
-     (if_then_else (match_operand:QI 2 "incdec_operand" "")
-       (const_string "incdec")
-       (const_string "alu")))
-   (set_attr "mode" "QI")])
-
 ; For comparisons against 1, -1 and 128, we may generate better code
 ; by converting cmp to add, inc or dec as done by peephole2.  This pattern
 ; is matched then.  We can't accept general immediate, because for
@@ -6763,75 +6613,35 @@
 ; Also carry flag is reversed compared to cmp, so this conversion is valid
 ; only for comparisons not depending on it.
 
-(define_insn "*addsi_4"
+(define_insn "*add<mode>_4"
   [(set (reg FLAGS_REG)
        (compare
-         (match_operand:SI 1 "nonimmediate_operand" "0")
-         (match_operand:SI 2 "const_int_operand" "n")))
-   (clobber (match_scratch:SI 0 "=rm"))]
+         (match_operand:SWI124 1 "nonimmediate_operand" "0")
+         (match_operand:SWI124 2 "const_int_operand" "n")))
+   (clobber (match_scratch:SWI124 0 "=<r>m"))]
   "ix86_match_ccmode (insn, CCGCmode)"
 {
   switch (get_attr_type (insn))
     {
     case TYPE_INCDEC:
       if (operands[2] == constm1_rtx)
-        return "inc{l}\t%0";
+        return "inc{<imodesuffix>}\t%0";
       else
         {
          gcc_assert (operands[2] == const1_rtx);
-          return "dec{l}\t%0";
-       }
-
-    default:
-      gcc_assert (rtx_equal_p (operands[0], operands[1]));
-      if (x86_maybe_negate_const_int (&operands[2], SImode))
-       return "add{l}\t{%2, %0|%0, %2}";
-
-      return "sub{l}\t{%2, %0|%0, %2}";
-    }
-}
-  [(set (attr "type")
-     (if_then_else (match_operand:SI 2 "incdec_operand" "")
-       (const_string "incdec")
-       (const_string "alu")))
-   (set (attr "length_immediate")
-      (if_then_else
-       (and (eq_attr "type" "alu") (match_operand 2 "const128_operand" ""))
-       (const_string "1")
-       (const_string "*")))
-   (set_attr "mode" "SI")])
-
-; See comments above addsi_4 for details.
-
-(define_insn "*addhi_4"
-  [(set (reg FLAGS_REG)
-       (compare
-         (match_operand:HI 1 "nonimmediate_operand" "0")
-         (match_operand:HI 2 "const_int_operand" "n")))
-   (clobber (match_scratch:HI 0 "=rm"))]
-  "ix86_match_ccmode (insn, CCGCmode)"
-{
-  switch (get_attr_type (insn))
-    {
-    case TYPE_INCDEC:
-      if (operands[2] == constm1_rtx)
-        return "inc{w}\t%0";
-      else
-       {
-         gcc_assert (operands[2] == const1_rtx);
-          return "dec{w}\t%0";
+          return "dec{<imodesuffix>}\t%0";
        }
 
     default:
       gcc_assert (rtx_equal_p (operands[0], operands[1]));
-      if (x86_maybe_negate_const_int (&operands[2], HImode))
-       return "add{w}\t{%2, %0|%0, %2}";
+      if (x86_maybe_negate_const_int (&operands[2], <MODE>mode))
+       return "add{<imodesuffix>}\t{%2, %0|%0, %2}";
 
-      return "sub{w}\t{%2, %0|%0, %2}";
+      return "sub{<imodesuffix>}\t{%2, %0|%0, %2}";
     }
 }
   [(set (attr "type")
-     (if_then_else (match_operand:HI 2 "incdec_operand" "")
+     (if_then_else (match_operand:<MODE> 2 "incdec_operand" "")
        (const_string "incdec")
        (const_string "alu")))
    (set (attr "length_immediate")
@@ -6839,53 +6649,16 @@
        (and (eq_attr "type" "alu") (match_operand 2 "const128_operand" ""))
        (const_string "1")
        (const_string "*")))
-   (set_attr "mode" "HI")])
-
-; See comments above addsi_4 for details.
-
-(define_insn "*addqi_4"
-  [(set (reg FLAGS_REG)
-       (compare
-         (match_operand:QI 1 "nonimmediate_operand" "0")
-         (match_operand:QI 2 "const_int_operand" "n")))
-   (clobber (match_scratch:QI 0 "=qm"))]
-  "ix86_match_ccmode (insn, CCGCmode)"
-{
-  switch (get_attr_type (insn))
-    {
-    case TYPE_INCDEC:
-      if (operands[2] == constm1_rtx
-         || (CONST_INT_P (operands[2])
-             && INTVAL (operands[2]) == 255))
-        return "inc{b}\t%0";
-      else
-       {
-         gcc_assert (operands[2] == const1_rtx);
-          return "dec{b}\t%0";
-       }
-
-    default:
-      gcc_assert (rtx_equal_p (operands[0], operands[1]));
-      if (x86_maybe_negate_const_int (&operands[2], QImode))
-       return "add{b}\t{%2, %0|%0, %2}";
-
-      return "sub{b}\t{%2, %0|%0, %2}";
-    }
-}
-  [(set (attr "type")
-     (if_then_else (match_operand:HI 2 "incdec_operand" "")
-       (const_string "incdec")
-       (const_string "alu")))
-   (set_attr "mode" "QI")])
+   (set_attr "mode" "<MODE>")])
 
 (define_insn "*add<mode>_5"
   [(set (reg FLAGS_REG)
        (compare
-         (plus:SWI48
-           (match_operand:SWI48 1 "nonimmediate_operand" "%0")
-           (match_operand:SWI48 2 "<general_operand>" "<g>"))
+         (plus:SWI
+           (match_operand:SWI 1 "nonimmediate_operand" "%0")
+           (match_operand:SWI 2 "<general_operand>" "<g>"))
          (const_int 0)))
-   (clobber (match_scratch:SWI48 0 "=r"))]
+   (clobber (match_scratch:SWI 0 "=<r>"))]
   "ix86_match_ccmode (insn, CCGOCmode)
    && !(MEM_P (operands[1]) && MEM_P (operands[2]))"
 {
@@ -6910,7 +6683,7 @@
     }
 }
   [(set (attr "type")
-     (if_then_else (match_operand:SWI48 2 "incdec_operand" "")
+     (if_then_else (match_operand:SWI 2 "incdec_operand" "")
        (const_string "incdec")
        (const_string "alu")))
    (set (attr "length_immediate")
@@ -6920,81 +6693,6 @@
        (const_string "*")))
    (set_attr "mode" "<MODE>")])
 
-(define_insn "*addhi_5"
-  [(set (reg FLAGS_REG)
-       (compare
-         (plus:HI (match_operand:HI 1 "nonimmediate_operand" "%0")
-                  (match_operand:HI 2 "general_operand" "rmn"))
-         (const_int 0)))
-   (clobber (match_scratch:HI 0 "=r"))]
-  "ix86_match_ccmode (insn, CCGOCmode)
-   && !(MEM_P (operands[1]) && MEM_P (operands[2]))"
-{
-  switch (get_attr_type (insn))
-    {
-    case TYPE_INCDEC:
-      if (operands[2] == const1_rtx)
-       return "inc{w}\t%0";
-      else
-       {
-         gcc_assert (operands[2] == constm1_rtx);
-         return "dec{w}\t%0";
-       }
-
-    default:
-      if (x86_maybe_negate_const_int (&operands[2], HImode))
-       return "sub{w}\t{%2, %0|%0, %2}";
-
-      return "add{w}\t{%2, %0|%0, %2}";
-    }
-}
-  [(set (attr "type")
-     (if_then_else (match_operand:HI 2 "incdec_operand" "")
-       (const_string "incdec")
-       (const_string "alu")))
-   (set (attr "length_immediate")
-      (if_then_else
-       (and (eq_attr "type" "alu") (match_operand 2 "const128_operand" ""))
-       (const_string "1")
-       (const_string "*")))
-   (set_attr "mode" "HI")])
-
-(define_insn "*addqi_5"
-  [(set (reg FLAGS_REG)
-       (compare
-         (plus:QI (match_operand:QI 1 "nonimmediate_operand" "%0")
-                  (match_operand:QI 2 "general_operand" "qmn"))
-         (const_int 0)))
-   (clobber (match_scratch:QI 0 "=q"))]
-  "ix86_match_ccmode (insn, CCGOCmode)
-   && !(MEM_P (operands[1]) && MEM_P (operands[2]))"
-{
-  switch (get_attr_type (insn))
-    {
-    case TYPE_INCDEC:
-      if (operands[2] == const1_rtx)
-       return "inc{b}\t%0";
-      else
-        {
-         gcc_assert (operands[2] == constm1_rtx
-                     || (CONST_INT_P (operands[2])
-                         && INTVAL (operands[2]) == 255));
-         return "dec{b}\t%0";
-       }
-
-    default:
-      if (x86_maybe_negate_const_int (&operands[2], QImode))
-       return "sub{b}\t{%2, %0|%0, %2}";
-
-      return "add{b}\t{%2, %0|%0, %2}";
-    }
-}
-  [(set (attr "type")
-     (if_then_else (match_operand:QI 2 "incdec_operand" "")
-       (const_string "incdec")
-       (const_string "alu")))
-   (set_attr "mode" "QI")])
-
 (define_insn "*addqi_ext_1_rex64"
   [(set (zero_extract:SI (match_operand 0 "ext_register_operand" "=Q")
                         (const_int 8)
@@ -7015,9 +6713,7 @@
        return "inc{b}\t%h0";
       else
         {
-         gcc_assert (operands[2] == constm1_rtx
-                     || (CONST_INT_P (operands[2])
-                         && INTVAL (operands[2]) == 255));
+         gcc_assert (operands[2] == constm1_rtx);
           return "dec{b}\t%h0";
         }
 
@@ -7052,9 +6748,7 @@
        return "inc{b}\t%h0";
       else
         {
-         gcc_assert (operands[2] == constm1_rtx
-                     || (CONST_INT_P (operands[2])
-                         && INTVAL (operands[2]) == 255));
+         gcc_assert (operands[2] == constm1_rtx);
           return "dec{b}\t%h0";
        }