Another typo
authorEddie Hung <eddie@fpgeh.com>
Thu, 11 Jul 2019 02:05:53 +0000 (19:05 -0700)
committerEddie Hung <eddie@fpgeh.com>
Thu, 11 Jul 2019 02:05:53 +0000 (19:05 -0700)
techlibs/xilinx/abc_ff.v

index 96cbb1e0496536545d99a919aa5e2762fec6ff93..91cfbc4c410cfaf31dfc49086e6f6b280679c48c 100644 (file)
@@ -68,7 +68,7 @@ module FDCE (output reg Q, input C, CE, D, CLR);
   );
   \$__ABC_FF_ abc_dff (.D(\$nextQ ), .Q(\$currQ ));
   generate
-    if (IS_PRE_INVERTED)
+    if (IS_CLR_INVERTED)
       \$__ABC_FD_ASYNC_MUX abc_async_mux (.A(\$currQ ), .B(1'b0), .S(CLR), .Y(Q));
     else
       \$__ABC_FD_ASYNC_MUX abc_async_mux (.A(1'b0), .B(\$currQ ), .S(CLR), .Y(Q));