i386.md (btsq, btrq, btcq): Fix modes.
authorRichard Henderson <rth@redhat.com>
Thu, 23 Dec 2004 07:23:31 +0000 (23:23 -0800)
committerRichard Henderson <rth@gcc.gnu.org>
Thu, 23 Dec 2004 07:23:31 +0000 (23:23 -0800)
        * config/i386/i386.md (btsq, btrq, btcq): Fix modes.
        (bt peepholes): Likewise.

From-SVN: r92534

gcc/ChangeLog
gcc/config/i386/i386.md

index 50109a10f6578755e5c415b145d644a7d2c4c515..722a951537a7ee9d2d141ed8968e841665a41a7e 100644 (file)
@@ -1,5 +1,8 @@
 2004-12-22  Richard Henderson  <rth@redhat.com>
 
+       * config/i386/i386.md (btsq, btrq, btcq): Fix modes.
+       (bt peepholes): Likewise.
+
        * varasm.c (force_const_mem): Call set_mem_align.
 
 2004-12-22  Richard Henderson  <rth@redhat.com>
index 156e65ff2d26b2ea871fd3eea352e78414a021ea..648748cadeb032fd082a330c833076164ad8003f 100644 (file)
 ;; negdf respectively, so they can never be disabled entirely.
 
 (define_insn "*btsq"
-  [(set (zero_extract:DI (match_operand 0 "register_operand" "+r")
+  [(set (zero_extract:DI (match_operand:DI 0 "register_operand" "+r")
                         (const_int 1)
-                        (match_operand 1 "const_0_to_63_operand" ""))
+                        (match_operand:DI 1 "const_0_to_63_operand" ""))
        (const_int 1))
    (clobber (reg:CC FLAGS_REG))]
   "TARGET_64BIT && (TARGET_USE_BT || reload_completed)"
   [(set_attr "type" "alu1")])
 
 (define_insn "*btrq"
-  [(set (zero_extract:DI (match_operand 0 "register_operand" "+r")
+  [(set (zero_extract:DI (match_operand:DI 0 "register_operand" "+r")
                         (const_int 1)
-                        (match_operand 1 "const_0_to_63_operand" ""))
+                        (match_operand:DI 1 "const_0_to_63_operand" ""))
        (const_int 0))
    (clobber (reg:CC FLAGS_REG))]
   "TARGET_64BIT && (TARGET_USE_BT || reload_completed)"
   [(set_attr "type" "alu1")])
 
 (define_insn "*btcq"
-  [(set (zero_extract:DI (match_operand 0 "register_operand" "+r")
+  [(set (zero_extract:DI (match_operand:DI 0 "register_operand" "+r")
                         (const_int 1)
-                        (match_operand 1 "const_0_to_63_operand" ""))
+                        (match_operand:DI 1 "const_0_to_63_operand" ""))
        (not:DI (zero_extract:DI (match_dup 0) (const_int 1) (match_dup 1))))
    (clobber (reg:CC FLAGS_REG))]
   "TARGET_64BIT && (TARGET_USE_BT || reload_completed)"
 (define_peephole2
   [(match_scratch:DI 2 "r")
    (parallel [(set (zero_extract:DI
-                    (match_operand 0 "register_operand" "")
+                    (match_operand:DI 0 "register_operand" "")
                     (const_int 1)
-                    (match_operand 1 "const_0_to_63_operand" ""))
+                    (match_operand:DI 1 "const_0_to_63_operand" ""))
                   (const_int 1))
              (clobber (reg:CC FLAGS_REG))])]
   "TARGET_64BIT && !TARGET_USE_BT"
 (define_peephole2
   [(match_scratch:DI 2 "r")
    (parallel [(set (zero_extract:DI
-                    (match_operand 0 "register_operand" "")
+                    (match_operand:DI 0 "register_operand" "")
                     (const_int 1)
-                    (match_operand 1 "const_0_to_63_operand" ""))
+                    (match_operand:DI 1 "const_0_to_63_operand" ""))
                   (const_int 0))
              (clobber (reg:CC FLAGS_REG))])]
   "TARGET_64BIT && !TARGET_USE_BT"
 (define_peephole2
   [(match_scratch:DI 2 "r")
    (parallel [(set (zero_extract:DI
-                    (match_operand 0 "register_operand" "")
+                    (match_operand:DI 0 "register_operand" "")
                     (const_int 1)
-                    (match_operand 1 "const_0_to_63_operand" ""))
+                    (match_operand:DI 1 "const_0_to_63_operand" ""))
              (not:DI (zero_extract:DI
                        (match_dup 0) (const_int 1) (match_dup 1))))
              (clobber (reg:CC FLAGS_REG))])]