[combine] Don't create LSHIFTRT of zero bits in change_zero_ext

	* combine.c (change_zero_ext): Do not create a shift of zero length.

From-SVN: r231613

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 6d3210f63c879c7f0d42f9f8095525fe02dfd3c4..c79b65c91414d286a6e48f3a22904b2c365d3aed 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+2015-12-14  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+       * combine.c (change_zero_ext): Do not create a shift of zero length.
+
 2015-12-14  Claudiu Zissulescu  <claziss@synopsys.com>
 
        * config/arc/arc.c (TARGET_NO_SPECULATION_IN_DELAY_SLOTS_P):

diff --git a/gcc/combine.c b/gcc/combine.c
index 71b1656ba33c52fafc7c5f302d94a7683425bea6..317a4b0e12a60756694276858a4c1c24cc9d370f 100644 (file)
--- a/gcc/combine.c
+++ b/gcc/combine.c
@@ -11045,7 +11045,8 @@ change_zero_ext (rtx *src)
          if (BITS_BIG_ENDIAN)
            start = GET_MODE_PRECISION (mode) - size - start;
 
-         x = gen_rtx_LSHIFTRT (mode, XEXP (x, 0), GEN_INT (start));
+         x = simplify_gen_binary (LSHIFTRT, mode,
+                                  XEXP (x, 0), GEN_INT (start));
        }
       else if (GET_CODE (x) == ZERO_EXTEND
               && GET_CODE (XEXP (x, 0)) == SUBREG