Ruby: Connect system port in Ruby network test

This patch moves the connection of the system port to create_system in
Ruby.py. Thereby it allows the failing Ruby test (and other Ruby
systems) to run again.

diff --git a/configs/example/se.py b/configs/example/se.py
index 57236448246d80d839e3b7d8b116f8e6daf56e31..b94652ac0cb1cf2284849f2dd758a5fd058a4c12 100644 (file)
--- a/configs/example/se.py
+++ b/configs/example/se.py
@@ -184,7 +184,6 @@ if options.ruby:
     options.use_map = True
     Ruby.create_system(options, system)
     assert(options.num_cpus == len(system.ruby._cpu_ruby_ports))
-    system.system_port = system.ruby._sys_port_proxy.port
 else:
     system.system_port = system.membus.port
     system.physmem.port = system.membus.port

diff --git a/configs/ruby/Ruby.py b/configs/ruby/Ruby.py
index b2342eed493dc7f129bef11f93d16ab64594f4dc..920eac01927a458624c96470b8a42792886dc919 100644 (file)
--- a/configs/ruby/Ruby.py
+++ b/configs/ruby/Ruby.py
@@ -105,6 +105,10 @@ def create_system(options, system, piobus = None, dma_devices = []):
     # full-fledged controller
     system.sys_port_proxy = sys_port_proxy
 
+    # Connect the system port for loading of binaries etc
+    system.system_port = system.sys_port_proxy.port
+
+
     #
     # Set the network classes based on the command line options
     #
@@ -182,5 +186,4 @@ def create_system(options, system, piobus = None, dma_devices = []):
     ruby.profiler = ruby_profiler
     ruby.mem_size = total_mem_size
     ruby._cpu_ruby_ports = cpu_sequencers
-    ruby._sys_port_proxy = sys_port_proxy
     ruby.random_seed    = options.random_seed

diff --git a/tests/configs/memtest-ruby.py b/tests/configs/memtest-ruby.py
index 2517e7670778466cbb7eec061670cca19e943dda..49f1520179e068897e7179da74a020b4c97e8118 100644 (file)
--- a/tests/configs/memtest-ruby.py
+++ b/tests/configs/memtest-ruby.py
@@ -109,10 +109,6 @@ for (i, ruby_port) in enumerate(system.ruby._cpu_ruby_ports):
      #
      ruby_port.access_phys_mem = False
 
-
-# Connect the system port for loading of binaries etc
-system.system_port = system.ruby._sys_port_proxy.port
-
 # -----------------------
 # run simulation
 # -----------------------

diff --git a/tests/configs/o3-timing-mp-ruby.py b/tests/configs/o3-timing-mp-ruby.py
index b14f0e5b1f3e328e1d9e74a85157a944e9b9e3dc..6f01167d34cc9f2bb5e0ac3d76ad48efa933c625 100644 (file)
--- a/tests/configs/o3-timing-mp-ruby.py
+++ b/tests/configs/o3-timing-mp-ruby.py
@@ -46,6 +46,8 @@ for cpu in cpus:
 # connect memory to membus
 system.physmem.port = system.membus.port
 
+# Connect the system port for loading of binaries etc
+system.system_port = system.membus.port
 
 # -----------------------
 # run simulation

diff --git a/tests/configs/o3-timing-ruby.py b/tests/configs/o3-timing-ruby.py
index 07851ae9f1082718fee0c9f60465c12ae1ccc62d..3b6d58b3b9c915d3bc37b5e0395deb13c80ad1d1 100644 (file)
--- a/tests/configs/o3-timing-ruby.py
+++ b/tests/configs/o3-timing-ruby.py
@@ -43,4 +43,7 @@ system = System(cpu = cpu,
 system.physmem.port = system.membus.port
 cpu.connectAllPorts(system.membus)
 
+# Connect the system port for loading of binaries etc
+system.system_port = system.membus.port
+
 root = Root(system = system)

diff --git a/tests/configs/rubytest-ruby.py b/tests/configs/rubytest-ruby.py
index a7e598b0aeb9edae9991f99aff7b8a2d6fc5ed6d..b63833ccf6c6b15830613c59e7f81d7cf86c9302 100644 (file)
--- a/tests/configs/rubytest-ruby.py
+++ b/tests/configs/rubytest-ruby.py
@@ -105,9 +105,6 @@ for ruby_port in system.ruby._cpu_ruby_ports:
     #
     ruby_port.access_phys_mem = False
 
-# Connect the system port for loading of binaries etc
-system.system_port = system.ruby._sys_port_proxy.port
-
 # -----------------------
 # run simulation
 # -----------------------

diff --git a/tests/configs/simple-atomic-mp-ruby.py b/tests/configs/simple-atomic-mp-ruby.py
index 705f13ef391965add85571a1d996590808c61fad..f8a7b1d1788ae373d0f1ba05fffede5755ccd86d 100644 (file)
--- a/tests/configs/simple-atomic-mp-ruby.py
+++ b/tests/configs/simple-atomic-mp-ruby.py
@@ -47,6 +47,8 @@ for cpu in cpus:
 # connect memory to membus
 system.physmem.port = system.membus.port
 
+# Connect the system port for loading of binaries etc
+system.system_port = system.membus.port
 
 # -----------------------
 # run simulation

diff --git a/tests/configs/simple-timing-mp-ruby.py b/tests/configs/simple-timing-mp-ruby.py
index 58ca862e18a202fc914bb619d5c8e30f22efe83e..d57ccea150ca0f59a6696d1ade08658c8ede9792 100644 (file)
--- a/tests/configs/simple-timing-mp-ruby.py
+++ b/tests/configs/simple-timing-mp-ruby.py
@@ -88,9 +88,6 @@ for (i, cpu) in enumerate(system.cpu):
     cpu.icache_port = system.ruby._cpu_ruby_ports[i].port
     cpu.dcache_port = system.ruby._cpu_ruby_ports[i].port
 
-# Connect the system port for loading of binaries etc
-system.system_port = system.ruby._sys_port_proxy.port
-
 # -----------------------
 # run simulation
 # -----------------------

diff --git a/tests/configs/simple-timing-ruby.py b/tests/configs/simple-timing-ruby.py
index 359421a49d07cf9e65a4a93723cffd31b589a38d..1d67f6f976a6d4b9cc1780af7d114f59779280af 100644 (file)
--- a/tests/configs/simple-timing-ruby.py
+++ b/tests/configs/simple-timing-ruby.py
@@ -85,9 +85,6 @@ assert(len(system.ruby._cpu_ruby_ports) == 1)
 cpu.icache_port = system.ruby._cpu_ruby_ports[0].port
 cpu.dcache_port = system.ruby._cpu_ruby_ports[0].port
 
-# Connect the system port for loading of binaries etc
-system.system_port = system.ruby._sys_port_proxy.port
-
 # -----------------------
 # run simulation
 # -----------------------